memmap.t2t

= Memory map =[memmap]

== AXI peripherals ==[axi]

Map of the physical memory and I/O space as seen by the Cortex A9 CPU.

|| Range | Region size (w/o mirrors) | Description ||
| 0x00000000-0x80000000 | Variable | DDR |
| 0x80000000-0x82ffffff | 0x01000000? | ACP (Accelerator Coherency Port) |
| 0x83000000-0x85ffffff | 0x00010000 | IRAM |
| 0x90000000-0x903fffff | 0x00008000 | IBR |
| 0x90400000-0x90ffffff | 0x00c00000 | [APB bridge #apb] |
| 0x91000000-0x91ffffff | 0x00000100 | SEMA (hardware semaphore) |
| 0x92000000-0x92ffffff | 0x00040000 | USB2.0 |
| 0x93000000-0x93ffffff | ? | TRUSTZONE |
| 0x94000000-0x94ffffff | ? | DPI0 |
| 0x95000000-0x95ffffff | ? | DPI1 |
| 0x96000000-0x96ffffff | 0x01000000 | DUSI |
| 0x96000000-0x962fffff | 0x00000400 | DMA? |
| 0x96300000-0x963fffff | 0x00100000 | UART0 |
| 0x96400000-0x964fffff | 0x00100000 | UART1 |
| 0x96500000-0x965fffff | 0x00100000 | SPI |
| 0x96600000-0x966fffff | 0x00100000 | I2S? |
| 0x97000000-0x97ffffff | 0x00000400 | DDRCONFIG |
| 0x98000000-0x98ffffff | 0x200 | PCIe0 |
| 0x99000000-0x99ffffff | 0x200 | PCIe1 |
| 0x9a000000-0x9affffff | ? | IPSEC |
| 0x9b000000-0x9bffffff | ? | SPACC PDU |
| 0x9c000000-0x9cffffff | ? | [PFE #pfe] |
| 0x9d000000-0x9dffffff | ? | SATA |
| 0x9e000000-0x9effffff | ? | DECT |
| 0x9f000000-0x9fffffff | 0x10000000 | [USB3.0 #peri_usb3] |
| 0xa0000000-0xafffffff | 0x10000000 | PCIe0 slave |
| 0xb0000000-0xbfffffff | 0x10000000 | PCIe1 slave |
| 0xc0000000-0xcfffffff | 0x10000000 | [EXP #peri_exp] |
| 0xcfff0000-0xcfffffff | 0x00010000? | [EXP_ECC #peri_exp_ecc] |
| 0x-0x | 0x | ? |
| 0xfff00000-0xfff1ffff | ? | [Cortex A9 peripherals #mpcore] |


== APB peripherals ==[apb]
I/O layout of APB peripherals region.

|| Range | Region size (w/o mirrors) | Description ||
| 0x90400000-0x9040ffff | 0x | TDM |
| 0x90410000-0x9041ffff | 0x | [USB PHY SerDes #peri_usbphy_serdes] |
| 0x90420000-0x9042ffff | 0x | TDMA |
| 0x90430000-0x9043ffff | 0x | Reserved 2 |
| 0x90440000-0x9044ffff | 0x | Reserved 3 |
| 0x90450000-0x9045ffff | 0x | [Timer #peri_timer] |
| 0x90460000-0x9046ffff | 0x | [PCIe SATA & USB CTRL #peri_dwc_misc] |
| 0x90470000-0x9047ffff | 0x | [GPIO #peri_gpio] |
| 0x90480000-0x9048ffff | 0x | Reserved 5 |
| 0x90490000-0x90493fff | 0x | UART0 |
| 0x90494000-0x90497fff | 0x | Reserved 6 |
| 0x90498000-0x9049bfff | 0x1000 | [SPI #peri_spi] |
| 0x9049c000-0x9049ffff | 0x20 | [I2C #peri_i2c] |
| 0x904a0000-0x904affff | 0x800 | [USB3.0 PHY #peri_usb3phy] |
| 0x904b0000-0x904bffff | 0x400 | [CLKCORE #peri_clkcore] |
| 0x904c0000-0x904cffff | 0x | Reserved 7 |
| 0x904d0000-0x904dffff | 0x | Reserved 8 |
| 0x904e0000-0x904effff | 0x | [RTC #peri_rtc] |
| 0x904f0000-0x904fffff | 0x | [OTP #peri_otp] |
| 0x90500000-0x9050ffff | 0x | HFE wrapper |
| 0x90510000-0x9051ffff | 0x | Reserved 10 |
| 0x90520000-0x9052ffff | 0x | Reserved 11 |
| 0x90530000-0x9053ffff | 0x | Reserved 12 |
| 0x90540000-0x9054ffff | 0x | Reserved 13 |
| 0x90550000-0x9055ffff | 0x | Reserved 14 |
| 0x90560000-0x9056ffff | 0x | Reserved 15 |
| 0x90570000-0x9057ffff | 0x | Reserved 16 |
| 0x90580000-0x9058ffff | 0x | Reserved 17 |
| 0x90590000-0x9059ffff | 0x | [SerDes CFG #peri_serdes] |
| 0x905a0000-0x905affff | 0x | [EXP CONF #peri_exp_conf] |
| 0x905b0000-0x905bffff | 0x | DDR PHY |
| 0x905c0000-0x905cffff | 0x | Reserved 20 |
| 0x905d0000-0x905dffff | 0x | TDMA2 |
| 0x905e0000-0x905????? | 0x | MDMA |
| 0x90600000-0x906????? | 0x | A9 CoreSight |
| 0x905-0x905 | 0x | ? |

== MPCore peripherals ==[mpcore]
I/O layout of Cortex A9 peripherals region.

|| Range | Region size (w/o mirrors) | Description ||
| 0xfff00000-0xfff000ff | 0x100 | A9 SCU |
| 0xfff00100-0xfff001ff | 0x100? | A9 Interrupt controller INT |
| 0xfff00200-0xfff002ff | 0x100? | A9 Global Timer |
| 0xfff00600-0xfff006ff | 0x100? | A9 Timer |
| 0xfff01000-0xfff010ff | 0x1000 | A9 Interrupt controller DIST |
| 0xfff10000-0xfff1ffff | ? | L2 cache controller |