diff --git a/base/src/Data/Macaw/AbsDomain/AbsState.hs b/base/src/Data/Macaw/AbsDomain/AbsState.hs index 060878dc..af26dce0 100644 --- a/base/src/Data/Macaw/AbsDomain/AbsState.hs +++ b/base/src/Data/Macaw/AbsDomain/AbsState.hs @@ -1458,7 +1458,7 @@ absEvalCall :: forall arch ids -> AbsProcessorState (ArchReg arch) ids -- ^ State before call -> RegState (ArchReg arch) (Value arch ids) - -> MemSegmentOff (ArchAddrWidth arch) + -> ArchSegmentOff arch -- ^ Address we are jumping to -> AbsBlockState (ArchReg arch) absEvalCall params ab0 regs addr = diff --git a/base/src/Data/Macaw/AbsDomain/JumpBounds.hs b/base/src/Data/Macaw/AbsDomain/JumpBounds.hs index f22f7263..84dd4ce3 100644 --- a/base/src/Data/Macaw/AbsDomain/JumpBounds.hs +++ b/base/src/Data/Macaw/AbsDomain/JumpBounds.hs @@ -859,4 +859,4 @@ postCallBounds params cns regs = -- -- Note: This is defined here (despite not being used here) to avoid import cycles elsewhere type IntraJumpTarget arch = - (MemSegmentOff (ArchAddrWidth arch), AbsBlockState (ArchReg arch), InitJumpBounds arch) + (ArchSegmentOff arch, AbsBlockState (ArchReg arch), InitJumpBounds arch) diff --git a/base/src/Data/Macaw/Analysis/FunctionArgs.hs b/base/src/Data/Macaw/Analysis/FunctionArgs.hs index b278e321..8112ff52 100644 --- a/base/src/Data/Macaw/Analysis/FunctionArgs.hs +++ b/base/src/Data/Macaw/Analysis/FunctionArgs.hs @@ -311,7 +311,7 @@ data ArchDemandInfo arch = ArchDemandInfo -- Takes address of callsite and registers. type ResolveCallArgsFn arch = forall ids - . MemSegmentOff (ArchAddrWidth arch) + . ArchSegmentOff arch -> RegState (ArchReg arch) (Value arch ids) -> Either String [Some (Value arch ids)] @@ -607,7 +607,7 @@ summarizeCall blockAddr callOff finalRegs mReturnAddr = do pure mempty recordStmtsDemands :: OrdF (ArchReg arch) - => MemSegmentOff (ArchAddrWidth arch) -- ^ Address of block + => ArchSegmentOff arch -- ^ Address of block -> ArchAddrWord arch -- ^ Offset from start of block of current instruction. -> [Stmt arch ids] -> FunctionArgsM arch ids (ArchAddrWord arch) diff --git a/base/src/Data/Macaw/Analysis/RegisterUse.hs b/base/src/Data/Macaw/Analysis/RegisterUse.hs index d523120d..a53ff1a3 100644 --- a/base/src/Data/Macaw/Analysis/RegisterUse.hs +++ b/base/src/Data/Macaw/Analysis/RegisterUse.hs @@ -511,7 +511,7 @@ data InferStackValue arch ids tp where -- | Read-only information needed to infer successor start -- constraints for a lbok. data StartInferContext arch = - SIC { sicAddr :: !(MemSegmentOff (ArchAddrWidth arch)) + SIC { sicAddr :: !(ArchSegmentOff arch) -- ^ Address of block we are inferring state for. , sicRegs :: !(MapF (ArchReg arch) (InitInferValue arch)) -- ^ Map rep register to rheir initial domain information. diff --git a/base/src/Data/Macaw/CFG/Core.hs b/base/src/Data/Macaw/CFG/Core.hs index d372de12..e6cda220 100644 --- a/base/src/Data/Macaw/CFG/Core.hs +++ b/base/src/Data/Macaw/CFG/Core.hs @@ -137,7 +137,7 @@ import Data.Macaw.Utils.Pretty type family ArchBlockPrecond (arch :: Kind.Type) :: Kind.Type -- | A pair containing a segment and valid offset within the segment. -type ArchSegmentOff arch = MemSegmentOff (ArchAddrWidth arch) +type ArchSegmentOff arch = ArchSegmentOff arch -- Note: -- The declarations in this file follow a top-down order, so the top-level diff --git a/base/src/Data/Macaw/Discovery/Classifier.hs b/base/src/Data/Macaw/Discovery/Classifier.hs index 8e1ab266..1b8ffc73 100644 --- a/base/src/Data/Macaw/Discovery/Classifier.hs +++ b/base/src/Data/Macaw/Discovery/Classifier.hs @@ -120,7 +120,7 @@ classifyDirectJump :: RegisterInfo (ArchReg arch) => ParseContext arch ids -> String -> Value arch ids (BVType (ArchAddrWidth arch)) - -> BlockClassifierM arch ids (MemSegmentOff (ArchAddrWidth arch)) + -> BlockClassifierM arch ids (ArchSegmentOff arch) classifyDirectJump ctx nm v = do ma <- case valueAsMemAddr v of Nothing -> fail $ nm ++ " value " ++ show v ++ " is not a valid address." diff --git a/base/src/Data/Macaw/Discovery/Classifier/JumpTable.hs b/base/src/Data/Macaw/Discovery/Classifier/JumpTable.hs index 498f28ac..49e0c0ac 100644 --- a/base/src/Data/Macaw/Discovery/Classifier/JumpTable.hs +++ b/base/src/Data/Macaw/Discovery/Classifier/JumpTable.hs @@ -220,7 +220,7 @@ type JumpTableClassifier arch ids s = extractJumpTableSlices :: ArchConstraints arch => Jmp.IntraJumpBounds arch ids -- ^ Bounds for jump table - -> MemSegmentOff (ArchAddrWidth arch) -- ^ Base address + -> ArchSegmentOff arch -- ^ Base address -> Natural -- ^ Stride -> BVValue arch ids idxWidth -> MemRepr tp -- ^ Type of values @@ -306,7 +306,7 @@ matchAbsoluteJumpTable = Info.classifierName "Absolute jump table" $ do BVMemRepr _arByteCount e -> pure e let go :: Int -> [MemChunk (ArchAddrWidth arch)] - -> Info.Classifier (MemSegmentOff (ArchAddrWidth arch)) + -> Info.Classifier (ArchSegmentOff arch) go entryIndex contents = do addr <- case resolveAsAddr mem endianness contents of Just a -> pure a diff --git a/base/src/Data/Macaw/Discovery/ParsedContents.hs b/base/src/Data/Macaw/Discovery/ParsedContents.hs index a794fb4d..b7f45145 100644 --- a/base/src/Data/Macaw/Discovery/ParsedContents.hs +++ b/base/src/Data/Macaw/Discovery/ParsedContents.hs @@ -82,7 +82,7 @@ instance MemWidth w => PP.Pretty (BlockExploreReason w) where -- These regions may be be sparse, given an index @i@, the -- the address given by @arBase@ + @arIx'*'arStride@. data BoundedMemArray arch tp = BoundedMemArray - { arBase :: !(MemSegmentOff (ArchAddrWidth arch)) + { arBase :: !(ArchSegmentOff arch) -- ^ The base address for array accesses. , arStride :: !Word64 -- ^ Space between elements of the array. diff --git a/macaw-semmc/src/Data/Macaw/SemMC/Generator.hs b/macaw-semmc/src/Data/Macaw/SemMC/Generator.hs index 51b06813..4da75a4b 100644 --- a/macaw-semmc/src/Data/Macaw/SemMC/Generator.hs +++ b/macaw-semmc/src/Data/Macaw/SemMC/Generator.hs @@ -74,7 +74,7 @@ data Expr arch ids tp where data PreBlock arch ids = PreBlock { pBlockIndex :: !Word64 - , pBlockAddr :: MM.MemSegmentOff (ArchAddrWidth arch) + , pBlockAddr :: MM.ArchSegmentOff arch , _pBlockStmts :: !(Seq.Seq (Stmt arch ids)) , _pBlockState :: !(RegState (ArchReg arch) (Value arch ids)) } @@ -90,7 +90,7 @@ pBlockState = lens _pBlockState (\s v -> s { _pBlockState = v }) data GenState arch ids s = GenState { assignIdGen :: NC.NonceGenerator (ST s) ids , _blockState :: !(PreBlock arch ids) - , genAddr :: MM.MemSegmentOff (ArchAddrWidth arch) + , genAddr :: MM.ArchSegmentOff arch , genRegUpdates :: MapF.MapF (ArchReg arch) (Value arch ids) , _blockStateSnapshot :: !(RegState (ArchReg arch) (Value arch ids)) , appCache :: !(MapF.MapF (App (Value arch ids)) (Value arch ids)) @@ -112,7 +112,7 @@ emptyPreBlock s0 idx addr = } initGenState :: NC.NonceGenerator (ST s) ids - -> MM.MemSegmentOff (ArchAddrWidth arch) + -> MM.ArchSegmentOff arch -> RegState (ArchReg arch) (Value arch ids) -> GenState arch ids s initGenState nonceGen addr st =