memory.vcd

$date
  Wed Mar 18 11:26:33 2020
$end
$version
  GHDL v0
$end
$timescale
  1 fs
$end
$scope module standard $end
$upscope $end
$scope module std_logic_1164 $end
$upscope $end
$scope module numeric_std $end
$upscope $end
$scope module t_memory $end
$var reg 10 ! addr_t[9:0] $end
$var reg 16 " din_t[15:0] $end
$var reg 1 # cmemwrite_t $end
$var reg 1 $ cmemread_t $end
$var reg 16 % outmemory_t[15:0] $end
$var reg 1 & reset_t $end
$scope module mem $end
$var reg 10 ' addr[9:0] $end
$var reg 16 ( din[15:0] $end
$var reg 1 ) cmemwrite $end
$var reg 1 * cmemread $end
$var reg 16 + outmemory[15:0] $end
$var reg 1 , reset $end
$comment memory1024 is not handled $end
$upscope $end
$upscope $end
$enddefinitions $end
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