From 5559996321261daee85de742c407a2d45ebdc2e6 Mon Sep 17 00:00:00 2001 From: Nicolas Pereira Date: Fri, 17 Jan 2025 20:21:49 -0300 Subject: [PATCH 1/2] add board h96 max v56 tvbox --- config/boards/h96max-v56.sh | 34 + packages/u-boot-turing-rk3588/debian/control | 14 + ...board-rockchip-Add-h96max-v56-rk3566.patch | 1127 +++++++++++++++++ .../debian/patches/series | 1 + .../u-boot-turing-rk3588/debian/targets.mk | 5 + 5 files changed, 1181 insertions(+) create mode 100755 config/boards/h96max-v56.sh create mode 100644 packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch diff --git a/config/boards/h96max-v56.sh b/config/boards/h96max-v56.sh new file mode 100755 index 00000000..c43b8c53 --- /dev/null +++ b/config/boards/h96max-v56.sh @@ -0,0 +1,34 @@ +# shellcheck shell=bash + +export BOARD_NAME="h96 v56 tvbox" +export BOARD_MAKER="h96-max" +export BOARD_SOC="Rockchip RK3566" +export BOARD_CPU="ARM Cortex A55" +export UBOOT_PACKAGE="u-boot-turing-rk3588" +export UBOOT_RULES_TARGET="h96max-v56-rk3566" +export COMPATIBLE_SUITES=("jammy" "noble") +export COMPATIBLE_FLAVORS=("server" "desktop") + +function config_image_hook__h96max-v56() { + local rootfs="$1" + local overlay="$2" + local suite="$3" + + if [ "${suite}" == "jammy" ] || [ "${suite}" == "noble" ]; then + # Kernel modules to load at boot time + echo "sprdbt_tty" >> "${rootfs}/etc/modules" + echo "sprdwl_ng" >> "${rootfs}/etc/modules" + + # Install BCMDHD SDIO WiFi and Bluetooth DKMS + chroot "${rootfs}" apt-get -y install dkms bcmdhd-sdio-dkms + + # Enable bluetooth for AP6275P + mkdir -p "${rootfs}/usr/lib/scripts" + cp "${overlay}/usr/lib/systemd/system/ap6275p-bluetooth.service" "${rootfs}/usr/lib/systemd/system/ap6275p-bluetooth.service" + cp "${overlay}/usr/lib/scripts/ap6275p-bluetooth.sh" "${rootfs}/usr/lib/scripts/ap6275p-bluetooth.sh" + cp "${overlay}/usr/bin/brcm_patchram_plus" "${rootfs}/usr/bin/brcm_patchram_plus" + chroot "${rootfs}" systemctl enable ap6275p-bluetooth + fi + + return 0 +} diff --git a/packages/u-boot-turing-rk3588/debian/control b/packages/u-boot-turing-rk3588/debian/control index 55a5447e..8ac6fb9b 100644 --- a/packages/u-boot-turing-rk3588/debian/control +++ b/packages/u-boot-turing-rk3588/debian/control @@ -67,3 +67,17 @@ Description: A boot loader for the Radxa Zero 3. intended to be easy to port and to debug, and runs on many supported architectures, including PPC, ARM, MIPS, x86, m68k, NIOS, and Microblaze. + +Package: u-boot-h96max-v56 +Architecture: arm64 +Priority: optional +Depends: mtd-utils +Provides: u-boot +Replaces: u-boot +Conflicts: u-boot +Description: A U-Boot for H96Max V56. + Das U-Boot is a cross-platform bootloader for embedded systems, + used as the default boot loader by several board vendors. It is + intended to be easy to port and to debug, and runs on many + supported architectures, including PPC, ARM, MIPS, x86, m68k, + NIOS, and Microblaze. diff --git a/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch b/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch new file mode 100644 index 00000000..b280be79 --- /dev/null +++ b/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch @@ -0,0 +1,1127 @@ +From a559e2704c21f78f9f3350524caee0c86933815c Mon Sep 17 00:00:00 2001 +From: Nicolas Pereira +Date: Sun, 24 Sep 2023 11:19:03 +0200 +Subject: [PATCH] board: rockchip: Add h96max v56 + +Based on the ROCK 3 Model C / Pine64 Quartz64-B and Jianfeng Liu's kernel DT. + +Tested with a v56 4GB v1.1: +- SD-card boot +- eMMC boot +- SPI Flash boot + - chip is XMC XM25QU128CWIQ, not W25Q256JWEIQ listed in schematics +- PCIe/NVMe +- USB is untested + +Signed-off-by: Nicolas Pereira +--- + arch/arm/dts/Makefile | 1 + + arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi | 26 + + arch/arm/dts/rk3566-h96max-v56.dts | 890 ++++++++++++++++++++ + configs/h96max-v56-rk3566_defconfig | 153 +++ + 4 files changed, 1070 insertions(+) + create mode 100644 arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi + create mode 100644 arch/arm/dts/rk3566-h96max-v56.dts + create mode 100644 configs/h96max-v56-rk3566_defconfig + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index b5c588c3363..94254b53aaf 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -175,6 +175,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ + rk3566-anbernic-rgxx3.dtb \ + rk3566-orangepi-3b.dtb \ + rk3566-radxa-zero3.dtb \ ++ rk3566-h96max-v56.dtb \ + rk3566-quartz64-a.dtb \ + rk3566-quartz64-b.dtb \ + rk3566-radxa-cm3-io.dtb \ +diff --git a/arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi b/arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi +new file mode 100644 +index 00000000000..29c7d96f730 +--- /dev/null ++++ b/arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi +@@ -0,0 +1,26 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++ ++#include "rk356x-u-boot.dtsi" ++ ++/ { ++ chosen { ++ stdout-path = &uart2; ++ }; ++}; ++ ++&sdhci { ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; ++}; ++ ++&uart2 { ++ bootph-all; ++ clock-frequency = <24000000>; ++ status = "okay"; ++}; ++ ++&usb_host0_xhci { ++ dr_mode = "host"; ++}; +diff --git a/arch/arm/dts/rk3566-h96max-v56.dts b/arch/arm/dts/rk3566-h96max-v56.dts +new file mode 100644 +index 00000000000..319236efc25 +--- /dev/null ++++ b/arch/arm/dts/rk3566-h96max-v56.dts +@@ -0,0 +1,890 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include "rk3566.dtsi" ++ ++/ { ++ model = "h96 TVbox 3566"; ++ compatible = "h96-TVbox,rk3566", "rockchip,rk3566"; ++ ++ aliases { ++ ethernet0 = &gmac1; ++ mmc0 = &sdmmc0; ++ mmc1 = &sdhci; ++ mmc2 = &sdmmc1; ++ }; ++ ++ chosen: chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ reserved_memory: reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ cmd: cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x00 0x2000000>; ++ linux,cma-default; ++ }; ++ ++ rknpu_reserved: rknpu { ++ compatible = "shared-dma-pool"; ++ inactive; ++ reusable; ++ size = <0x0 0x20000000>; ++ alignment = <0x0 0x1000>; ++ status = "okay"; ++ }; ++ ++ ramoops: ramoops@110000 { ++ compatible = "ramoops"; ++ /* 0x110000 to 0x1f0000 is for ramoops */ ++ reg = <0x0 0x110000 0x0 0xe0000>; ++ boot-log-size = <0x8000>; /* do not change */ ++ boot-log-count = <0x1>; /* do not change */ ++ console-size = <0x80000>; ++ pmsg-size = <0x30000>; ++ ftrace-size = <0x00000>; ++ record-size = <0x14000>; ++ }; ++ }; ++ ++ hdmi-con { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ leds: leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 =<&leds_gpio1>; ++ pinctrl-1 =<&leds_gpio2>; ++ ++ led@1 { ++ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; ++ label = "status_led"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ led@2 { ++ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; ++ label = "power_led"; ++ linux,default-trigger = "default-on"; ++ }; ++ }; ++ ++ rk809-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "Analog RK809"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1_8ch>; ++ }; ++ ++ simple-audio-card,codec { ++ sound-dai = <&rk809>; ++ }; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ post-power-on-delay-ms = <200>; ++ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++ }; ++ ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ wifi_chip_type = "ap6398s"; ++ pinctrl-names = "default"; ++ WIFI,poweren_gpio = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ //wifi-bt-power-toggle; ++ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ max-speed = <3000000>; ++ pinctrl-0 = <&uart1m0_rtsn &bt_host_wake_l &bt_wake_l &bt_enable_h>; ++ pinctrl-1 = <&uart1_rts_gpio>; ++ device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; ++ host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ openvfd { ++ compatible = "open,vfd"; ++ dev_name = "openvfd"; ++ status = "okay"; ++ }; ++ ++ bt_sco: bt-sco { ++ compatible = "delta,dfbmcs320"; ++ #sound-dai-cells = <1>; ++ status = "disabled"; ++ }; ++ ++ bt_sound: bt-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "dsp_a"; ++ simple-audio-card,bitclock-inversion; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "rockchip,bt"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s2_2ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&bt_sco 1>; ++ }; ++ }; ++ ++ ir-receiver { ++ compatible = "gpio-ir-receiver"; ++ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ir_receiver_pin>; ++ }; ++ ++ xin32k: xin32k { ++ compatible = "fixed-clock"; ++ clock-frequency = <32768>; ++ clock-output-names = "xin32k"; ++ #clock-cells = <0>; ++ }; ++ ++ /* labeled +12v in schematic */ ++ vcc12v_dcin: vcc12v-dcin-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ /* labeled +5v in schematic */ ++ vcc_5v: vcc-5v-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vbus: vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "vbus"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vbus>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vbus>; ++ }; ++ ++ vcc5v0_usb: vcc5v0-usb { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vbus>; ++ }; ++ ++ vcc_sd: vcc-sd { ++ compatible = "regulator-fixed"; ++ regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-name = "vcc_sd"; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_vbus_en>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ regulator-name = "vcc5v0_otg"; ++ regulator-always-on; ++ }; ++}; ++ ++&combphy1 { ++ status = "okay"; ++}; ++ ++&combphy2 { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&gmac1 { ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ clock_in_out = "input"; ++ phy-mode = "rgmii"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m0_miim ++ &gmac1m0_tx_bus2 ++ &gmac1m0_rx_bus2 ++ &gmac1m0_rgmii_clk ++ &gmac1m0_clkinout ++ &gmac1m0_rgmii_bus>; ++ ++ snps,reset-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ //snps,reset-delays-us = <0 20000 100000>; ++ snps,reset-delays-us = <0 50000 200000>; ++ tx_delay = <0x30>; ++ rx_delay = <0x10>; ++ phy-handle = <&rgmii_phy0>; ++ status = "okay"; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ avdd-0v9-supply = <&vdda0v9_image>; ++ avdd-1v8-supply = <&vcca1v8_image>; ++ status = "okay"; ++}; ++ ++&hdmi_in { ++ hdmi_in_vp0: endpoint { ++ remote-endpoint = <&vp0_out_hdmi>; ++ }; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&reserved_memory { ++ ramoops: ramoops@110000 { ++ compatible = "ramoops"; ++ reg = <0x0 0x110000 0x0 0xf0000>; ++ record-size = <0x20000>; ++ console-size = <0x80000>; ++ ftrace-size = <0x00000>; ++ pmsg-size = <0x50000>; ++ }; ++ cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ size = <0x0 0x00800000>; ++ linux,cma-default; ++ }; ++ ++ drm_logo: drm-logo@0 { ++ compatible = "rockchip,drm-logo"; ++ reg = <0x0 0x0 0x0 0x0>; ++ }; ++ ++ drm_cubic_lut: drm-cubic-lut@0 { ++ compatible = "rockchip,drm-cubic-lut"; ++ reg = <0x0 0x0 0x0 0x0>; ++ }; ++ ++ rknpu_reserved: rknpu { ++ compatible = "shared-dma-pool"; ++ inactive; ++ reusable; ++ size = <0x0 0x20000000>; ++ alignment = <0x0 0x1000>; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ vdd_cpu: tcs4525@1c { ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <700000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ not-save-power-en = <1>; ++ #sound-dai-cells = <0>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ codec { ++ mic-in-differential; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "okay"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++&mdio1 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&pinctrl { ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_host_vbus_en: vcc5v0-host-en { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ uart1_rts_gpio: uart1-rts-gpio { ++ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_enable_h: bt-enable-h { ++ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_l: bt-host-wake-l { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ ++ bt_wake_l: bt-wake-l { ++ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ sd { ++ sd_vcc3v3_power_en: sd-vcc3v3-power-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ir-receiver { ++ ir_receiver_pin: ir-receiver-pin { ++ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ work-led { ++ leds_gpio1: leds-gpio1 { ++ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ leds_gpio2: leds-gpio2 { ++ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vcc_3v3>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_3v3>; ++ vccio7-supply = <&vcc_3v3>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ max-frequency = <200000000>; ++ full-pwr-cycle-in-suspend; ++ status = "okay"; ++}; ++ ++&sdmmc0 { ++ max-frequency = <150000000>; ++ no-sdio; ++ no-mmc; ++ cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ //vmmc-supply = <&vcc3v3_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; ++ status = "okay"; ++}; ++ ++&sdmmc1 { ++ max-frequency = <150000000>; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++&sfc { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ flash@0 { ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <100000000>; ++ spi-rx-bus-width = <4>; ++ spi-tx-bus-width = <1>; ++ }; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++// iomux with GPIO2_B2(WIFI,host_wake_irq) ++&uart8 { ++ status = "disabled"; ++}; ++ ++/* BT config */ ++&uart1 { ++ dma-names = "tx", "rx"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb_host0_xhci { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy0_host { ++ status = "okay"; ++}; ++ ++&usb2phy0_otg { ++ status = "okay"; ++}; ++ ++&usb_host1_xhci { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb2phy1_host { ++ status = "okay"; ++}; ++ ++&usb2phy1_otg { ++ status = "okay"; ++}; ++ ++&vop { ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { ++ reg = ; ++ remote-endpoint = <&hdmi_in_vp0>; ++ }; ++}; +diff --git a/configs/h96max-v56-rk3566_defconfig b/configs/h96max-v56-rk3566_defconfig +new file mode 100644 +index 00000000000..5557d983f31 +--- /dev/null ++++ b/configs/h96max-v56-rk3566_defconfig +@@ -0,0 +1,153 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_COUNTER_FREQUENCY=24000000 ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_TEXT_BASE=0x00a00000 ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=2 ++CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y ++CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 ++CONFIG_SF_DEFAULT_SPEED=24000000 ++CONFIG_SF_DEFAULT_MODE=0x2000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3566-h96max-v56" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y ++CONFIG_ROCKCHIP_SPI_IMAGE=y ++CONFIG_SPL_SERIAL=y ++CONFIG_SPL_STACK_R_ADDR=0x600000 ++CONFIG_SPL_STACK=0x400000 ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI=y ++CONFIG_SYS_LOAD_ADDR=0xc00800 ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_LEGACY_IMAGE_FORMAT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-h96max-v56.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_SPL_MAX_SIZE=0x40000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++CONFIG_SPL_HAS_BSS_LINKER_SECTION=y ++CONFIG_SPL_BSS_START_ADDR=0x4000000 ++CONFIG_SPL_BSS_MAX_SIZE=0x4000 ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 ++CONFIG_SPL_ATF=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_POWEROFF=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_PMIC=y ++CONFIG_CMD_REGULATOR=y ++# CONFIG_SPL_DOS_PARTITION is not set ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_SYSCON=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_SPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_MISC=y ++CONFIG_SUPPORT_EMMC_RPMB=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_SF_DEFAULT_BUS=4 ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_XTX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_DWC_ETH_QOS_ROCKCHIP=y ++CONFIG_NVME_PCI=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SPL_RAM=y ++CONFIG_SCSI=y ++CONFIG_DM_SCSI=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550_MEM32=y ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_ERRNO_STR=y ++CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y ++CONFIG_ARM64_ERRATUM_826319=y ++CONFIG_ARM64_ERRATUM_827319=y ++CONFIG_ARM64_ERRATUM_824069=y ++CONFIG_ARM64_ERRATUM_819472=y ++CONFIG_ARM64_ERRATUM_832075=y ++CONFIG_ARM64_ERRATUM_2051678=y ++CONFIG_CAVIUM_ERRATUM_23154=y ++CONFIG_CAVIUM_ERRATUM_22375=y ++CONFIG_ROCKCHIP_ERRATUM_3588001=y ++CONFIG_NUMA=y ++CONFIG_NODES_SHIFT=2 ++CONFIG_PARAVIRT=y ++CONFIG_CPUFREQ_DT=m ++CONFIG_CPUFREQ_DT_PLATDEV=y ++CONFIG_ARM_SCPI_CPUFREQ=y ++CONFIG_BT_MTKUART=m ++CONFIG_BT_VIRTIO=m ++CONFIG_BT_HCIUART_LL=y ++CONFIG_BT_HCIUART_MRVL=y ++CONFIG_CFG80211=m ++CONFIG_NET_9P=m ++CONFIG_RFKILL_INPUT=y ++CONFIG_RFKILL_GPIO=m ++CONFIG_BRCMSTB_GISB_ARB=y ++CONFIG_VEXPRESS_CONFIG=y ++CONFIG_MHI_BUS_EP=m ++CONFIG_BRCM_TRACING=y ++CONFIG_BRCMDBG=y ++CONFIG_B43LEGACY=m ++CONFIG_B43LEGACY_PCI_AUTOSELECT=y ++CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y ++CONFIG_B43LEGACY_LEDS=y ++CONFIG_B43LEGACY_HWRNG=y ++CONFIG_B43LEGACY_DEBUG=y ++CONFIG_B43LEGACY_DMA=y ++CONFIG_B43LEGACY_PIO=y ++CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y ++CONFIG_VIRT_WIFI=m +-- +2.25.1 diff --git a/packages/u-boot-turing-rk3588/debian/patches/series b/packages/u-boot-turing-rk3588/debian/patches/series index 89f3db3b..d4c49f50 100644 --- a/packages/u-boot-turing-rk3588/debian/patches/series +++ b/packages/u-boot-turing-rk3588/debian/patches/series @@ -4,3 +4,4 @@ 0004-board-rockchip-Add-the-Mixtile-Core-3588E.patch 0005-board-rockchip-Add-Xunlong-Orange-Pi-3B.patch 0006-add-Radxa-zero-3w-support.patch +0007-board-rockchip-Add-h96max-v56-rk3566.patch \ No newline at end of file diff --git a/packages/u-boot-turing-rk3588/debian/targets.mk b/packages/u-boot-turing-rk3588/debian/targets.mk index 51a975ba..501d5877 100644 --- a/packages/u-boot-turing-rk3588/debian/targets.mk +++ b/packages/u-boot-turing-rk3588/debian/targets.mk @@ -15,3 +15,8 @@ u-boot-rockchip_platforms += radxa-zero3-rk3566 radxa-zero3-rk3566_ddr := rk3566_ddr_1056MHz_v1.18.bin radxa-zero3-rk3566_bl31 := rk3568_bl31_v1.43.elf radxa-zero3-rk3566_pkg := radxa-zero3 + +u-boot-rockchip_platforms += h96max-v56-rk3566 +h96max-v56-rk3566_ddr := rk3566_ddr_1056MHz_v1.18.bin +h96max-v56-rk3566_bl31 := rk3568_bl31_v1.43.elf +h96max-v56-rk3566_pkg := h96max-v56 From 4a54bd4fecc10750f1eb9e6dd0265f37ed9f79d4 Mon Sep 17 00:00:00 2001 From: Nicolas Pereira Date: Sun, 19 Jan 2025 11:12:07 -0300 Subject: [PATCH 2/2] remove memory reservation from h96max v56 --- ...board-rockchip-Add-h96max-v56-rk3566.patch | 105 ++---------------- 1 file changed, 10 insertions(+), 95 deletions(-) diff --git a/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch b/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch index b280be79..5f918d77 100644 --- a/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch +++ b/packages/u-boot-turing-rk3588/debian/patches/0007-board-rockchip-Add-h96max-v56-rk3566.patch @@ -1,5 +1,5 @@ From a559e2704c21f78f9f3350524caee0c86933815c Mon Sep 17 00:00:00 2001 -From: Nicolas Pereira +From: Nicolas Pereira Date: Sun, 24 Sep 2023 11:19:03 +0200 Subject: [PATCH] board: rockchip: Add h96max v56 @@ -13,13 +13,13 @@ Tested with a v56 4GB v1.1: - PCIe/NVMe - USB is untested -Signed-off-by: Nicolas Pereira +Signed-off-by: Nicolas Pereira --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi | 26 + - arch/arm/dts/rk3566-h96max-v56.dts | 890 ++++++++++++++++++++ - configs/h96max-v56-rk3566_defconfig | 153 +++ - 4 files changed, 1070 insertions(+) + arch/arm/dts/rk3566-h96max-v56.dts | 821 ++++++++++++++++++++ + configs/h96max-v56-rk3566_defconfig | 137 +++ + 4 files changed, 985 insertions(+) create mode 100644 arch/arm/dts/rk3566-h96max-v56-u-boot.dtsi create mode 100644 arch/arm/dts/rk3566-h96max-v56.dts create mode 100644 configs/h96max-v56-rk3566_defconfig @@ -73,7 +73,7 @@ new file mode 100644 index 00000000000..319236efc25 --- /dev/null +++ b/arch/arm/dts/rk3566-h96max-v56.dts -@@ -0,0 +1,890 @@ +@@ -0,0 +1,821 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Rockchip Electronics Co., Ltd. @@ -102,40 +102,6 @@ index 00000000000..319236efc25 + stdout-path = "serial2:1500000n8"; + }; + -+ reserved_memory: reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ -+ cmd: cma { -+ compatible = "shared-dma-pool"; -+ reusable; -+ size = <0x00 0x2000000>; -+ linux,cma-default; -+ }; -+ -+ rknpu_reserved: rknpu { -+ compatible = "shared-dma-pool"; -+ inactive; -+ reusable; -+ size = <0x0 0x20000000>; -+ alignment = <0x0 0x1000>; -+ status = "okay"; -+ }; -+ -+ ramoops: ramoops@110000 { -+ compatible = "ramoops"; -+ /* 0x110000 to 0x1f0000 is for ramoops */ -+ reg = <0x0 0x110000 0x0 0xe0000>; -+ boot-log-size = <0x8000>; /* do not change */ -+ boot-log-count = <0x1>; /* do not change */ -+ console-size = <0x80000>; -+ pmsg-size = <0x30000>; -+ ftrace-size = <0x00000>; -+ record-size = <0x14000>; -+ }; -+ }; -+ + hdmi-con { + compatible = "hdmi-connector"; + type = "a"; @@ -431,41 +397,6 @@ index 00000000000..319236efc25 + status = "okay"; +}; + -+&reserved_memory { -+ ramoops: ramoops@110000 { -+ compatible = "ramoops"; -+ reg = <0x0 0x110000 0x0 0xf0000>; -+ record-size = <0x20000>; -+ console-size = <0x80000>; -+ ftrace-size = <0x00000>; -+ pmsg-size = <0x50000>; -+ }; -+ cma { -+ compatible = "shared-dma-pool"; -+ reusable; -+ size = <0x0 0x00800000>; -+ linux,cma-default; -+ }; -+ -+ drm_logo: drm-logo@0 { -+ compatible = "rockchip,drm-logo"; -+ reg = <0x0 0x0 0x0 0x0>; -+ }; -+ -+ drm_cubic_lut: drm-cubic-lut@0 { -+ compatible = "rockchip,drm-cubic-lut"; -+ reg = <0x0 0x0 0x0 0x0>; -+ }; -+ -+ rknpu_reserved: rknpu { -+ compatible = "shared-dma-pool"; -+ inactive; -+ reusable; -+ size = <0x0 0x20000000>; -+ alignment = <0x0 0x1000>; -+ }; -+}; -+ +&i2c0 { + status = "okay"; + @@ -493,12 +424,12 @@ index 00000000000..319236efc25 + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; -+ rockchip,system-power-controller; -+ wakeup-source; + #clock-cells = <1>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + not-save-power-en = <1>; + #sound-dai-cells = <0>; ++ rockchip,system-power-controller; ++ wakeup-source; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; @@ -826,7 +757,7 @@ index 00000000000..319236efc25 + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vcc_3v3>; -+ vccio2-supply = <&vcc_1v8>; ++ vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; @@ -969,7 +900,7 @@ new file mode 100644 index 00000000000..5557d983f31 --- /dev/null +++ b/configs/h96max-v56-rk3566_defconfig -@@ -0,0 +1,153 @@ +@@ -0,0 +1,137 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 @@ -1084,22 +1015,6 @@ index 00000000000..5557d983f31 +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y -+CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -+CONFIG_ARM64_ERRATUM_826319=y -+CONFIG_ARM64_ERRATUM_827319=y -+CONFIG_ARM64_ERRATUM_824069=y -+CONFIG_ARM64_ERRATUM_819472=y -+CONFIG_ARM64_ERRATUM_832075=y -+CONFIG_ARM64_ERRATUM_2051678=y -+CONFIG_CAVIUM_ERRATUM_23154=y -+CONFIG_CAVIUM_ERRATUM_22375=y -+CONFIG_ROCKCHIP_ERRATUM_3588001=y -+CONFIG_NUMA=y -+CONFIG_NODES_SHIFT=2 -+CONFIG_PARAVIRT=y -+CONFIG_CPUFREQ_DT=m -+CONFIG_CPUFREQ_DT_PLATDEV=y -+CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_BT_MTKUART=m +CONFIG_BT_VIRTIO=m +CONFIG_BT_HCIUART_LL=y