make BOARD=pynq 报错 Unable to resolve source for pin: "nutcoretrap"

[zhuguiyuan]

想要生成用于 PYNQ 的 NutShell.sv（即 mmio 端口使用 AXI 协议而非 SimpleBus 协议）
环境：

Linux 5.15.0-118-generic Ubuntu 22.04 x86_64 GNU/Linux
Branch: master d114ea0 [origin/master] Bump Chisel 6.5.0 (#203)

复现步骤：

git clone <the_repo>
cd NutShell
make init
make BOARD=pynq

报错：

mkdir -p /home/zhuguiyuan/WORK/NutShell/build/rtl
mill -i generator.test.runMain top.TopMain  --target-dir /home/zhuguiyuan/WORK/NutShell/build/rtl BOARD=pynq CORE=inorder   --split-verilog
[build.sc] [40/53] enablePluginScalacOptions.super.mill.scalalib.ScalaModule.enablePluginScalacOptio[build.sc] [49/53] compile
[info] compiling 1 Scala source to /home/zhuguiyuan/WORK/NutShell/out/mill-build/compile.dest/classes ...
[info] done compiling
[50/115] difftest.enablePluginScalacOptions.super.mill.scalalib.ScalaModule.enablePluginScalacOption[57/115] difftest.compile
Compiling compiler interface...
[info] compiling 14 Scala sources to /home/zhuguiyuan/WORK/NutShell/out/difftest/compile.dest/classes ...
[warn] 6 deprecations
[warn] 1 deprecation (since 2.13.0)
[warn] 2 deprecations (since Chisel 6.0)
[warn] 9 deprecations in total; re-run with -deprecation for details
[warn] 42 feature warnings; re-run with -feature for details
[warn] 5 warnings found
[info] done compiling
[71/115] generator.enablePluginScalacOptions.super.mill.scalalib.ScalaModule.enablePluginScalacOptio[78/115] generator.compile
[info] compiling 76 Scala sources to /home/zhuguiyuan/WORK/NutShell/out/generator/compile.dest/classes ...
[warn] 204 deprecations (since Chisel 6.0); re-run with -deprecation for details
[warn] 2098 feature warnings; re-run with -feature for details
[warn] two warnings found
[info] done compiling
[100/115] generator.test.enablePluginScalacOptions.super.mill.scalalib.ScalaModule.enablePluginScala[107/115] generator.test.compile
[info] compiling 1 Scala source to /home/zhuguiyuan/WORK/NutShell/out/generator/test/compile.dest/classes ...
[info] done compiling
[115/115] generator.test.runMain
====== Settings = (pynq, inorder) ======
EnableDebug = true
EnableILA = true
EnableMultiIssue = false
EnableOutOfOrderExec = false
EnableRVC = true
FPGAPlatform = true
HasDTLB = true
HasDcache = true
HasITLB = true
HasIcache = true
HasL2cache = true
HasPrefetch = true
IsRV32 = false
MMIOBase = 0xe0000000
MMIOSize = 0x20000000
MemMapBase = 0x10000000
MemMapRegionBits = 28
MmodeOnly = false
NrExtIntr = 3
ResetVector = 0x60000000
[warn] src/main/scala/nutcore/backend/fu/CSR.scala 673:22: [W003] Dynamic index with width 4 is too small for extractee of width 64
[warn]   val delegS = (deleg(causeNO(3,0))) && (privilegeMode < ModeM)
[warn]                      ^
[warn] src/main/scala/nutcore/mem/EmbeddedTLB.scala 50:20: [W004] Dynamic index with width 1 is too wide for Vec of size 1 (expected index width 0).
[warn]   io.tlbmd := tlbmd(io.rindex)
[warn]                    ^
[warn] src/main/scala/nutcore/mem/Cache.scala 675:13: [W008] Return values of asTypeOf will soon be read-only
[warn]     mmio(0) <> cache.io.mmio
[warn]             ^
[warn] src/main/scala/device/AXI4PLIC.scala 68:67: [W004] Dynamic index with width 32 is too wide for Vec of size 4 (expected index width 2).
[warn]       when (in.r.fire && (getOffset(raddr) === addr.U)) { inHandle(r) := true.B }
[warn]                                                                   ^
[warn] src/main/scala/device/AXI4PLIC.scala 60:13: [W004] Dynamic index with width 32 is too wide for Vec of size 4 (expected index width 2).
[warn]     inHandle(wdata(31,0)) := false.B
[warn]             ^
[warn] There were 5 warning(s) during hardware elaboration.
Exception in thread "main" circt.stage.phases.Exceptions$FirtoolNonZeroExitCode: /home/zhuguiyuan/.cache/llvm-firtool/1.62.0/bin/firtool returned a non-zero exit code. Note that this version of Chisel (6.5.0) was published against firtool version 1.62.0.
------------------------------------------------------------------------------
ExitCode:
1
STDOUT:

STDERR:
<stdin>:2:1: error: Unable to resolve source for pin: "nutcoretrap"
circuit Top :%[[
^

------------------------------------------------------------------------------
1 targets failed
generator.test.runMain subprocess failed

尝试定位错误在哪里，请问有没有能打出更多日志的方法？