Skip to content

Latest commit

 

History

History
9 lines (6 loc) · 451 Bytes

File metadata and controls

9 lines (6 loc) · 451 Bytes

RTL-to-GDS-flow-of-MIPS-Processor-using-Opensource-Tools-

Tools used: Yosys, OpenSTA, OpenROAD Designed Single-Cycle MIPS processor that supports various arithmetic, logical, and control operations.

Generated gate-level netlists using Yosys tool with the FreePDK45 library.

Verified timing constraints and analyzed power consumption with the OpenSTA tool.

Executed Floor Planning, Power Planning, Placement, Routing, CTS using the OpenROAD tool.