diff --git a/src/finn/custom_op/fpgadataflow/hwcustomop.py b/src/finn/custom_op/fpgadataflow/hwcustomop.py
index ad3e9cc51..09a60dc5d 100644
--- a/src/finn/custom_op/fpgadataflow/hwcustomop.py
+++ b/src/finn/custom_op/fpgadataflow/hwcustomop.py
@@ -30,7 +30,7 @@
 import os
 import warnings
 from abc import abstractmethod
-from pyverilator.util.axi_utils import _read_signal, reset_rtlsim, rtlsim_multi_io
+from pyverilator.util.axi_utils import rtlsim_multi_io
 from qonnx.custom_op.base import CustomOp
 from qonnx.util.basic import roundup_to_integer_multiple
 
@@ -357,8 +357,6 @@ def derive_characteristic_fxns(self, period, override_rtlsim_dict=None):
             exp_cycles,
         )
         sim = self.get_rtlsim()
-        # signal name
-        sname = "_" + self.hls_sname() + "_"
         if override_rtlsim_dict is not None:
             io_dict = override_rtlsim_dict
         else:
@@ -374,32 +372,12 @@ def derive_characteristic_fxns(self, period, override_rtlsim_dict=None):
         txns_in = {key: [] for (key, value) in io_dict["inputs"].items() if "in" in key}
         txns_out = {key: [] for (key, value) in io_dict["outputs"].items() if "out" in key}
 
-        def monitor_txns(sim_obj):
-            for inp in txns_in:
-                in_ready = _read_signal(sim, inp + sname + "TREADY") == 1
-                in_valid = _read_signal(sim, inp + sname + "TVALID") == 1
-                if in_ready and in_valid:
-                    txns_in[inp].append(1)
-                else:
-                    txns_in[inp].append(0)
-            for outp in txns_out:
-                if (
-                    _read_signal(sim, outp + sname + "TREADY") == 1
-                    and _read_signal(sim, outp + sname + "TVALID") == 1
-                ):
-                    txns_out[outp].append(1)
-                else:
-                    txns_out[outp].append(0)
-
-        reset_rtlsim(sim)
-        total_cycle_count = rtlsim_multi_io(
+        self.reset_rtlsim(sim)
+        self.rtlsim_multi_io(
             sim,
             io_dict,
-            n_outs,
-            sname=sname,
-            liveness_threshold=period,
-            hook_preclk=monitor_txns,
         )
+        total_cycle_count = self.get_nodeattr("cycles_rtlsim")
         assert (
             total_cycle_count <= period
         ), """Total cycle count from rtl simulation is higher than