diff --git a/src/finn/util/basic.py b/src/finn/util/basic.py
index 870f9f6fa..5eb72194e 100644
--- a/src/finn/util/basic.py
+++ b/src/finn/util/basic.py
@@ -83,6 +83,7 @@
 part_map["VCK190"] = "xcvc1902-vsva2197-2MP-e-S"
 part_map["V80"] = "xcv80-lsva4737-2MHP-e-s"
 
+
 def get_rtlsim_trace_depth():
     """Return the trace depth for rtlsim via PyVerilator. Controllable
     via the RTLSIM_TRACE_DEPTH environment variable. If the env.var. is