Custom Stitched IP Build

[ash8327]

I am attempting to implement the end2end example cybersecurity on a Minized board. I have been able to connect the FINN IP block to a DMA and successfully run the DMA interrupt example to get data out of the FINN IP block but the issue I am having is that the FINN IP block doesn't match what the notebook indicates the data input. The network was padded to 600 bits but when I input that packet size into the the FINN IP I don't always get out one packet. Some times 2 or 3:

Is there a good example of how to use the FINN stitched IP blocks with out a PYNQ supported board? I think I understand the DMA well but I cannot get the FINN IP to produce consistent output.

[auphelia]

HI @ash8327 ,

Please check out this discussions question: #387
The tutorial is published here: https://github.com/Xilinx/finn/tree/main/tutorials/fpga_flow