diff --git a/clang/test/CodeGen/aie/aie2/aie2-undef-accumulator-float.cpp b/clang/test/CodeGen/aie/aie2/aie2-undef-accumulator-float.cpp
deleted file mode 100644
index daa649253535..000000000000
--- a/clang/test/CodeGen/aie/aie2/aie2-undef-accumulator-float.cpp
+++ /dev/null
@@ -1,41 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-//===- aie2-undef-accumulator-float.cpp -------------------------*- C++ -*-===//
-//
-// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
-//
-//===----------------------------------------------------------------------===//
-// RUN: %clang -O2 %s --target=aie2 -S -emit-llvm -o - | FileCheck %s
-
-// CHECK-LABEL: @_Z21test_undef_v8accfloatv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <4 x i64> @llvm.aie2.v8accfloat()
-// CHECK-NEXT:    ret <4 x i64> [[TMP0]]
-//
-v8accfloat test_undef_v8accfloat()
-{
-  return undef_v8accfloat();
-}
-
-// CHECK-LABEL: @_Z22test_undef_v16accfloatv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i64> @llvm.aie2.v16accfloat()
-// CHECK-NEXT:    ret <8 x i64> [[TMP0]]
-//
-v16accfloat test_undef_v16accfloat()
-{
-  return undef_v16accfloat();
-}
-
-// CHECK-LABEL: @_Z22test_undef_v32accfloatv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i64> @llvm.aie2.v32accfloat()
-// CHECK-NEXT:    ret <16 x i64> [[TMP0]]
-//
-v32accfloat test_undef_v32accfloat()
-{
-  return undef_v32accfloat();
-}
diff --git a/clang/test/CodeGen/aie/aie2/aie2-undef-bfloat.cpp b/clang/test/CodeGen/aie/aie2/aie2-undef-bfloat.cpp
deleted file mode 100644
index 388d0ea1cf45..000000000000
--- a/clang/test/CodeGen/aie/aie2/aie2-undef-bfloat.cpp
+++ /dev/null
@@ -1,47 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-//===- aie2-undef-bfloat.cpp ------------------------------------*- C++ -*-===//
-//
-// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
-//
-//===----------------------------------------------------------------------===//
-// RUN: %clang -O2 %s --target=aie2 -S -emit-llvm -o - | FileCheck %s
-
-// CHECK-LABEL: @_Z21test_undef_v8bfloat16v(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x bfloat> @llvm.aie2.v8bfloat16()
-// CHECK-NEXT:    ret <8 x bfloat> [[TMP0]]
-//
-v8bfloat16 test_undef_v8bfloat16() {
-  return undef_v8bfloat16();
-}
-
-// CHECK-LABEL: @_Z22test_undef_v16bfloat16v(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x bfloat> @llvm.aie2.v16bfloat16()
-// CHECK-NEXT:    ret <16 x bfloat> [[TMP0]]
-//
-v16bfloat16 test_undef_v16bfloat16() {
-  return undef_v16bfloat16();
-}
-
-// CHECK-LABEL: @_Z22test_undef_v32bfloat16v(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x bfloat> @llvm.aie2.v32bfloat16()
-// CHECK-NEXT:    ret <32 x bfloat> [[TMP0]]
-//
-v32bfloat16 test_undef_v32bfloat16() {
-  return undef_v32bfloat16();
-}
-
-// CHECK-LABEL: @_Z22test_undef_v64bfloat16v(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <64 x bfloat> @llvm.aie2.v64bfloat16()
-// CHECK-NEXT:    ret <64 x bfloat> [[TMP0]]
-//
-v64bfloat16 test_undef_v64bfloat16() {
-  return undef_v64bfloat16();
-}
diff --git a/clang/test/CodeGen/aie/aie2/aie2-undef-float.cpp b/clang/test/CodeGen/aie/aie2/aie2-undef-float.cpp
deleted file mode 100644
index 4a38210155be..000000000000
--- a/clang/test/CodeGen/aie/aie2/aie2-undef-float.cpp
+++ /dev/null
@@ -1,38 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
-//===- aie2-undef-float.cpp -------------------------------------*- C++ -*-===//
-//
-// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
-//
-//===----------------------------------------------------------------------===//
-// RUN: %clang -O2 %s --target=aie2 -S -emit-llvm -o - | FileCheck %s
-
-// CHECK-LABEL: @_Z18test_undef_v8floatv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x float> @llvm.aie2.v8float()
-// CHECK-NEXT:    ret <8 x float> [[TMP0]]
-//
-v8float test_undef_v8float() {
-  return undef_v8float();
-}
-
-// CHECK-LABEL: @_Z19test_undef_v16floatv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x float> @llvm.aie2.v16float()
-// CHECK-NEXT:    ret <16 x float> [[TMP0]]
-//
-v16float test_undef_v16float() {
-  return undef_v16float();
-}
-
-// CHECK-LABEL: @_Z19test_undef_v32floatv(
-// CHECK-NEXT:  entry:
-// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x float> @llvm.aie2.v32float()
-// CHECK-NEXT:    ret <32 x float> [[TMP0]]
-//
-v32float test_undef_v32float() {
-  return undef_v32float();
-}
diff --git a/clang/test/CodeGen/aie/aie2/aie2-undef-vectors.cpp b/clang/test/CodeGen/aie/aie2/aie2-undef-vectors.cpp
new file mode 100644
index 000000000000..e1986e3fa697
--- /dev/null
+++ b/clang/test/CodeGen/aie/aie2/aie2-undef-vectors.cpp
@@ -0,0 +1,328 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+//===- aie2-undef-vectors.cpp ------------------------------------*- C++ -*-===//
+//
+// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
+//
+//===----------------------------------------------------------------------===//
+// RUN: %clang -O2 %s --target=aie2 -S -emit-llvm -o - | FileCheck %s
+
+// CHECK-LABEL: @_Z18test_undef_v32int4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.aie2.v4int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
+// CHECK-NEXT:    ret <16 x i8> [[TMP1]]
+//
+v32int4 test_undef_v32int4() { return undef_v32int4(); }
+// CHECK-LABEL: @_Z19test_undef_v32uint4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <4 x i32> @llvm.aie2.v4int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <4 x i32> [[TMP0]] to <16 x i8>
+// CHECK-NEXT:    ret <16 x i8> [[TMP1]]
+//
+v32uint4 test_undef_v32uint4() { return undef_v32uint4(); }
+// CHECK-LABEL: @_Z18test_undef_v16int8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i8> @llvm.aie2.v16int8()
+// CHECK-NEXT:    ret <16 x i8> [[TMP0]]
+//
+v16int8 test_undef_v16int8() { return undef_v16int8(); }
+// CHECK-LABEL: @_Z19test_undef_v16uint8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i8> @llvm.aie2.v16int8()
+// CHECK-NEXT:    ret <16 x i8> [[TMP0]]
+//
+v16uint8 test_undef_v16uint8() { return undef_v16uint8(); }
+// CHECK-LABEL: @_Z18test_undef_v8int16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i16> @llvm.aie2.v8int16()
+// CHECK-NEXT:    ret <8 x i16> [[TMP0]]
+//
+v8int16 test_undef_v8int16() { return undef_v8int16(); }
+// CHECK-LABEL: @_Z19test_undef_v8uint16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i16> @llvm.aie2.v8int16()
+// CHECK-NEXT:    ret <8 x i16> [[TMP0]]
+//
+v8uint16 test_undef_v8uint16() { return undef_v8uint16(); }
+// CHECK-LABEL: @_Z18test_undef_v4int32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <4 x i32> @llvm.aie2.v4int32()
+// CHECK-NEXT:    ret <4 x i32> [[TMP0]]
+//
+v4int32 test_undef_v4int32() { return undef_v4int32(); }
+// CHECK-LABEL: @_Z19test_undef_v4uint32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <4 x i32> @llvm.aie2.v4int32()
+// CHECK-NEXT:    ret <4 x i32> [[TMP0]]
+//
+v4uint32 test_undef_v4uint32() { return undef_v4uint32(); }
+// CHECK-LABEL: @_Z18test_undef_v64int4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <8 x i32> @llvm.aie2.v8int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i32> [[TMP0]] to <32 x i8>
+// CHECK-NEXT:    ret <32 x i8> [[TMP1]]
+//
+v64int4 test_undef_v64int4() { return undef_v64int4(); }
+// CHECK-LABEL: @_Z19test_undef_v64uint4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <8 x i32> @llvm.aie2.v8int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <8 x i32> [[TMP0]] to <32 x i8>
+// CHECK-NEXT:    ret <32 x i8> [[TMP1]]
+//
+v64uint4 test_undef_v64uint4() { return undef_v64uint4(); }
+// CHECK-LABEL: @_Z18test_undef_v32int8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x i8> @llvm.aie2.v32int8()
+// CHECK-NEXT:    ret <32 x i8> [[TMP0]]
+//
+v32int8 test_undef_v32int8() { return undef_v32int8(); }
+// CHECK-LABEL: @_Z19test_undef_v32uint8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x i8> @llvm.aie2.v32int8()
+// CHECK-NEXT:    ret <32 x i8> [[TMP0]]
+//
+v32uint8 test_undef_v32uint8() { return undef_v32uint8(); }
+// CHECK-LABEL: @_Z19test_undef_v16int16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i16> @llvm.aie2.v16int16()
+// CHECK-NEXT:    ret <16 x i16> [[TMP0]]
+//
+v16int16 test_undef_v16int16() { return undef_v16int16(); }
+// CHECK-LABEL: @_Z20test_undef_v16uint16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i16> @llvm.aie2.v16int16()
+// CHECK-NEXT:    ret <16 x i16> [[TMP0]]
+//
+v16uint16 test_undef_v16uint16() { return undef_v16uint16(); }
+// CHECK-LABEL: @_Z18test_undef_v8int32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i32> @llvm.aie2.v8int32()
+// CHECK-NEXT:    ret <8 x i32> [[TMP0]]
+//
+v8int32 test_undef_v8int32() { return undef_v8int32(); }
+// CHECK-LABEL: @_Z19test_undef_v8uint32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i32> @llvm.aie2.v8int32()
+// CHECK-NEXT:    ret <8 x i32> [[TMP0]]
+//
+v8uint32 test_undef_v8uint32() { return undef_v8uint32(); }
+// CHECK-LABEL: @_Z18test_undef_v8acc32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <4 x i64> @llvm.aie2.v8acc32()
+// CHECK-NEXT:    ret <4 x i64> [[TMP0]]
+//
+v8acc32 test_undef_v8acc32() { return undef_v8acc32(); }
+// CHECK-LABEL: @_Z18test_undef_v4acc64v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <4 x i64> @llvm.aie2.v4acc64()
+// CHECK-NEXT:    ret <4 x i64> [[TMP0]]
+//
+v4acc64 test_undef_v4acc64() { return undef_v4acc64(); }
+// CHECK-LABEL: @_Z19test_undef_v128int4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <16 x i32> @llvm.aie2.v16int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i32> [[TMP0]] to <64 x i8>
+// CHECK-NEXT:    ret <64 x i8> [[TMP1]]
+//
+v128int4 test_undef_v128int4() { return undef_v128int4(); }
+// CHECK-LABEL: @_Z20test_undef_v128uint4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <16 x i32> @llvm.aie2.v16int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <16 x i32> [[TMP0]] to <64 x i8>
+// CHECK-NEXT:    ret <64 x i8> [[TMP1]]
+//
+v128uint4 test_undef_v128uint4() { return undef_v128uint4(); }
+// CHECK-LABEL: @_Z18test_undef_v64int8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <64 x i8> @llvm.aie2.v64int8()
+// CHECK-NEXT:    ret <64 x i8> [[TMP0]]
+//
+v64int8 test_undef_v64int8() { return undef_v64int8(); }
+// CHECK-LABEL: @_Z19test_undef_v64uint8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <64 x i8> @llvm.aie2.v64int8()
+// CHECK-NEXT:    ret <64 x i8> [[TMP0]]
+//
+v64uint8 test_undef_v64uint8() { return undef_v64uint8(); }
+// CHECK-LABEL: @_Z19test_undef_v32int16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x i16> @llvm.aie2.v32int16()
+// CHECK-NEXT:    ret <32 x i16> [[TMP0]]
+//
+v32int16 test_undef_v32int16() { return undef_v32int16(); }
+// CHECK-LABEL: @_Z20test_undef_v32uint16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x i16> @llvm.aie2.v32int16()
+// CHECK-NEXT:    ret <32 x i16> [[TMP0]]
+//
+v32uint16 test_undef_v32uint16() { return undef_v32uint16(); }
+// CHECK-LABEL: @_Z19test_undef_v16int32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i32> @llvm.aie2.v16int32()
+// CHECK-NEXT:    ret <16 x i32> [[TMP0]]
+//
+v16int32 test_undef_v16int32() { return undef_v16int32(); }
+// CHECK-LABEL: @_Z20test_undef_v16uint32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i32> @llvm.aie2.v16int32()
+// CHECK-NEXT:    ret <16 x i32> [[TMP0]]
+//
+v16uint32 test_undef_v16uint32() { return undef_v16uint32(); }
+// CHECK-LABEL: @_Z19test_undef_v16acc32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i64> @llvm.aie2.v16acc32()
+// CHECK-NEXT:    ret <8 x i64> [[TMP0]]
+//
+v16acc32 test_undef_v16acc32() { return undef_v16acc32(); }
+// CHECK-LABEL: @_Z18test_undef_v8acc64v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i64> @llvm.aie2.v8acc64()
+// CHECK-NEXT:    ret <8 x i64> [[TMP0]]
+//
+v8acc64 test_undef_v8acc64() { return undef_v8acc64(); }
+// CHECK-LABEL: @_Z19test_undef_v256int4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <32 x i32> @llvm.aie2.v32int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <32 x i32> [[TMP0]] to <128 x i8>
+// CHECK-NEXT:    ret <128 x i8> [[TMP1]]
+//
+v256int4 test_undef_v256int4() { return undef_v256int4(); }
+// CHECK-LABEL: @_Z20test_undef_v256uint4v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call <32 x i32> @llvm.aie2.v32int32()
+// CHECK-NEXT:    [[TMP1:%.*]] = bitcast <32 x i32> [[TMP0]] to <128 x i8>
+// CHECK-NEXT:    ret <128 x i8> [[TMP1]]
+//
+v256uint4 test_undef_v256uint4() { return undef_v256uint4(); }
+// CHECK-LABEL: @_Z19test_undef_v128int8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <128 x i8> @llvm.aie2.v128int8()
+// CHECK-NEXT:    ret <128 x i8> [[TMP0]]
+//
+v128int8 test_undef_v128int8() { return undef_v128int8(); }
+// CHECK-LABEL: @_Z20test_undef_v128uint8v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <128 x i8> @llvm.aie2.v128int8()
+// CHECK-NEXT:    ret <128 x i8> [[TMP0]]
+//
+v128uint8 test_undef_v128uint8() { return undef_v128uint8(); }
+// CHECK-LABEL: @_Z19test_undef_v64int16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <64 x i16> @llvm.aie2.v64int16()
+// CHECK-NEXT:    ret <64 x i16> [[TMP0]]
+//
+v64int16 test_undef_v64int16() { return undef_v64int16(); }
+// CHECK-LABEL: @_Z20test_undef_v64uint16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <64 x i16> @llvm.aie2.v64int16()
+// CHECK-NEXT:    ret <64 x i16> [[TMP0]]
+//
+v64uint16 test_undef_v64uint16() { return undef_v64uint16(); }
+// CHECK-LABEL: @_Z19test_undef_v32int32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x i32> @llvm.aie2.v32int32()
+// CHECK-NEXT:    ret <32 x i32> [[TMP0]]
+//
+v32int32 test_undef_v32int32() { return undef_v32int32(); }
+// CHECK-LABEL: @_Z20test_undef_v32uint32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x i32> @llvm.aie2.v32int32()
+// CHECK-NEXT:    ret <32 x i32> [[TMP0]]
+//
+v32uint32 test_undef_v32uint32() { return undef_v32uint32(); }
+// CHECK-LABEL: @_Z19test_undef_v32acc32v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i64> @llvm.aie2.v32acc32()
+// CHECK-NEXT:    ret <16 x i64> [[TMP0]]
+//
+v32acc32 test_undef_v32acc32() { return undef_v32acc32(); }
+// CHECK-LABEL: @_Z19test_undef_v16acc64v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i64> @llvm.aie2.v16acc64()
+// CHECK-NEXT:    ret <16 x i64> [[TMP0]]
+//
+v16acc64 test_undef_v16acc64() { return undef_v16acc64(); }
+// CHECK-LABEL: @_Z21test_undef_v8accfloatv(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <4 x i64> @llvm.aie2.v8accfloat()
+// CHECK-NEXT:    ret <4 x i64> [[TMP0]]
+//
+v8accfloat test_undef_v8accfloat() {
+  return undef_v8accfloat();
+}
+// CHECK-LABEL: @_Z22test_undef_v16accfloatv(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x i64> @llvm.aie2.v16accfloat()
+// CHECK-NEXT:    ret <8 x i64> [[TMP0]]
+//
+v16accfloat test_undef_v16accfloat() {
+  return undef_v16accfloat();
+}
+// CHECK-LABEL: @_Z22test_undef_v32accfloatv(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x i64> @llvm.aie2.v32accfloat()
+// CHECK-NEXT:    ret <16 x i64> [[TMP0]]
+//
+v32accfloat test_undef_v32accfloat() {
+  return undef_v32accfloat();
+}
+// CHECK-LABEL: @_Z21test_undef_v8bfloat16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x bfloat> @llvm.aie2.v8bfloat16()
+// CHECK-NEXT:    ret <8 x bfloat> [[TMP0]]
+//
+v8bfloat16 test_undef_v8bfloat16() {
+  return undef_v8bfloat16();
+}
+// CHECK-LABEL: @_Z22test_undef_v16bfloat16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x bfloat> @llvm.aie2.v16bfloat16()
+// CHECK-NEXT:    ret <16 x bfloat> [[TMP0]]
+//
+v16bfloat16 test_undef_v16bfloat16() {
+  return undef_v16bfloat16();
+}
+// CHECK-LABEL: @_Z22test_undef_v32bfloat16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x bfloat> @llvm.aie2.v32bfloat16()
+// CHECK-NEXT:    ret <32 x bfloat> [[TMP0]]
+//
+v32bfloat16 test_undef_v32bfloat16() {
+  return undef_v32bfloat16();
+}
+// CHECK-LABEL: @_Z22test_undef_v64bfloat16v(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <64 x bfloat> @llvm.aie2.v64bfloat16()
+// CHECK-NEXT:    ret <64 x bfloat> [[TMP0]]
+//
+v64bfloat16 test_undef_v64bfloat16() {
+  return undef_v64bfloat16();
+}
+// CHECK-LABEL: @_Z18test_undef_v8floatv(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <8 x float> @llvm.aie2.v8float()
+// CHECK-NEXT:    ret <8 x float> [[TMP0]]
+//
+v8float test_undef_v8float() {
+  return undef_v8float();
+}
+// CHECK-LABEL: @_Z19test_undef_v16floatv(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <16 x float> @llvm.aie2.v16float()
+// CHECK-NEXT:    ret <16 x float> [[TMP0]]
+//
+v16float test_undef_v16float() {
+  return undef_v16float();
+}
+// CHECK-LABEL: @_Z19test_undef_v32floatv(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = tail call noundef <32 x float> @llvm.aie2.v32float()
+// CHECK-NEXT:    ret <32 x float> [[TMP0]]
+//
+v32float test_undef_v32float() {
+  return undef_v32float();
+}
diff --git a/llvm/test/CodeGen/AIE/aie2/float.ll b/llvm/test/CodeGen/AIE/aie2/float.ll
deleted file mode 100644
index 59afa571d6eb..000000000000
--- a/llvm/test/CodeGen/AIE/aie2/float.ll
+++ /dev/null
@@ -1,57 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-;
-; This file is licensed under the Apache License v2.0 with LLVM Exceptions.
-; See https://llvm.org/LICENSE.txt for license information.
-; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-;
-; (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
-; RUN: llc -O2 -mtriple=aie2 %s -o - | FileCheck %s
-
-define <8 x float> @test_undef_v8float()  {
-; CHECK-LABEL: test_undef_v8float:
-; CHECK:         .p2align 4
-; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    nopa ; ret lr
-; CHECK-NEXT:    nop // Delay Slot 5
-; CHECK-NEXT:    nop // Delay Slot 4
-; CHECK-NEXT:    nop // Delay Slot 3
-; CHECK-NEXT:    nop // Delay Slot 2
-; CHECK-NEXT:    nop // Delay Slot 1
-entry:
-  %0 = tail call <8 x float> @llvm.aie2.v8float()
-  ret <8 x float> %0
-}
-
-define <16 x float> @test_undef_v16float()  {
-; CHECK-LABEL: test_undef_v16float:
-; CHECK:         .p2align 4
-; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    nopa ; ret lr
-; CHECK-NEXT:    nop // Delay Slot 5
-; CHECK-NEXT:    nop // Delay Slot 4
-; CHECK-NEXT:    nop // Delay Slot 3
-; CHECK-NEXT:    nop // Delay Slot 2
-; CHECK-NEXT:    nop // Delay Slot 1
-entry:
-  %0 = tail call <16 x float> @llvm.aie2.v16float()
-  ret <16 x float> %0
-}
-
-define <32 x float> @test_undef_v32float()  {
-; CHECK-LABEL: test_undef_v32float:
-; CHECK:         .p2align 4
-; CHECK-NEXT:  // %bb.0: // %entry
-; CHECK-NEXT:    nopa ; ret lr
-; CHECK-NEXT:    nop // Delay Slot 5
-; CHECK-NEXT:    nop // Delay Slot 4
-; CHECK-NEXT:    nop // Delay Slot 3
-; CHECK-NEXT:    nop // Delay Slot 2
-; CHECK-NEXT:    nop // Delay Slot 1
-entry:
-  %0 = tail call <32 x float> @llvm.aie2.v32float()
-  ret <32 x float> %0
-}
-
-declare <8 x float> @llvm.aie2.v8float()
-declare <16 x float> @llvm.aie2.v16float()
-declare <32 x float> @llvm.aie2.v32float()
diff --git a/llvm/test/CodeGen/AIE/aie2/undef_vectors.ll b/llvm/test/CodeGen/AIE/aie2/undef_vectors.ll
new file mode 100644
index 000000000000..5479f2ad534a
--- /dev/null
+++ b/llvm/test/CodeGen/AIE/aie2/undef_vectors.ll
@@ -0,0 +1,507 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+;
+; This file is licensed under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
+; (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
+; RUN: llc -O2 -mtriple=aie2 %s -o - | FileCheck %s
+
+define <16 x i8> @test_undef_v32int4() {
+; CHECK-LABEL: test_undef_v32int4:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <4 x i32> @llvm.aie2.v4int32()
+  %1 = bitcast <4 x i32> %0 to <16 x i8>
+  ret <16 x i8> %1
+}
+
+define <16 x i8> @test_undef_v16int8() {
+; CHECK-LABEL: test_undef_v16int8:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x i8> @llvm.aie2.v16int8()
+  ret <16 x i8> %0
+}
+
+define <8 x i16> @test_undef_v8int16() {
+; CHECK-LABEL: test_undef_v8int16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <8 x i16> @llvm.aie2.v8int16()
+  ret <8 x i16> %0
+}
+
+define <4 x i32> @test_undef_v4int32() {
+; CHECK-LABEL: test_undef_v4int32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <4 x i32> @llvm.aie2.v4int32()
+  ret <4 x i32> %0
+}
+
+define <32 x i8> @test_undef_v64int4() {
+; CHECK-LABEL: test_undef_v64int4:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <8 x i32> @llvm.aie2.v8int32()
+  %1 = bitcast <8 x i32> %0 to <32 x i8>
+  ret <32 x i8> %1
+}
+
+define <32 x i8> @test_undef_v32int8() {
+; CHECK-LABEL: test_undef_v32int8:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <32 x i8> @llvm.aie2.v32int8()
+  ret <32 x i8> %0
+}
+
+define <16 x i16> @test_undef_v16int16() {
+; CHECK-LABEL: test_undef_v16int16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x i16> @llvm.aie2.v16int16()
+  ret <16 x i16> %0
+}
+
+define <8 x i32> @test_undef_v8int32() {
+; CHECK-LABEL: test_undef_v8int32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <8 x i32> @llvm.aie2.v8int32()
+  ret <8 x i32> %0
+}
+
+define <4 x i64> @test_undef_v8acc32() {
+; CHECK-LABEL: test_undef_v8acc32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <4 x i64> @llvm.aie2.v8acc32()
+  ret <4 x i64> %0
+}
+
+define <4 x i64> @test_undef_v4acc64() {
+; CHECK-LABEL: test_undef_v4acc64:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <4 x i64> @llvm.aie2.v4acc64()
+  ret <4 x i64> %0
+}
+
+define <64 x i8> @test_undef_v128int4() {
+; CHECK-LABEL: test_undef_v128int4:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <16 x i32> @llvm.aie2.v16int32()
+  %1 = bitcast <16 x i32> %0 to <64 x i8>
+  ret <64 x i8> %1
+}
+
+define <64 x i8> @test_undef_v64int8() {
+; CHECK-LABEL: test_undef_v64int8:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <64 x i8> @llvm.aie2.v64int8()
+  ret <64 x i8> %0
+}
+
+define <32 x i16> @test_undef_v32int16() {
+; CHECK-LABEL: test_undef_v32int16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <32 x i16> @llvm.aie2.v32int16()
+  ret <32 x i16> %0
+}
+
+define <16 x i32> @test_undef_v16int32() {
+; CHECK-LABEL: test_undef_v16int32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x i32> @llvm.aie2.v16int32()
+  ret <16 x i32> %0
+}
+
+
+define <8 x i64> @test_undef_v16acc32() {
+; CHECK-LABEL: test_undef_v16acc32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <8 x i64> @llvm.aie2.v16acc32()
+  ret <8 x i64> %0
+}
+
+define <8 x i64> @test_undef_v8acc64() {
+; CHECK-LABEL: test_undef_v8acc64:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <8 x i64> @llvm.aie2.v8acc64()
+  ret <8 x i64> %0
+}
+
+define <128 x i8> @test_undef_v256int4() {
+; CHECK-LABEL: test_undef_v256int4:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <32 x i32> @llvm.aie2.v32int32()
+  %1 = bitcast <32 x i32> %0 to <128 x i8>
+  ret <128 x i8> %1
+}
+
+define <128 x i8> @test_undef_v128int8() {
+; CHECK-LABEL: test_undef_v128int8:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <128 x i8> @llvm.aie2.v128int8()
+  ret <128 x i8> %0
+}
+
+define <64 x i16> @test_undef_v64int16() {
+; CHECK-LABEL: test_undef_v64int16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <64 x i16> @llvm.aie2.v64int16()
+  ret <64 x i16> %0
+}
+
+define <32 x i32> @test_undef_v32int32() {
+; CHECK-LABEL: test_undef_v32int32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <32 x i32> @llvm.aie2.v32int32()
+  ret <32 x i32> %0
+}
+
+define <16 x i64> @test_undef_v32acc32() {
+; CHECK-LABEL: test_undef_v32acc32:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x i64> @llvm.aie2.v32acc32()
+  ret <16 x i64> %0
+}
+
+define <16 x i64> @test_undef_v16acc64() {
+; CHECK-LABEL: test_undef_v16acc64:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x i64> @llvm.aie2.v16acc64()
+  ret <16 x i64> %0
+}
+
+define <8 x i64> @test_undef_v16accfloat() {
+; CHECK-LABEL: test_undef_v16accfloat:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <8 x i64> @llvm.aie2.v16accfloat()
+  ret <8 x i64> %0
+}
+
+define <16 x i64> @test_undef_v32accfloat() {
+; CHECK-LABEL: test_undef_v32accfloat:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x i64> @llvm.aie2.v32accfloat()
+  ret <16 x i64> %0
+}
+
+define <8 x bfloat> @test_undef_v8bfloat16() {
+; CHECK-LABEL: test_undef_v8bfloat16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <8 x bfloat> @llvm.aie2.v8bfloat16()
+  ret <8 x bfloat> %0
+}
+
+define <16 x bfloat> @test_undef_v16bfloat16() {
+; CHECK-LABEL: test_undef_v16bfloat16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <16 x bfloat> @llvm.aie2.v16bfloat16()
+  ret <16 x bfloat> %0
+}
+
+define <32 x bfloat> @test_undef_v32bfloat16() {
+; CHECK-LABEL: test_undef_v32bfloat16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <32 x bfloat> @llvm.aie2.v32bfloat16()
+  ret <32 x bfloat> %0
+}
+
+define <64 x bfloat> @test_undef_v64bfloat16() {
+; CHECK-LABEL: test_undef_v64bfloat16:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call noundef <64 x bfloat> @llvm.aie2.v64bfloat16()
+  ret <64 x bfloat> %0
+}
+
+define <8 x float> @test_undef_v8float()  {
+; CHECK-LABEL: test_undef_v8float:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <8 x float> @llvm.aie2.v8float()
+  ret <8 x float> %0
+}
+
+define <16 x float> @test_undef_v16float()  {
+; CHECK-LABEL: test_undef_v16float:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <16 x float> @llvm.aie2.v16float()
+  ret <16 x float> %0
+}
+
+define <32 x float> @test_undef_v32float()  {
+; CHECK-LABEL: test_undef_v32float:
+; CHECK:         .p2align 4
+; CHECK-NEXT:  // %bb.0: // %entry
+; CHECK-NEXT:    nopa ; ret lr
+; CHECK-NEXT:    nop // Delay Slot 5
+; CHECK-NEXT:    nop // Delay Slot 4
+; CHECK-NEXT:    nop // Delay Slot 3
+; CHECK-NEXT:    nop // Delay Slot 2
+; CHECK-NEXT:    nop // Delay Slot 1
+entry:
+  %0 = tail call <32 x float> @llvm.aie2.v32float()
+  ret <32 x float> %0
+}
+
+declare <4 x i32> @llvm.aie2.v4int32()
+declare <16 x i8> @llvm.aie2.v16int8()
+declare <8 x i16> @llvm.aie2.v8int16()
+declare <8 x i32> @llvm.aie2.v8int32()
+declare <32 x i8> @llvm.aie2.v32int8()
+declare <16 x i16> @llvm.aie2.v16int16()
+declare <4 x i64> @llvm.aie2.v8acc32()
+declare <4 x i64> @llvm.aie2.v4acc64()
+declare <16 x i32> @llvm.aie2.v16int32()
+declare <64 x i8> @llvm.aie2.v64int8()
+declare <32 x i16> @llvm.aie2.v32int16()
+declare <8 x i64> @llvm.aie2.v16acc32()
+declare <8 x i64> @llvm.aie2.v8acc64()
+declare <32 x i32> @llvm.aie2.v32int32()
+declare <128 x i8> @llvm.aie2.v128int8()
+declare <64 x i16> @llvm.aie2.v64int16()
+declare <16 x i64> @llvm.aie2.v32acc32()
+declare <16 x i64> @llvm.aie2.v16acc64()
+declare <4 x i64> @llvm.aie2.v8accfloat()
+declare <8 x i64> @llvm.aie2.v16accfloat()
+declare <16 x i64> @llvm.aie2.v32accfloat()
+declare <8 x bfloat> @llvm.aie2.v8bfloat16()
+declare <16 x bfloat> @llvm.aie2.v16bfloat16()
+declare <32 x bfloat> @llvm.aie2.v32bfloat16()
+declare <64 x bfloat> @llvm.aie2.v64bfloat16()
+declare <8 x float> @llvm.aie2.v8float()
+declare <16 x float> @llvm.aie2.v16float()
+declare <32 x float> @llvm.aie2.v32float()