diff --git a/_unittest/test_01_3dlayout_edb.py b/_unittest/test_01_3dlayout_edb.py index 25e5e0bf908..f6fb1e409e1 100644 --- a/_unittest/test_01_3dlayout_edb.py +++ b/_unittest/test_01_3dlayout_edb.py @@ -198,10 +198,7 @@ def test_04_add_mesh_operations(self): ) def test_05_change_property(self): - ports = self.aedtapp.create_ports_on_component_by_nets( - "U1", - "DDR4_DQS0_P", - ) + ports = self.aedtapp.create_ports_on_component_by_nets("U1", "DDR4_DQS0_P") assert self.aedtapp.modeler.change_property( "Excitations:{}".format(ports[0].name), "Impedance", "49ohm", "EM Design" ) @@ -322,10 +319,7 @@ def test_17_ports_on_components_nets(self): if "GND" not in self.aedtapp.modeler.pins[i].net_name and self.aedtapp.modeler.pins[i].net_name != "" ] ports_before = len(self.aedtapp.port_list) - ports = self.aedtapp.create_ports_on_component_by_nets( - "J1", - nets, - ) + ports = self.aedtapp.create_ports_on_component_by_nets("J1", nets) assert ports ports_after = len(self.aedtapp.port_list) assert ports_after - ports_before == len(nets) diff --git a/_unittest/test_41_3dlayout_modeler.py b/_unittest/test_41_3dlayout_modeler.py index 8110b697e7e..81554ed1de0 100644 --- a/_unittest/test_41_3dlayout_modeler.py +++ b/_unittest/test_41_3dlayout_modeler.py @@ -608,7 +608,7 @@ def test_36_import_gerber(self): ) aedb_file = os.path.join(self.local_scratch.path, generate_unique_name("gerber_out") + ".aedb") - assert self.aedtapp.import_gerber(gerber_file, aedb_path=aedb_file, control_file=control_file) + assert self.aedtapp.import_gerber(gerber_file, output_dir=aedb_file, control_file=control_file) @pytest.mark.skipif(is_linux, reason="Fails in linux") def test_37_import_gds(self): @@ -618,7 +618,7 @@ def test_37_import_gds(self): os.path.join(local_path, "../_unittest/example_models", "cad", "GDS", "gds1.tech") ) aedb_file = os.path.join(self.local_scratch.path, generate_unique_name("gds_out") + ".aedb") - assert self.aedtapp.import_gds(gds_file, aedb_path=aedb_file, control_file=control_file) + assert self.aedtapp.import_gds(gds_file, output_dir=aedb_file, control_file=control_file) @pytest.mark.skipif(is_linux, reason="Fails in linux") def test_38_import_dxf(self): @@ -626,13 +626,13 @@ def test_38_import_dxf(self): dxf_file = os.path.join(local_path, "../_unittest/example_models", "cad", "DXF", "dxf1.dxf") control_file = os.path.join(local_path, "../_unittest/example_models", "cad", "DXF", "dxf1.xml") aedb_file = os.path.join(self.local_scratch.path, "dxf_out.aedb") - assert self.aedtapp.import_gerber(dxf_file, aedb_path=aedb_file, control_file=control_file) + assert self.aedtapp.import_gerber(dxf_file, output_dir=aedb_file, control_file=control_file) def test_39_import_ipc(self): self.aedtapp.insert_design("ipc") dxf_file = os.path.join(local_path, "../_unittest/example_models", "cad", "ipc", "galileo.xml") aedb_file = os.path.join(self.local_scratch.path, "ipc_out.aedb") - assert self.aedtapp.import_ipc2581(dxf_file, aedb_path=aedb_file, control_file="") + assert self.aedtapp.import_ipc2581(dxf_file, output_dir=aedb_file, control_file="") @pytest.mark.skipif(config["desktopVersion"] < "2022.2", reason="Not working on AEDT 22R1") def test_40_test_flex(self, add_app): diff --git a/examples/01-HFSS3DLayout/Hfss3DComponent.py b/examples/01-HFSS3DLayout/Hfss3DComponent.py index cd95384f43f..439f1a35d49 100644 --- a/examples/01-HFSS3DLayout/Hfss3DComponent.py +++ b/examples/01-HFSS3DLayout/Hfss3DComponent.py @@ -198,7 +198,7 @@ h3d["len"] = str(trace_length) + "mm" h3d["w1"] = str(trace_width) + "mm" line = h3d.modeler.create_line("L1", [[0, 0], ["len", 0]], lw="w1", netname="microstrip", name="microstrip") -h3d.create_edge_port(line, h3d.modeler[line].top_edge_x, iswave=True, wave_horizontal_extension=15, ) +h3d.create_edge_port(line, h3d.modeler[line].top_edge_x, is_wave_port=True, wave_horizontal_extension=15) ############################################################################### # Create void on Ground plane for pin diff --git a/examples/04-Icepak/Icepak_ECAD_Import.py b/examples/04-Icepak/Icepak_ECAD_Import.py index bba8169068e..0fb554991e3 100644 --- a/examples/04-Icepak/Icepak_ECAD_Import.py +++ b/examples/04-Icepak/Icepak_ECAD_Import.py @@ -105,7 +105,7 @@ hfss3dLO = Hfss3dLayout('Icepak_ECAD_Import', 'PCB_temp') # adding a dummy HFSS 3D layout to the current project #edb_full_path = os.path.join(os.getcwd(), Layout_name+'.aedb\edb.def') # path to the EDB file -hfss3dLO.import_edb(def_path) # importing the EDB file +hfss3dLO.import_edb(def_path) # importing the EDB file hfss3dLO.save_project() # save the new project so files are stored in the path ipk.delete_design(name='PCB_temp', fallback_design=None) # deleting the dummy layout from the original project diff --git a/pyaedt/application/Analysis3D.py b/pyaedt/application/Analysis3D.py index 2bac5ff6b7e..2b82d312eed 100644 --- a/pyaedt/application/Analysis3D.py +++ b/pyaedt/application/Analysis3D.py @@ -1311,17 +1311,17 @@ def import_dxf( self.oeditor.ImportDXF(vArg1) return True - @pyaedt_function_handler - def import_gds_3d(self, gds_file, gds_number, unit="um", import_method=1): # pragma: no cover + @pyaedt_function_handler(gds_file="input_file", gds_number="mapping_layers", unit="units") + def import_gds_3d(self, input_file, mapping_layers, units="um", import_method=1): # pragma: no cover """Import a GDSII file. Parameters ---------- - gds_file : str + input_file : str Path to the GDS file. - gds_number : dict + mapping_layers : dict Dictionary keys are GDS layer numbers, and the value is a tuple with the thickness and elevation. - unit : string, optional + units : string, optional Length unit values. The default is ``"um"``. import_method : integer, optional GDSII import method. The default is ``1``. Options are: @@ -1346,23 +1346,23 @@ def import_gds_3d(self, gds_file, gds_number, unit="um", import_method=1): # pr >>> from pyaedt import Hfss >>> hfss = Hfss() >>> gds_number = {7: (100, 10), 9: (110, 5)} - >>> hfss.import_gds_3d(gds_path, gds_number, unit="um", import_method=1) + >>> hfss.import_gds_3d(gds_path,gds_number,units="um",import_method=1) """ if self.desktop_class.non_graphical: self.logger.error("Method is supported only in graphical mode.") return False - if not os.path.exists(gds_file): + if not os.path.exists(input_file): self.logger.error("GDSII file does not exist. No layer is imported.") return False - if len(gds_number) == 0: + if len(mapping_layers) == 0: self.logger.error("Dictionary for GDSII layer numbers is empty. No layer is imported.") return False layermap = ["NAME:LayerMap"] ordermap = [] - for i, k in enumerate(gds_number): + for i, k in enumerate(mapping_layers): layername = "signal" + str(k) layermap.append( [ @@ -1385,9 +1385,9 @@ def import_gds_3d(self, gds_file, gds_number, unit="um", import_method=1): # pr "LayerNumber:=", k, "Thickness:=", - unit_converter(gds_number[k][1], unit_system="Length", input_units=unit, output_units="meter"), + unit_converter(mapping_layers[k][1], unit_system="Length", input_units=units, output_units="meter"), "Elevation:=", - unit_converter(gds_number[k][0], unit_system="Length", input_units=unit, output_units="meter"), + unit_converter(mapping_layers[k][0], unit_system="Length", input_units=units, output_units="meter"), "Color:=", "color", ], @@ -1398,7 +1398,7 @@ def import_gds_3d(self, gds_file, gds_number, unit="um", import_method=1): # pr [ "NAME:options", "FileName:=", - gds_file, + input_file, "FlattenHierarchy:=", True, "ImportMethod:=", diff --git a/pyaedt/hfss3dlayout.py b/pyaedt/hfss3dlayout.py index d64ed420e3d..9d715adc940 100644 --- a/pyaedt/hfss3dlayout.py +++ b/pyaedt/hfss3dlayout.py @@ -168,31 +168,38 @@ def ic_mode(self): def ic_mode(self, value): self.set_oo_property_value(self.odesign, "Design Settings", "Design Mode/IC", value) - @pyaedt_function_handler() + @pyaedt_function_handler( + primivitivename="assignment", + edgenumber="edge_number", + iscircuit="is_circuit_port", + iswave="is_wave_port", + ref_primitive_name="reference_primitive", + ref_edge_number="reference_edge_number", + ) def create_edge_port( self, - primivitivename, - edgenumber, - iscircuit=False, - iswave=False, + assignment, + edge_number, + is_circuit_port=False, + is_wave_port=False, wave_horizontal_extension=5, wave_vertical_extension=3, wave_launcher="1mm", - ref_primitive_name=None, - ref_edge_number=0, + reference_primitive=None, + reference_edge_number=0, ): # type: (str | Line3dLayout,int,bool, bool,float,float, str, str, str | int) -> BoundaryObject3dLayout | bool """Create an edge port. Parameters ---------- - primivitivename : str or :class:`pyaedt.modeler.pcb.object3dlayout.Line3dLayout` + assignment : str or :class:`pyaedt.modeler.pcb.object3dlayout.Line3dLayout` Name of the primitive to create the edge port on. - edgenumber : + edge_number : Edge number to create the edge port on. - iscircuit : bool, optional + is_circuit_port : bool, optional Whether the edge port is a circuit port. The default is ``False``. - iswave : bool, optional + is_wave_port : bool, optional Whether the edge port is a wave port. The default is ``False``. wave_horizontal_extension : float, optional Horizontal port extension factor. The default is `5`. @@ -201,10 +208,10 @@ def create_edge_port( wave_launcher : str, optional PEC (perfect electrical conductor) launcher size with units. The default is `"1mm"`. - ref_primitive_name : str, optional + reference_primitive : str, optional Name of the reference primitive to place negative edge port terminal. The default is ``None``. - ref_edge_number : str, int + reference_edge_number : str, int Edge number of reference primitive. The default is ``0``. Returns @@ -217,15 +224,15 @@ def create_edge_port( >>> oEditor.CreateEdgePort """ - primivitivename = self.modeler.convert_to_selections(primivitivename, False) + assignment = self.modeler.convert_to_selections(assignment, False) listp = self.port_list self.modeler.oeditor.CreateEdgePort( [ "NAME:Contents", "edge:=", - ["et:=", "pe", "prim:=", primivitivename, "edge:=", edgenumber], + ["et:=", "pe", "prim:=", assignment, "edge:=", edge_number], "circuit:=", - iscircuit, + is_circuit_port, "btype:=", 0, ] @@ -234,14 +241,18 @@ def create_edge_port( listnew = self.port_list a = [i for i in listnew if i not in listp] - if ref_primitive_name: + if reference_primitive: self.modeler.oeditor.AddRefPort( [a[0]], - ["NAME:Contents", "edge:=", ["et:=", "pe", "prim:=", ref_primitive_name, "edge:=", ref_edge_number]], + [ + "NAME:Contents", + "edge:=", + ["et:=", "pe", "prim:=", reference_primitive, "edge:=", reference_edge_number], + ], ) if len(a) > 0: - if iswave: + if is_wave_port: self.modeler.change_property( property_object="Excitations:{}".format(a[0]), property_name="HFSS Type", @@ -278,10 +289,10 @@ def create_edge_port( else: return False - @pyaedt_function_handler() + @pyaedt_function_handler(primitive_name="assignment") def create_wave_port( self, - primivitive_name, + assignment, edge_number, wave_horizontal_extension=5, wave_vertical_extension=3, @@ -291,7 +302,7 @@ def create_wave_port( Parameters ---------- - primivitive_name : str + assignment : str Name of the primitive to create the edge port on. edge_number : int Edge number to create the edge port on. @@ -312,7 +323,7 @@ def create_wave_port( ---------- """ port_name = self.create_edge_port( - primivitive_name, + assignment, edge_number, wave_horizontal_extension=wave_horizontal_extension, wave_vertical_extension=wave_vertical_extension, @@ -328,18 +339,18 @@ def create_wave_port( else: return False - @pyaedt_function_handler() - def create_wave_port_from_two_conductors(self, primivitivenames=[""], edgenumbers=[""]): + @pyaedt_function_handler(primivitivenames="assignment", edgenumbers="edge_numbers") + def create_wave_port_from_two_conductors(self, assignment=[""], edge_numbers=[""]): """Create a wave port. Parameters ---------- - primivitivenames : list(str) + assignment : list(str) List of the primitive names to create the wave port on. The list must have two entries, one entry for each of the two conductors, or the method is not executed. - edgenumbers : + edge_numbers : List of the edge number to create the wave port on. The list must have two entries, one entry for each of the two edges, or the method is not executed. @@ -354,15 +365,15 @@ def create_wave_port_from_two_conductors(self, primivitivenames=[""], edgenumber >>> oEditor.CreateEdgePort """ - if len(primivitivenames) == 2 and len(edgenumbers) == 2: + if len(assignment) == 2 and len(edge_numbers) == 2: listp = self.port_list self.modeler.oeditor.CreateEdgePort( [ "NAME:Contents", "edge:=", - ["et:=", "pe", "prim:=", primivitivenames[0], "edge:=", edgenumbers[0]], + ["et:=", "pe", "prim:=", assignment[0], "edge:=", edge_numbers[0]], "edge:=", - ["et:=", "pe", "prim:=", primivitivenames[1], "edge:=", edgenumbers[1]], + ["et:=", "pe", "prim:=", assignment[1], "edge:=", edge_numbers[1]], "external:=", True, "btype:=", @@ -383,13 +394,13 @@ def create_wave_port_from_two_conductors(self, primivitivenames=[""], edgenumber else: return False - @pyaedt_function_handler() - def dissolve_component(self, component_name): + @pyaedt_function_handler(component_name="component") + def dissolve_component(self, component): """Dissolve a component and remove it from 3D Layout. Parameters ---------- - component_name : str + component : str Name of the component. Returns @@ -399,20 +410,20 @@ def dissolve_component(self, component_name): """ - self.oeditor.DissolveComponents(["NAME:elements", component_name]) + self.oeditor.DissolveComponents(["NAME:elements", component]) return True - @pyaedt_function_handler() + @pyaedt_function_handler(component_name="component") def create_ports_on_component_by_nets( self, - component_name, + component, nets, ): """Create the ports on a component for a list of nets. Parameters ---------- - component_name : str + component : str Component name. nets : str, list Nets to include. @@ -434,7 +445,7 @@ def create_ports_on_component_by_nets( else: nets = [nets] net_array = ["NAME:Nets"] + nets - self.oeditor.CreatePortsOnComponentsByNet(["NAME:Components", component_name], net_array, "Port", "0", "0", "0") + self.oeditor.CreatePortsOnComponentsByNet(["NAME:Components", component], net_array, "Port", "0", "0", "0") listnew = self.port_list a = [i for i in listnew if i not in listp] ports = [] @@ -446,17 +457,17 @@ def create_ports_on_component_by_nets( ports.append(bound) return ports - @pyaedt_function_handler() + @pyaedt_function_handler(component_name="component") def create_pec_on_component_by_nets( self, - component_name, + component, nets, ): """Create a PEC connection on a component for a list of nets. Parameters ---------- - component_name : str + component : str Component name. nets : str, list Nets to include. @@ -477,11 +488,11 @@ def create_pec_on_component_by_nets( else: nets = [nets] net_array = ["NAME:Nets"] + nets - self.oeditor.CreatePortsOnComponentsByNet(["NAME:Components", component_name], net_array, "PEC", "0", "0", "0") + self.oeditor.CreatePortsOnComponentsByNet(["NAME:Components", component], net_array, "PEC", "0", "0", "0") return True - @pyaedt_function_handler() - def create_differential_port(self, via_signal, via_reference, port_name, deembed=True): + @pyaedt_function_handler(port_name="name") + def create_differential_port(self, via_signal, via_reference, name, deembed=True): """Create a differential port. Parameters @@ -490,7 +501,7 @@ def create_differential_port(self, via_signal, via_reference, port_name, deembed Signal pin. via_reference : float Reference pin. - port_name : str + name : str New Port Name. deembed : bool, optional Either to deembed parasitics or not. Default is `True`. @@ -506,21 +517,21 @@ def create_differential_port(self, via_signal, via_reference, port_name, deembed >>> oEditor.CreateEdgePort """ listp = self.port_list - if port_name in self.port_list: - self.logger.error("Port already existing on via {}".format(port_name)) + if name in self.port_list: + self.logger.error("Port already existing on via {}".format(name)) return False self.oeditor.ToggleViaPin(["NAME:elements", via_signal]) listnew = self.port_list a = [i for i in listnew if i not in listp] if len(a) > 0: - self.modeler.change_property("Excitations:{}".format(a[0]), "Port", port_name, "EM Design") - self.modeler.oeditor.AssignRefPort([port_name], via_reference) + self.modeler.change_property("Excitations:{}".format(a[0]), "Port", name, "EM Design") + self.modeler.oeditor.AssignRefPort([name], via_reference) if deembed: self.modeler.change_property( - "Excitations:{}".format(port_name), "DeembedParasiticPortInductance", deembed, "EM Design" + "Excitations:{}".format(name), "DeembedParasiticPortInductance", deembed, "EM Design" ) - bound = self._update_port_info(port_name) + bound = self._update_port_info(name) if bound: self._boundaries[bound.name] = bound return bound @@ -529,13 +540,13 @@ def create_differential_port(self, via_signal, via_reference, port_name, deembed else: return False - @pyaedt_function_handler() - def create_coax_port(self, vianame, radial_extent=0.1, layer=None, alignment="lower"): + @pyaedt_function_handler(vianame="via") + def create_coax_port(self, via, radial_extent=0.1, layer=None, alignment="lower"): """Create a new coax port. Parameters ---------- - vianame : str + via : str Name of the via to create the port on. radial_extent : float Radial coax extension. @@ -555,10 +566,10 @@ def create_coax_port(self, vianame, radial_extent=0.1, layer=None, alignment="lo >>> oEditor.CreateEdgePort """ listp = self.port_list - if vianame in self.port_list: - self.logger.error("Port already existing on via {}".format(vianame)) + if via in self.port_list: + self.logger.error("Port already existing on via {}".format(via)) return False - self.oeditor.ToggleViaPin(["NAME:elements", vianame]) + self.oeditor.ToggleViaPin(["NAME:elements", via]) listnew = self.port_list a = [i for i in listnew if i not in listp] @@ -582,24 +593,24 @@ def create_coax_port(self, vianame, radial_extent=0.1, layer=None, alignment="lo else: return False - @pyaedt_function_handler() - def create_pin_port(self, name, xpos=0, ypos=0, rotation=0, top_layer=None, bot_layer=None): + @pyaedt_function_handler(xpos="x", ypos="y", bot_layer="bottom_layer") + def create_pin_port(self, name, x=0, y=0, rotation=0, top_layer=None, bottom_layer=None): """Create a pin port. Parameters ---------- name : str Name of the pin port. - xpos : float, optional + x : float, optional X-axis position of the pin. The default is ``0``. - ypos : float, optional + y : float, optional Y-axis position of the pin. The default is ``0``. rotation : float, optional Rotation of the pin in degrees. The default is ``0``. top_layer : str, optional Top layer of the pin. The default is ``None``, in which case the top layer is assigned automatically. - bot_layer : str + bottom_layer : str Bottom layer of the pin. The default is ``None``, in which case the bottom layer is assigned automatically. @@ -617,8 +628,8 @@ def create_pin_port(self, name, xpos=0, ypos=0, rotation=0, top_layer=None, bot_ layers = self.modeler.layers.all_signal_layers if not top_layer: top_layer = layers[0].name - if not bot_layer: - bot_layer = layers[len(layers) - 1].name + if not bottom_layer: + bottom_layer = layers[len(layers) - 1].name self.modeler.oeditor.CreatePin( [ "NAME:Contents", @@ -626,7 +637,7 @@ def create_pin_port(self, name, xpos=0, ypos=0, rotation=0, top_layer=None, bot_ "ReferencedPadstack:=", "Padstacks:NoPad SMT East", "vposition:=", - ["x:=", str(xpos) + self.modeler.model_units, "y:=", str(ypos) + self.modeler.model_units], + ["x:=", str(x) + self.modeler.model_units, "y:=", str(y) + self.modeler.model_units], "vrotation:=", [str(rotation) + "deg"], "overrides hole:=", @@ -638,7 +649,7 @@ def create_pin_port(self, name, xpos=0, ypos=0, rotation=0, top_layer=None, bot_ "highest_layer:=", top_layer, "lowest_layer:=", - bot_layer, + bottom_layer, ] ) bound = self._update_port_info(name) @@ -648,13 +659,13 @@ def create_pin_port(self, name, xpos=0, ypos=0, rotation=0, top_layer=None, bot_ else: return False - @pyaedt_function_handler() - def delete_port(self, portname): + @pyaedt_function_handler(portname="name") + def delete_port(self, name): """Delete a port. Parameters ---------- - portname : str + name : str Name of the port. Returns @@ -667,19 +678,19 @@ def delete_port(self, portname): >>> oModule.Delete """ - self.oexcitation.Delete(portname) + self.oexcitation.Delete(name) for bound in self.boundaries: - if bound.name == portname: + if bound.name == name: self.boundaries.remove(bound) return True - @pyaedt_function_handler() - def import_edb(self, edb_full_path): + @pyaedt_function_handler(edb_full_path="input_folder") + def import_edb(self, input_folder): """Import EDB. Parameters ---------- - edb_full_path : str + input_folder : str Full path to EDB. Returns @@ -692,24 +703,24 @@ def import_edb(self, edb_full_path): >>> oModule.ImportEDB """ - if "edb.def" not in edb_full_path: - edb_full_path = os.path.join(edb_full_path, "edb.def") - self.oimport_export.ImportEDB(edb_full_path) + if "edb.def" not in input_folder: + input_folder = os.path.join(input_folder, "edb.def") + self.oimport_export.ImportEDB(input_folder) self._close_edb() project_name = self.odesktop.GetActiveProject().GetName() design_name = self.odesktop.GetActiveProject().GetActiveDesign().GetName().split(";")[-1] self.__init__(projectname=project_name, designname=design_name) return True - @pyaedt_function_handler() - def validate_full_design(self, name=None, outputdir=None, ports=None): + @pyaedt_function_handler(outputdir="output_dir") + def validate_full_design(self, name=None, output_dir=None, ports=None): """Validate the design based on the expected value and save the information in the log file. Parameters ---------- name : str, optional Name of the design to validate. The default is ``None``. - outputdir : str, optional + output_dir : str, optional Output directory to save the log file to. The default is ``None``, in which case the file is exported to the working directory. @@ -728,8 +739,8 @@ def validate_full_design(self, name=None, outputdir=None, ports=None): """ if name is None: name = self.design_name - if outputdir is None: - outputdir = self.working_directory + if output_dir is None: + output_dir = self.working_directory self.logger.info("#### Design Validation Checks###") # @@ -743,7 +754,7 @@ def validate_full_design(self, name=None, outputdir=None, ports=None): # The design validation inside HFSS outputs to a separate log file which we merge into this overall file # val_list = [] - all_validate = outputdir + "\\all_validation.log" + all_validate = output_dir + "\\all_validation.log" with open_file(all_validate, "w") as validation: # Desktop Messages msg = "Desktop Messages:" @@ -802,15 +813,15 @@ def validate_full_design(self, name=None, outputdir=None, ports=None): validation.close() return val_list, validation_ok # return all the info in a list for use later - @pyaedt_function_handler() + @pyaedt_function_handler(plot_name="plot") def create_scattering( - self, plot_name="S Parameter Plot Nominal", sweep_name=None, port_names=None, port_excited=None, variations=None + self, plot="S Parameter Plot Nominal", sweep_name=None, port_names=None, port_excited=None, variations=None ): """Create a scattering report. Parameters ---------- - plot_name : str, optional + plot : str, optional Name of the plot. The default is ``"S Parameter Plot Nominal"``. sweep_name : str, optional Name of the sweep. The default is ``None``. @@ -842,11 +853,11 @@ def create_scattering( port_excited = port_names traces = ["dB(S(" + p + "," + q + "))" for p, q in zip(list(port_names), list(port_excited))] return self.post.create_report( - traces, sweep_name, variations=variations, report_category=solution_data, plot_name=plot_name + traces, sweep_name, variations=variations, report_category=solution_data, plot_name=plot ) - @pyaedt_function_handler() - def set_export_touchstone(self, activate, export_dir=""): + @pyaedt_function_handler(export_dir="output_dir") + def set_export_touchstone(self, activate, output_dir=""): """Export the Touchstone file automatically if the simulation is successful. Parameters @@ -872,7 +883,7 @@ def set_export_touchstone(self, activate, export_dir=""): settings.append("ExportAfterSolve:=") settings.append(True) settings.append("ExportDir:=") - settings.append(export_dir) + settings.append(output_dir) elif not activate: settings.append("NAME:options") settings.append("ExportAfterSolve:=") @@ -1255,16 +1266,18 @@ def _import_cad( self.odesktop.CloseProject(active_project) return True - @pyaedt_function_handler() - def import_gds(self, gds_path, aedb_path=None, control_file=None, set_as_active=True, close_active_project=False): + @pyaedt_function_handler(gds_path="input_file", aedb_path="output_dir") + def import_gds( + self, input_file, output_dir=None, control_file=None, set_as_active=True, close_active_project=False + ): """Import a GDS file into HFSS 3D Layout and assign the stackup from an XML file if present. Parameters ---------- - gds_path : str + input_file : str Full path to the GDS file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` control_file : str, optional Path to the XML or TECH file with the stackup information. The default is ``None``, in which case the stackup is not edited. @@ -1285,18 +1298,20 @@ def import_gds(self, gds_path, aedb_path=None, control_file=None, set_as_active= >>> oModule.ImportGDSII """ - return self._import_cad(gds_path, "gds", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "gds", output_dir, control_file, set_as_active, close_active_project) - @pyaedt_function_handler() - def import_dxf(self, dxf_path, aedb_path=None, control_file=None, set_as_active=True, close_active_project=False): + @pyaedt_function_handler(dxf_path="input_file", aedb_path="output_dir") + def import_dxf( + self, input_file, output_dir=None, control_file=None, set_as_active=True, close_active_project=False + ): """Import a DXF file into HFSS 3D Layout and assign the stackup from an XML file if present. Parameters ---------- - dxf_path : str + input_file : str Full path to the DXF file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` control_file : str, optional Path to the XML or TECH file with the stackup information. The default is ``None``, in which case the stackup is not edited. @@ -1317,20 +1332,20 @@ def import_dxf(self, dxf_path, aedb_path=None, control_file=None, set_as_active= >>> oModule.ImportDXF """ - return self._import_cad(dxf_path, "dxf", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "dxf", output_dir, control_file, set_as_active, close_active_project) - @pyaedt_function_handler() + @pyaedt_function_handler(gerber_path="input_file", aedb_path="output_dir") def import_gerber( - self, gerber_path, aedb_path=None, control_file=None, set_as_active=True, close_active_project=False + self, input_file, output_dir=None, control_file=None, set_as_active=True, close_active_project=False ): """Import a Gerber zip file into HFSS 3D Layout and assign the stackup from an XML file if present. Parameters ---------- - gerber_path : str + input_file : str Full path to the Gerber zip file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` control_file : str, optional Path to the XML file with the stackup information. The default is ``None``, in which case the stackup is not edited. @@ -1349,11 +1364,11 @@ def import_gerber( >>> oModule.ImportGerber """ - return self._import_cad(gerber_path, "gerber", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "gerber", output_dir, control_file, set_as_active, close_active_project) - @pyaedt_function_handler() + @pyaedt_function_handler(aedb_path="output_dir") def import_brd( - self, input_file, aedb_path=None, set_as_active=True, close_active_project=False, control_file=None + self, input_file, output_dir=None, set_as_active=True, close_active_project=False, control_file=None ): # pragma: no cover """Import a board file into HFSS 3D Layout and assign the stackup from an XML file if present. @@ -1361,8 +1376,8 @@ def import_brd( ---------- input_file : str Full path to the board file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` set_as_active : bool, optional Whether to set the board file as active. The default is ``True``. close_active_project : bool, optional @@ -1382,11 +1397,11 @@ def import_brd( >>> oModule.ImportExtracta """ - return self._import_cad(input_file, "brd", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "brd", output_dir, control_file, set_as_active, close_active_project) - @pyaedt_function_handler() + @pyaedt_function_handler(aedb_path="output_dir") def import_awr( - self, input_file, aedb_path=None, control_file=None, set_as_active=True, close_active_project=False + self, input_file, output_dir=None, control_file=None, set_as_active=True, close_active_project=False ): # pragma: no cover """Import an AWR Microwave Office file into HFSS 3D Layout and assign the stackup from an XML file if present. @@ -1394,8 +1409,8 @@ def import_awr( ---------- input_file : str Full path to the AWR Microwave Office file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` control_file : str, optional Path to the XML file with the stackup information. The default is ``None``, in which case the stackup is not edited. @@ -1414,11 +1429,11 @@ def import_awr( >>> oModule.ImportAWRMicrowaveOffice """ - return self._import_cad(input_file, "awr", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "awr", output_dir, control_file, set_as_active, close_active_project) - @pyaedt_function_handler() + @pyaedt_function_handler(aedb_path="output_dir") def import_ipc2581( - self, input_file, aedb_path=None, control_file=None, set_as_active=True, close_active_project=False + self, input_file, output_dir=None, control_file=None, set_as_active=True, close_active_project=False ): """Import an IPC2581 file into HFSS 3D Layout and assign the stackup from an XML file if present. @@ -1426,8 +1441,8 @@ def import_ipc2581( ---------- input_file : str Full path to the IPC2581 file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` control_file : str, optional Path to the XML file with the stackup information. The default is ``None``, in which case the stackup is not edited. @@ -1446,18 +1461,20 @@ def import_ipc2581( >>> oModule.ImportAWRMicrowaveOffice """ - return self._import_cad(input_file, "ipc2581", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "ipc2581", output_dir, control_file, set_as_active, close_active_project) - @pyaedt_function_handler() - def import_odb(self, input_file, aedb_path=None, control_file=None, set_as_active=True, close_active_project=False): + @pyaedt_function_handler(aedb_path="output_dir") + def import_odb( + self, input_file, output_dir=None, control_file=None, set_as_active=True, close_active_project=False + ): """Import an ODB++ file into HFSS 3D Layout and assign the stackup from an XML file if present. Parameters ---------- input_file : str Full path to the ODB++ file. - aedb_path : str, optional - Full path to the AEDB file. + output_dir : str, optional + Full path to the AEDB folder. Example ``"c:\\temp\\test.aedb"`` control_file : str, optional Path to the XML file with the stackup information. The default is ``None``, in which case the stackup is not edited. @@ -1476,7 +1493,7 @@ def import_odb(self, input_file, aedb_path=None, control_file=None, set_as_activ >>> oModule.ImportAWRMicrowaveOffice """ - return self._import_cad(input_file, "odb++", aedb_path, control_file, set_as_active, close_active_project) + return self._import_cad(input_file, "odb++", output_dir, control_file, set_as_active, close_active_project) @pyaedt_function_handler() def edit_cosim_options( @@ -1739,8 +1756,8 @@ def get_differential_pairs(self): return list_output - @pyaedt_function_handler() - def load_diff_pairs_from_file(self, filename): + @pyaedt_function_handler(filename="input_file") + def load_diff_pairs_from_file(self, input_file): # type: (str) -> bool """Load differtential pairs definition from file. @@ -1750,7 +1767,7 @@ def load_diff_pairs_from_file(self, filename): Parameters ---------- - filename : str + input_file : str Fully qualified name of the file containing the differential pairs definition. Returns @@ -1762,12 +1779,12 @@ def load_diff_pairs_from_file(self, filename): ---------- >>> oModule.LoadDiffPairsFromFile """ - if not os.path.isfile(filename): # pragma: no cover - raise ValueError("{}: unable to find the specified file.".format(filename)) + if not os.path.isfile(input_file): # pragma: no cover + raise ValueError("{}: unable to find the specified file.".format(input_file)) try: - new_file = os.path.join(os.path.dirname(filename), generate_unique_name("temp") + ".txt") - with open_file(filename, "r") as file: + new_file = os.path.join(os.path.dirname(input_file), generate_unique_name("temp") + ".txt") + with open_file(input_file, "r") as file: filedata = file.read().splitlines() with io.open(new_file, "w", newline="\n") as fh: for line in filedata: @@ -1779,8 +1796,8 @@ def load_diff_pairs_from_file(self, filename): return False return True - @pyaedt_function_handler() - def save_diff_pairs_to_file(self, filename): + @pyaedt_function_handler(filename="input_file") + def save_diff_pairs_to_file(self, input_file): # type: (str) -> bool """Save differtential pairs definition to a file. @@ -1788,7 +1805,7 @@ def save_diff_pairs_to_file(self, filename): Parameters ---------- - filename : str + input_file : str Fully qualified name of the file containing the differential pairs definition. Returns @@ -1800,17 +1817,17 @@ def save_diff_pairs_to_file(self, filename): ---------- >>> oModule.SaveDiffPairsToFile """ - self.oexcitation.SaveDiffPairsToFile(filename) + self.oexcitation.SaveDiffPairsToFile(input_file) - return os.path.isfile(filename) + return os.path.isfile(input_file) - @pyaedt_function_handler() - def export_3d_model(self, file_name=None): + @pyaedt_function_handler(file_name="output_file") + def export_3d_model(self, output_file=None): """Export the Ecad model to a 3D file. Parameters ---------- - file_name : str, optional + output_file : str, optional Full name of the file to export. The default is None, in which case the file name is set to the design name and saved as a SAT file in the working directory. Extensions available are ``"sat"``, ``"sab"``, and ``"sm3"`` up to AEDT 2022R2 and @@ -1821,16 +1838,16 @@ def export_3d_model(self, file_name=None): str File name if successful. """ - if not file_name: + if not output_file: if settings.aedt_version > "2022.2": - file_name = os.path.join(self.working_directory, self.design_name + ".x_t") - self.modeler.oeditor.ExportCAD(["NAME:options", "FileName:=", file_name]) + output_file = os.path.join(self.working_directory, self.design_name + ".x_t") + self.modeler.oeditor.ExportCAD(["NAME:options", "FileName:=", output_file]) else: - file_name = os.path.join(self.working_directory, self.design_name + ".sat") - self.modeler.oeditor.ExportAcis(["NAME:options", "FileName:=", file_name]) + output_file = os.path.join(self.working_directory, self.design_name + ".sat") + self.modeler.oeditor.ExportAcis(["NAME:options", "FileName:=", output_file]) - return file_name + return output_file @pyaedt_function_handler() def enable_rigid_flex(self): @@ -1850,7 +1867,7 @@ def enable_rigid_flex(self): return True return True if self.variable_manager["BendModel"].expression == "1" else False - @pyaedt_function_handler + @pyaedt_function_handler() def edit_hfss_extents( self, diel_extent_type=None, @@ -1964,11 +1981,11 @@ def get_model_from_mesh_results(self, binary=True): return out_files[0] return "" - @pyaedt_function_handler() + @pyaedt_function_handler(source_name="source", file_name="input_file") def edit_source_from_file( self, - source_name, - file_name, + source, + input_file, is_time_domain=True, x_scale=1, y_scale=1, @@ -1983,9 +2000,9 @@ def edit_source_from_file( Parameters ---------- - source_name : str + source : str Source Name. - file_name : str + input_file : str Full name of the input file. is_time_domain : bool, optional Either if the input data is Time based or Frequency Based. Frequency based data are Mag/Phase (deg). @@ -2011,7 +2028,7 @@ def edit_source_from_file( """ out = "Voltage" freq, mag, phase = parse_excitation_file( - file_name=file_name, + file_name=input_file, is_time_domain=is_time_domain, x_scale=x_scale, y_scale=y_scale, @@ -2020,8 +2037,8 @@ def edit_source_from_file( encoding=encoding, out_mag=out, ) - ds_name_mag = "ds_" + source_name.replace(":", "_mode_") + "_Mag" - ds_name_phase = "ds_" + source_name.replace(":", "_mode_") + "_Angle" + ds_name_mag = "ds_" + source.replace(":", "_mode_") + "_Mag" + ds_name_phase = "ds_" + source.replace(":", "_mode_") + "_Angle" if self.dataset_exists(ds_name_mag, False): self.design_datasets[ds_name_mag].x = freq self.design_datasets[ds_name_mag].y = mag @@ -2036,7 +2053,7 @@ def edit_source_from_file( else: self.create_dataset1d_design(ds_name_phase, freq, phase, xunit="Hz", yunit="deg") for p in self.boundaries: - if p.name == source_name: + if p.name == source: str_val = ["TotalVoltage"] if incident_voltage: str_val = ["IncidentVoltage"] @@ -2045,9 +2062,9 @@ def edit_source_from_file( self.oboundary.EditExcitations( [ "NAME:Excitations", - [source_name, "pwl({}, Freq)".format(ds_name_mag), "pwl({}, Freq)".format(ds_name_phase)], + [source, "pwl({}, Freq)".format(ds_name_mag), "pwl({}, Freq)".format(ds_name_phase)], ], - ["NAME:Terminations", [source_name, False, str(impedance) + "ohm", "0ohm"]], + ["NAME:Terminations", [source, False, str(impedance) + "ohm", "0ohm"]], ",".join(str_val), [], )