cvideo_data.pio

;
; Title:	        Pico-mposite PIO code 
; Description:		Generate a burst of pixels to inject into the PAL(ish) video sync scaffold
; Author:	        Dean Belfield
; Created:	        31/01/2021
; Last Updated:	    26/09/2024
;
; Modinfo:
; 01/02/2022:		Tweaked comments
; 04/02/2022:       Border colour reset improved
; 07/02/2022:       Added wrap back in
; 24/02/2022:       Removed sm_config_set_set_pins and sm_config_set_in_pins
; 26/09/2024:		Set input pins for non-zero pin_base

.program cvideo_data

.wrap_target

    wait 1 irq 4            ; Wait for IRQ 4 from cvideo_sync
    mov Y, pins             ; The GPIO pins are still set to border colour, so store that in Y

 loop:
    out X, 8				; Get 8 bits from DMA via Output Shift Register (OSR) to X
    mov pins, X				; Move X to pins as set up in cvideo_initialise_pio
    jmp !OSRE loop  		; Loop unti no more pixel data
    mov pins, Y				; Reset the border colour
    irq set 0				; Trigger the PIO interrupt to set up the DMA for the next scanline

.wrap						; Loop back to wrap_target

% c-sdk {
//
// Initialise the PIO
// Parameters:
// - pio: The PIO to attach this to
// - sm: The state machine number
// - offset: The instruction memory offset the program is loaded at
// - pin_base: The number of the first GPIO pin to use in the PIO
// - pin_count: The number of consecutive GPIO pins to write to
// - freq: The frequency of the PIO state machine
// 
void cvideo_data_initialise_pio(PIO pio, uint sm, uint offset, uint pin_base, uint pin_count, double freq) {
    for(uint i=pin_base; i<pin_base+pin_count; i++) {
        pio_gpio_init(pio, i);
    }
    pio_sm_set_consecutive_pindirs(pio, sm, pin_base, pin_count, true);
    pio_sm_config c = cvideo_data_program_get_default_config(offset);
    sm_config_set_out_pins(&c, pin_base, pin_count);
    sm_config_set_in_pins(&c, pin_base);
    sm_config_set_out_shift(&c, false, true, 8);
    pio_sm_init(pio, sm, offset, &c);
    pio->sm[sm].clkdiv = (uint32_t) (freq * (1 << 16));
}
%}