From c9217c1ef37e43d0a62cba4fffd0ea13b86670f3 Mon Sep 17 00:00:00 2001
From: Andelf <andelf@gmail.com>
Date: Sun, 5 May 2024 13:39:54 +0800
Subject: [PATCH] fix(v0): flash latency when init rcc

---
 src/rcc/v0.rs | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/rcc/v0.rs b/src/rcc/v0.rs
index d951070..583f881 100644
--- a/src/rcc/v0.rs
+++ b/src/rcc/v0.rs
@@ -4,9 +4,9 @@ use crate::pac::rcc::vals::{Hpre as AHBPrescaler, Pllsrc as PllSource, Ppre as A
 use crate::pac::{AFIO, FLASH, RCC};
 use crate::time::Hertz;
 
-const HSI_FREQUENCY: Hertz = Hertz(24_000_000);
+pub const HSI_FREQUENCY: Hertz = Hertz(24_000_000);
 
-const LSI_FREQUENCY: Hertz = Hertz(128_000);
+pub const LSI_FREQUENCY: Hertz = Hertz(128_000);
 
 #[derive(Clone, Copy, PartialEq, Debug)]
 pub enum HseMode {
@@ -126,6 +126,10 @@ pub(crate) unsafe fn init(config: Config) {
         _ => unreachable!(),
     };
 
+    if sysclk >= 24_000_000 {
+        FLASH.actlr().modify(|w| w.set_latency(0b01)); // 1 等待（24MHz<HCLK≤48MHz）
+    }
+
     RCC.cfgr0().modify(|w| {
         w.set_hpre(config.ahb_pre);
         w.set_ppre2(config.apb2_pre); // FIXME: this is undocumented, only for ADC2?