PCH_CODE_PREFIX = 'PCH_'
-
-[docs]
-class Cfg:
+[docs]class Cfg:
def __init__(self):
self.logger = logger()
self.CONFIG_PCI = {}
@@ -132,9 +132,7 @@ Source code for chipsec.config
###
# PCI device tree enumeration
###
-
-[docs]
- def set_pci_data(self, enum_devices):
+[docs] def set_pci_data(self, enum_devices):
if not hasattr(self, 'CONFIG_PCI_RAW'):
setattr(self, 'CONFIG_PCI_RAW', {})
for b, d, f, vid, did, rid in enum_devices:
@@ -154,50 +152,32 @@ Source code for chipsec.config
elif b not in self.CONFIG_PCI_RAW[vid_str][did_str]['bus']:
self.CONFIG_PCI_RAW[vid_str][did_str]['bus'].append(b)
-
###
# Platform detection functions
###
-
-[docs]
- def get_chipset_code(self):
+
-
-
-[docs]
- def get_pch_code(self):
+
-
-
-[docs]
- def is_pch_req(self):
+
-
-
-[docs]
- def print_platform_info(self):
+[docs] def print_platform_info(self):
self.logger.log(f"Platform: {self.longname}")
self.logger.log(f'\tCPUID: {self.cpuid:X}')
self.logger.log(f"\tVID: {self.vid:04X}")
self.logger.log(f"\tDID: {self.did:04X}")
self.logger.log(f"\tRID: {self.rid:02X}")
-
-
-[docs]
- def print_pch_info(self):
+[docs] def print_pch_info(self):
self.logger.log(f"Platform: {self.pch_longname}")
self.logger.log(f"\tVID: {self.pch_vid:04X}")
self.logger.log(f"\tDID: {self.pch_did:04X}")
self.logger.log(f"\tRID: {self.pch_rid:02X}")
-
-
-[docs]
- def print_supported_chipsets(self):
+[docs] def print_supported_chipsets(self):
fmtStr = " {:4} | {:4} | {:14} | {:6} | {:40}"
self.logger.log("\nSupported platforms:\n")
self.logger.log(fmtStr.format("VID", "DID", "Name", "Code", "Long Name"))
@@ -207,7 +187,6 @@ Source code for chipsec.config
for item in self.proc_dictionary[_vid][_did]:
self.logger.log(fmtStr.format(_vid, _did, item['name'], item['code'].lower(), item['longname'][:40]))
-
###
# Private config functions
###
@@ -314,9 +293,7 @@ Source code for chipsec.config
###
# Config loading functions
###
-
-[docs]
- def load_parsers(self):
+[docs] def load_parsers(self):
parser_path = os.path.join(get_main_dir(), 'chipsec', 'cfg', 'parsers')
if not os.path.isdir(parser_path):
raise CSConfigError('Unable to locate configuration parsers: {}'.format(parser_path))
@@ -342,10 +319,7 @@ Source code for chipsec.config
parser_obj.startup()
self.parsers.append(parser_obj)
-
-
-[docs]
- def add_extra_configs(self, path, filename=None, loadnow=False):
+[docs] def add_extra_configs(self, path, filename=None, loadnow=False):
config_path = os.path.join(get_main_dir(), 'chipsec', 'cfg', path)
if os.path.isdir(config_path) and filename is None:
self.load_extra = [config_data(None, None, os.path.join(config_path, f)) for f in sorted(os.listdir(config_path))
@@ -358,10 +332,7 @@ Source code for chipsec.config
if loadnow and self.load_extra:
self._load_sec_configs(self.load_extra, Stage.EXTRA)
-
-
-[docs]
- def load_platform_info(self):
+[docs] def load_platform_info(self):
tag_handlers = self._get_stage_parsers(Stage.GET_INFO)
cfg_path = os.path.join(get_main_dir(), 'chipsec', 'cfg')
@@ -392,10 +363,7 @@ Source code for chipsec.config
for pc in self.pch_codes:
globals()["PCH_CODE_{}".format(pc[4:].upper())] = pc.upper()
-
-
-[docs]
- def platform_detection(self, proc_code, pch_code, cpuid):
+[docs] def platform_detection(self, proc_code, pch_code, cpuid):
# Detect processor files
self.cpuid = cpuid
sku = self._find_sku_data(self.proc_dictionary, proc_code, cpuid)
@@ -432,10 +400,7 @@ Source code for chipsec.config
if 'devices' in self.platform_xml_files:
self.load_list.extend(self.platform_xml_files['devices'])
-
-
-[docs]
- def load_platform_config(self):
+[docs] def load_platform_config(self):
sec_load_list = []
tag_handlers = self._get_stage_parsers(Stage.DEVICE_CFG)
for fxml in self.load_list:
@@ -450,10 +415,7 @@ Source code for chipsec.config
if self.load_extra:
self._load_sec_configs(self.load_extra, Stage.EXTRA)
-
-
-[docs]
- def get_common_xml(self):
+[docs] def get_common_xml(self):
cfg_path = os.path.join(get_main_dir(), 'chipsec', 'cfg')
vid = f'{self.vid:X}'
@@ -465,9 +427,7 @@ Source code for chipsec.config
cfg_files.extend([config_data(vid, None, os.path.join(root_path, f))
for f in sorted(os.listdir(root_path))
if fnmatch(f, '*.xml') and fnmatch(f, 'common*')])
- return cfg_files
-
-
+ return cfg_files
@@ -527,7 +487,7 @@ Quick search
-
+
@@ -547,8 +507,8 @@ Navigation
\ No newline at end of file
diff --git a/_modules/chipsec/fuzzing/primitives.html b/_modules/chipsec/fuzzing/primitives.html
index 255eacfc..dc3a12a1 100644
--- a/_modules/chipsec/fuzzing/primitives.html
+++ b/_modules/chipsec/fuzzing/primitives.html
@@ -1,18 +1,20 @@
+
-
+
chipsec.fuzzing.primitives — CHIPSEC documentation
-
-
+
+
-
-
-
+
+
+
+
-
+
@@ -44,10 +46,8 @@ Source code for chipsec.fuzzing.primitives
########################################################################################################################
-
-[docs]
-class base_primitive:
- '''
+[docs]class base_primitive:
+ '''
The primitive base class implements common functionality shared across most primitives.
'''
@@ -60,10 +60,8 @@ Source code for chipsec.fuzzing.primitives
self.rendered = "" # rendered value of primitive.
self.value = None # current value of primitive.
-
-[docs]
- def exhaust(self):
- '''
+[docs] def exhaust(self):
+ '''
Exhaust the possible mutations for this primitive.
@rtype: Integer
@@ -78,11 +76,8 @@ Source code for chipsec.fuzzing.primitives
return num
-
-
-[docs]
- def mutate(self):
- '''
+[docs] def mutate(self):
+ '''
Mutate the primitive by stepping through the fuzz library, return False on completion.
@rtype: Boolean
@@ -106,11 +101,8 @@ Source code for chipsec.fuzzing.primitives
return True
-
-
-[docs]
- def num_mutations(self):
- '''
+[docs] def num_mutations(self):
+ '''
Calculate and return the total number of mutations for this individual primitive.
@rtype: Integer
@@ -119,38 +111,28 @@ Source code for chipsec.fuzzing.primitives
return len(self.fuzz_library)
-
-
-[docs]
- def render(self):
- '''
+[docs] def render(self):
+ '''
Nothing fancy on render, simply return the value.
'''
self.rendered = self.value
return self.rendered
-
-
-[docs]
- def reset(self):
- '''
+[docs] def reset(self):
+ '''
Reset this primitive to the starting mutation state.
'''
self.fuzz_complete = False
self.mutant_index = 0
- self.value = self.original_value
-
-
+ self.value = self.original_value
########################################################################################################################
-
-[docs]
-class delim(base_primitive):
+[docs]class delim(base_primitive):
def __init__(self, value, fuzzable=True, name=None):
- '''
+ '''
Represent a delimiter such as :,\r,\n, ,=,>,< etc... Mutations include repetition, substitution and exclusion.
@type value: Character
@@ -229,13 +211,10 @@ Source code for chipsec.fuzzing.primitives
self.fuzz_library.append("\r\n" * 512)
-
########################################################################################################################
-
-[docs]
-class group(base_primitive):
+[docs]class group(base_primitive):
def __init__(self, name, values):
- '''
+ '''
This primitive represents a list of static values, stepping through each one on mutation. You can tie a block
to a group primitive to specify that the block should cycle through all possible mutations for *each* value
within the group. The group primitive is useful for example for representing a list of valid opcodes.
@@ -259,10 +238,8 @@ Source code for chipsec.fuzzing.primitives
for val in self.values:
assert isinstance(val, str), "Value list may only contain strings or raw data"
-
-[docs]
- def mutate(self):
- '''
+[docs] def mutate(self):
+ '''
Move to the next item in the values list.
@rtype: False
@@ -285,28 +262,21 @@ Source code for chipsec.fuzzing.primitives
return True
-
-
-[docs]
- def num_mutations(self):
- '''
+[docs] def num_mutations(self):
+ '''
Number of values in this primitive.
@rtype: Integer
@return: Number of values in this primitive.
'''
- return len(self.values)
-
-
+ return len(self.values)
########################################################################################################################
-
-[docs]
-class random_data(base_primitive):
+[docs]class random_data(base_primitive):
def __init__(self, value, min_length, max_length, max_mutations=25, fuzzable=True, step=None, name=None):
- '''
+ '''
Generate a random chunk of data while maintaining a copy of the original. A random length range can be specified.
For a static length, set min/max length to be the same.
@@ -340,10 +310,8 @@ Source code for chipsec.fuzzing.primitives
if self.step:
self.max_mutations = (self.max_length - self.min_length) // self.step + 1
-
-[docs]
- def mutate(self):
- '''
+[docs] def mutate(self):
+ '''
Mutate the primitive value returning False on completion.
@rtype: Boolean
@@ -376,28 +344,21 @@ Source code for chipsec.fuzzing.primitives
return True
-
-
-[docs]
- def num_mutations(self):
- '''
+[docs] def num_mutations(self):
+ '''
Calculate and return the total number of mutations for this individual primitive.
@rtype: Integer
@return: Number of mutated forms this primitive can take
'''
- return self.max_mutations
-
-
+ return self.max_mutations
########################################################################################################################
-
-[docs]
-class static(base_primitive):
+[docs]class static(base_primitive):
def __init__(self, value, name=None):
- '''
+ '''
Primitive that contains static content.
@type value: Raw
@@ -413,10 +374,8 @@ Source code for chipsec.fuzzing.primitives
self.s_type = "static" # for ease of object identification
self.fuzz_complete = True
-
########################################################################################################################
-
-[docs]
-class string(base_primitive):
+[docs]class string(base_primitive):
# store fuzz_library as a class variable to avoid copying the ~70MB structure across each instantiated primitive.
fuzz_library = []
def __init__(self, value, size=-1, padding="\x00", encoding="ascii", fuzzable=True, max_len=0, name=None):
- '''
+ '''
Primitive that cycles through a library of "bad" strings. The class variable 'fuzz_library' contains a list of
smart fuzz values global across all instances. The 'this_library' variable contains fuzz values specific to
the instantiated primitive. This allows us to avoid copying the near ~70MB fuzz_library data structure across
@@ -616,10 +568,8 @@ Source code for chipsec.fuzzing.primitives
if any(len(s) > max_len for s in self.fuzz_library):
self.fuzz_library = list(set([s[:max_len] for s in self.fuzz_library]))
-
-[docs]
- def add_long_strings(self, sequence):
- '''
+[docs] def add_long_strings(self, sequence):
+ '''
Given a sequence, generate a number of selectively chosen strings lengths of the given sequence and add to the
string heuristic library.
@@ -634,11 +584,8 @@ Source code for chipsec.fuzzing.primitives
long_string = sequence * length
string.fuzz_library.append(long_string)
-
-
-[docs]
- def mutate(self):
- '''
+[docs] def mutate(self):
+ '''
Mutate the primitive by stepping through the fuzz library extended with the "this" library, return False on
completion.
@@ -679,11 +626,8 @@ Source code for chipsec.fuzzing.primitives
return True
-
-
-[docs]
- def num_mutations(self):
- '''
+[docs] def num_mutations(self):
+ '''
Calculate and return the total number of mutations for this individual primitive.
@rtype: Integer
@@ -692,11 +636,8 @@ Source code for chipsec.fuzzing.primitives
return len(self.fuzz_library) + len(self.this_library)
-
-
-[docs]
- def render(self):
- '''
+[docs] def render(self):
+ '''
Render the primitive, encode the string according to the specified encoding.
'''
@@ -706,17 +647,13 @@ Source code for chipsec.fuzzing.primitives
except:
self.rendered = str(self.value).encode('latin-1')
- return self.rendered
-
-
+ return self.rendered
########################################################################################################################
-
-[docs]
-class bit_field(base_primitive):
+[docs]class bit_field(base_primitive):
def __init__(self, value, width, max_num=None, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
- '''
+ '''
The bit field primitive represents a number of variable length and is used to define all other integer types.
@type value: Integer
@@ -801,10 +738,8 @@ Source code for chipsec.fuzzing.primitives
except:
pass
-
-[docs]
- def add_integer_boundaries(self, integer):
- '''
+[docs] def add_integer_boundaries(self, integer):
+ '''
Add the supplied integer and border cases to the integer fuzz heuristics library.
@type integer: Int
@@ -819,11 +754,8 @@ Source code for chipsec.fuzzing.primitives
if case not in self.fuzz_library:
self.fuzz_library.append(case)
-
-
-[docs]
- def render(self):
- '''
+[docs] def render(self):
+ '''
Render the primitive.
'''
@@ -876,11 +808,8 @@ Source code for chipsec.fuzzing.primitives
self.rendered = "%d" % self.value
return self.rendered
-
-
-[docs]
- def to_binary(self, number=None, bit_count=None):
- '''
+[docs] def to_binary(self, number=None, bit_count=None):
+ '''
Convert a number to a binary string.
@type number: Integer
@@ -907,11 +836,8 @@ Source code for chipsec.fuzzing.primitives
return "".join(map(lambda x: str((number >> x) & 1), range(bit_count - 1, -1, -1)))
-
-
-[docs]
- def to_decimal(self, binary):
- '''
+[docs] def to_decimal(self, binary):
+ '''
Convert a binary string to a decimal number.
@type binary: String
@@ -921,15 +847,11 @@ Source code for chipsec.fuzzing.primitives
@return: Converted bit string
'''
- return int(binary, 2)
-
-
+ return int(binary, 2)
########################################################################################################################
-
-[docs]
-class byte (bit_field):
+[docs]class byte (bit_field):
def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
self.s_type = "byte"
if not isinstance(value, (int, list, tuple)):
@@ -938,11 +860,8 @@ Source code for chipsec.fuzzing.primitives
bit_field.__init__(self, value, 8, None, endian, format, signed, full_range, fuzzable, name)
-
########################################################################################################################
-
-[docs]
-class word (bit_field):
+[docs]class word (bit_field):
def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
self.s_type = "word"
if not isinstance(value, (int, list, tuple)):
@@ -951,11 +870,8 @@ Source code for chipsec.fuzzing.primitives
bit_field.__init__(self, value, 16, None, endian, format, signed, full_range, fuzzable, name)
-
########################################################################################################################
-
-[docs]
-class dword (bit_field):
+[docs]class dword (bit_field):
def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
self.s_type = "dword"
if not isinstance(value, (int, list, tuple)):
@@ -964,18 +880,14 @@ Source code for chipsec.fuzzing.primitives
bit_field.__init__(self, value, 32, None, endian, format, signed, full_range, fuzzable, name)
-
########################################################################################################################
-
-[docs]
-class qword (bit_field):
+[docs]class qword (bit_field):
def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
self.s_type = "qword"
if not isinstance(value, (int, list, tuple)):
value = struct.unpack(endian + "Q", value)[0]
bit_field.__init__(self, value, 64, None, endian, format, signed, full_range, fuzzable, name)
-
@@ -1035,7 +947,7 @@ Quick search
-
+
@@ -1055,8 +967,8 @@ Navigation
\ No newline at end of file
diff --git a/_modules/chipsec/hal/acpi.html b/_modules/chipsec/hal/acpi.html
index 648e2be3..c840828b 100644
--- a/_modules/chipsec/hal/acpi.html
+++ b/_modules/chipsec/hal/acpi.html
@@ -1,18 +1,20 @@
+
-
+
chipsec.hal.acpi — CHIPSEC documentation
-
-
+
+
-
-
-
+
+
+
+
-
+
@@ -83,27 +85,24 @@ Source code for chipsec.hal.acpi
assert 36 == ACPI_TABLE_HEADER_SIZE
-
-[docs]
-class ACPI_TABLE_HEADER(namedtuple('ACPI_TABLE_HEADER', 'Signature Length Revision Checksum OEMID OEMTableID OEMRevision CreatorID CreatorRevision')):
+[docs]class ACPI_TABLE_HEADER(namedtuple('ACPI_TABLE_HEADER', 'Signature Length Revision Checksum OEMID OEMTableID OEMRevision CreatorID CreatorRevision')):
__slots__ = ()
def __str__(self) -> str:
return f""" Table Header
------------------------------------------------------------------
- Signature : {self.Signature}
- Length : 0x{self.Length:08X}
- Revision : 0x{self.Revision:02X}
- Checksum : 0x{self.Checksum:02X}
- OEM ID : {self.OEMID}
- OEM Table ID : {self.OEMTableID}
- OEM Revision : 0x{self.OEMRevision:08X}
- Creator ID : {self.CreatorID}
- Creator Revision : 0x{self.CreatorRevision:08X}
+ Signature : {self.Signature}
+ Length : 0x{self.Length:08X}
+ Revision : 0x{self.Revision:02X}
+ Checksum : 0x{self.Checksum:02X}
+ OEM ID : {self.OEMID}
+ OEM Table ID : {self.OEMTableID}
+ OEM Revision : 0x{self.OEMRevision:08X}
+ Creator ID : {self.CreatorID}
+ Creator Revision : 0x{self.CreatorRevision:08X}
"""
-
ACPI_TABLE_SIG_SIZE = 0x4
ACPI_TABLE_SIG_ROOT = 'ROOT'
@@ -236,18 +235,14 @@ Source code for chipsec.hal.acpi
########################################################################################################
-
-[docs]
-class ACPI(HALBase):
+[docs]class ACPI(HALBase):
def __init__(self, cs):
super(ACPI, self).__init__(cs)
self.uefi = UEFI(self.cs)
self.tableList: Dict[str, List[int]] = defaultdict(list)
self.get_ACPI_table_list()
-
-[docs]
- def read_RSDP(self, rsdp_pa: int) -> acpi_tables.RSDP:
+[docs] def read_RSDP(self, rsdp_pa: int) -> acpi_tables.RSDP:
rsdp_buf = self.cs.mem.read_physical_mem(rsdp_pa, acpi_tables.ACPI_RSDP_SIZE)
rsdp = acpi_tables.RSDP()
rsdp.parse(rsdp_buf)
@@ -257,7 +252,6 @@ Source code for chipsec.hal.acpi
rsdp.parse(rsdp_buf)
return rsdp
-
#
# Check RSDP in Extended BIOS Data Area
#
@@ -347,9 +341,7 @@ Source code for chipsec.hal.acpi
#
# Searches for Root System Description Pointer (RSDP) in various locations for legacy/EFI systems
#
-
-[docs]
- def find_RSDP(self) -> Tuple[Optional[int], Optional[acpi_tables.RSDP]]:
+[docs] def find_RSDP(self) -> Tuple[Optional[int], Optional[acpi_tables.RSDP]]:
rsdp, rsdp_pa = self._find_RSDP_in_EBDA()
if rsdp_pa is None:
@@ -366,14 +358,11 @@ Source code for chipsec.hal.acpi
return (rsdp_pa, rsdp)
-
RsdtXsdt = Union[acpi_tables.RSDT, acpi_tables.XSDT]
#
# Retrieves System Description Table (RSDT or XSDT) either from RSDP or using OS API
#
-
-[docs]
- def get_SDT(self, search_rsdp: bool = True) -> Tuple[bool, Optional[int], Optional[RsdtXsdt], Optional[ACPI_TABLE_HEADER]]:
+[docs] def get_SDT(self, search_rsdp: bool = True) -> Tuple[bool, Optional[int], Optional[RsdtXsdt], Optional[ACPI_TABLE_HEADER]]:
is_xsdt = False
sdt_pa = None
sdt_header = None
@@ -406,13 +395,10 @@ Source code for chipsec.hal.acpi
sdt.parse(sdt_contents)
return (is_xsdt, sdt_pa, sdt, sdt_header)
-
#
# Populates a list of ACPI tables available on the system
#
-
-[docs]
- def get_ACPI_table_list(self) -> Dict[str, List[int]]:
+[docs] def get_ACPI_table_list(self) -> Dict[str, List[int]]:
try:
# 1. Try to extract ACPI table(s) from physical memory
# read_physical_mem can be implemented using both
@@ -438,14 +424,11 @@ Source code for chipsec.hal.acpi
return self.tableList
-
#
# Gets table list from entries in RSDT/XSDT
#
-
-[docs]
- def get_table_list_from_SDT(self, sdt: RsdtXsdt, is_xsdt: bool) -> None:
- logger().log_hal(f'[acpi] Getting table list from entries in {"XSDT" if is_xsdt else "RSDT"}')
+[docs] def get_table_list_from_SDT(self, sdt: RsdtXsdt, is_xsdt: bool) -> None:
+ logger().log_hal(f'[acpi] Getting table list from entries in {"XSDT" if is_xsdt else "RSDT"}')
for a in sdt.Entries:
_sig = self.cs.mem.read_physical_mem(a, ACPI_TABLE_SIG_SIZE)
_sig = bytestostring(_sig)
@@ -454,13 +437,10 @@ Source code for chipsec.hal.acpi
logger().log_warning(f'Unknown ACPI table signature: {_sig}')
self.tableList[_sig].append(a)
-
#
# Gets DSDT from FADT
#
-
-[docs]
- def get_DSDT_from_FADT(self) -> None:
+[docs] def get_DSDT_from_FADT(self) -> None:
logger().log_hal('[acpi] Getting DSDT from FADT')
if ACPI_TABLE_SIG_FACP in self.tableList:
@@ -487,22 +467,16 @@ Source code for chipsec.hal.acpi
self.tableList[ACPI_TABLE_SIG_DSDT].append(dsdt_address_to_use)
-
#
# Checks is ACPI table with <name> is available on the system
#
-
-[docs]
- def is_ACPI_table_present(self, name: str) -> bool:
+
-
#
# Prints a list of ACPI tables available on the system
#
-
-[docs]
- def print_ACPI_table_list(self) -> None:
+[docs] def print_ACPI_table_list(self) -> None:
if len(self.tableList) == 0:
logger().log_error("Couldn't get a list of ACPI tables")
else:
@@ -511,20 +485,14 @@ Source code for chipsec.hal.acpi
table_values_str = ', '.join([f'0x{addr:016X}' for addr in self.tableList[tableName]])
logger().log(f' - {tableName}: {table_values_str}')
-
#
# Retrieves contents of ACPI table from memory or from file
#
-
-[docs]
- def get_parse_ACPI_table(self, name: str, isfile: bool = False) -> List['ParseTable']:
+[docs] def get_parse_ACPI_table(self, name: str, isfile: bool = False) -> List['ParseTable']:
acpi_tables = self.get_ACPI_table(name, isfile)
return [self._parse_table(name, table_header_blob, table_blob) for (table_header_blob, table_blob) in acpi_tables if table_header_blob is not None]
-
-
-[docs]
- def get_ACPI_table(self, name: str, isfile: bool = False) -> List[Tuple[bytes, bytes]]:
+[docs] def get_ACPI_table(self, name: str, isfile: bool = False) -> List[Tuple[bytes, bytes]]:
acpi_tables_data: List[bytes] = []
if isfile:
acpi_tables_data.append(read_file(name))
@@ -551,13 +519,10 @@ Source code for chipsec.hal.acpi
return acpi_tables
-
#
# Dumps contents of ACPI table
#
-
-[docs]
- def dump_ACPI_table(self, name: str, isfile: bool = False) -> None:
+[docs] def dump_ACPI_table(self, name: str, isfile: bool = False) -> None:
acpi_tables = self.get_parse_ACPI_table(name, isfile)
for acpi_table in acpi_tables:
(table_header, table, table_header_blob, table_blob) = acpi_table
@@ -573,7 +538,6 @@ Source code for chipsec.hal.acpi
print_buffer_bytes(table_blob)
logger().log('')
-
# --------------------------------------------------------------------
# Internal ACPI table parsing functions
# --------------------------------------------------------------------
@@ -605,7 +569,6 @@ Source code for chipsec.hal.acpi
table = (ACPI_TABLES[signature])()
table.parse(contents)
return table
-
@@ -665,7 +628,7 @@ Quick search
-
+
@@ -685,8 +648,8 @@ Navigation
\ No newline at end of file
diff --git a/_modules/chipsec/hal/acpi_tables.html b/_modules/chipsec/hal/acpi_tables.html
index 4d4bec3d..df59e6a3 100644
--- a/_modules/chipsec/hal/acpi_tables.html
+++ b/_modules/chipsec/hal/acpi_tables.html
@@ -1,18 +1,20 @@
+
-
+
chipsec.hal.acpi_tables — CHIPSEC documentation
-
-
+
+
-
-
-
+
+
+
+
-
+
@@ -74,23 +76,17 @@ Source code for chipsec.hal.acpi_tables
from chipsec.hal.uefi_common import EFI_GUID_FMT, EFI_GUID_STR
-
-[docs]
-class ACPI_TABLE:
+[docs]class ACPI_TABLE:
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+
-
def __str__(self) -> str:
return """------------------------------------------------------------------
Table Content
------------------------------------------------------------------
"""
-
########################################################################################################
#
# RSDP
@@ -106,12 +102,8 @@ Source code for chipsec.hal.acpi_tables
assert ACPI_RSDP_EXT_SIZE == 36
-
-[docs]
-class RSDP(ACPI_TABLE):
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs]class RSDP(ACPI_TABLE):
+[docs] def parse(self, table_content: bytes) -> None:
if len(table_content) == ACPI_RSDP_SIZE:
(self.Signature, self.Checksum, self.OEMID,
self.Revision, self.RsdtAddress) = struct.unpack(ACPI_RSDP_FORMAT, table_content)
@@ -120,7 +112,6 @@ Source code for chipsec.hal.acpi_tables
self.Revision, self.RsdtAddress, self.Length,
self.XsdtAddress, self.ExtChecksum, self.Reserved) = struct.unpack(ACPI_RSDP_FORMAT + ACPI_RSDP_EXT_FORMAT, table_content)
-
def __str__(self) -> str:
default = ("==================================================================\n"
" Root System Description Pointer (RSDP)\n"
@@ -139,12 +130,8 @@ Source code for chipsec.hal.acpi_tables
return default
# some sanity checking on RSDP
-
-[docs]
- def is_RSDP_valid(self) -> bool:
- return 0 != self.Checksum and (0x0 == self.Revision or 0x2 == self.Revision)
-
-
+[docs] def is_RSDP_valid(self) -> bool:
+ return 0 != self.Checksum and (0x0 == self.Revision or 0x2 == self.Revision)
########################################################################################################
@@ -158,9 +145,7 @@ Source code for chipsec.hal.acpi_tables
ACPI_TABLE_SIZE_DMAR = struct.calcsize(ACPI_TABLE_FORMAT_DMAR)
-
-[docs]
-class DMAR (ACPI_TABLE):
+[docs]class DMAR (ACPI_TABLE):
def __init__(self):
self.dmar_structures = []
self.DMAR_TABLE_FORMAT = {
@@ -174,9 +159,7 @@ Source code for chipsec.hal.acpi_tables
'SIDP_FORMAT': 'HHHH'
}
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
off = ACPI_TABLE_SIZE_DMAR
struct_fmt = '=HH'
while off < len(table_content) - 1:
@@ -188,14 +171,13 @@ Source code for chipsec.hal.acpi_tables
(self.HostAddrWidth, self.Flags, self.Reserved) = struct.unpack_from(ACPI_TABLE_FORMAT_DMAR, table_content)
return
-
def __str__(self) -> str:
_str = f"""------------------------------------------------------------------
DMAR Table Contents
------------------------------------------------------------------
- Host Address Width : {self.HostAddrWidth:d}
- Flags : 0x{self.Flags:02X}
- Reserved : {self.Reserved.hex()}
+ Host Address Width : {self.HostAddrWidth:d}
+ Flags : 0x{self.Flags:02X}
+ Reserved : {self.Reserved.hex()}
"""
_str += "\n Remapping Structures:\n"
for st in self.dmar_structures:
@@ -271,7 +253,6 @@ Source code for chipsec.hal.acpi_tables
off += length
return device_scope
-
#
# DMAR Device Scope
#
@@ -291,109 +272,94 @@ Source code for chipsec.hal.acpi_tables
}
-
-[docs]
-class ACPI_TABLE_DMAR_DeviceScope(namedtuple('ACPI_TABLE_DMAR_DeviceScope', 'Type Length Flags Reserved EnumerationID StartBusNum Path')):
+[docs]class ACPI_TABLE_DMAR_DeviceScope(namedtuple('ACPI_TABLE_DMAR_DeviceScope', 'Type Length Flags Reserved EnumerationID StartBusNum Path')):
__slots__ = ()
def __str__(self) -> str:
return f""" {DMAR_DS_TYPE[self.Type]} ({self.Type:02X}): Len: 0x{self.Length:02X}, Flags: 0x{self.Flags:02X}, Rsvd: 0x{self.Reserved:02X}, Enum ID: 0x{self.EnumerationID:02X}, Start Bus#: 0x{self.StartBusNum:02X}, Path: {self.Path.hex()}\n"""
-
#
# DMAR DMA Remapping Hardware Unit Definition (DRHD) Structure
#
-
-[docs]
-class ACPI_TABLE_DMAR_DRHD(namedtuple('ACPI_TABLE_DMAR_DRHD', 'Type Length Flags Reserved SegmentNumber RegisterBaseAddr DeviceScope')):
+[docs]class ACPI_TABLE_DMAR_DRHD(namedtuple('ACPI_TABLE_DMAR_DRHD', 'Type Length Flags Reserved SegmentNumber RegisterBaseAddr DeviceScope')):
__slots__ = ()
def __str__(self) -> str:
_str = f"""
DMA Remapping Hardware Unit Definition (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Flags : 0x{self.Flags:02X}
- Reserved : 0x{self.Reserved:02X}
- Segment Number : 0x{self.SegmentNumber:04X}
- Register Base Address : 0x{self.RegisterBaseAddr:016X}
+ Length : 0x{self.Length:04X}
+ Flags : 0x{self.Flags:02X}
+ Reserved : 0x{self.Reserved:02X}
+ Segment Number : 0x{self.SegmentNumber:04X}
+ Register Base Address : 0x{self.RegisterBaseAddr:016X}
"""
_str += ' Device Scope :\n'
for ds in self.DeviceScope:
_str += str(ds)
return _str
-
#
# DMAR Reserved Memory Range Reporting (RMRR) Structure
#
-
-[docs]
-class ACPI_TABLE_DMAR_RMRR(namedtuple('ACPI_TABLE_DMAR_RMRR', 'Type Length Reserved SegmentNumber RMRBaseAddr RMRLimitAddr DeviceScope')):
+[docs]class ACPI_TABLE_DMAR_RMRR(namedtuple('ACPI_TABLE_DMAR_RMRR', 'Type Length Reserved SegmentNumber RMRBaseAddr RMRLimitAddr DeviceScope')):
__slots__ = ()
def __str__(self) -> str:
_str = f"""
Reserved Memory Range (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Reserved : 0x{self.Reserved:04X}
- Segment Number : 0x{self.SegmentNumber:04X}
- Reserved Memory Base : 0x{self.RMRBaseAddr:016X}
- Reserved Memory Limit : 0x{self.RMRLimitAddr:016X}
+ Length : 0x{self.Length:04X}
+ Reserved : 0x{self.Reserved:04X}
+ Segment Number : 0x{self.SegmentNumber:04X}
+ Reserved Memory Base : 0x{self.RMRBaseAddr:016X}
+ Reserved Memory Limit : 0x{self.RMRLimitAddr:016X}
"""
_str += ' Device Scope :\n'
for ds in self.DeviceScope:
_str += str(ds)
return _str
-
#
# DMAR Root Port ATS Capability Reporting (ATSR) Structure
#
-
-[docs]
-class ACPI_TABLE_DMAR_ATSR(namedtuple('ACPI_TABLE_DMAR_ATSR', 'Type Length Flags Reserved SegmentNumber DeviceScope')):
+[docs]class ACPI_TABLE_DMAR_ATSR(namedtuple('ACPI_TABLE_DMAR_ATSR', 'Type Length Flags Reserved SegmentNumber DeviceScope')):
__slots__ = ()
def __str__(self) -> str:
_str = f"""
Root Port ATS Capability (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Flags : 0x{self.Flags:02X}
- Reserved (0) : 0x{self.Reserved:02X}
- Segment Number : 0x{self.SegmentNumber:04X}
+ Length : 0x{self.Length:04X}
+ Flags : 0x{self.Flags:02X}
+ Reserved (0) : 0x{self.Reserved:02X}
+ Segment Number : 0x{self.SegmentNumber:04X}
"""
_str += ' Device Scope :\n'
for ds in self.DeviceScope:
_str += str(ds)
return _str
-
#
# DMAR Remapping Hardware Status Affinity (RHSA) Structure
#
-
-[docs]
-class ACPI_TABLE_DMAR_RHSA(namedtuple('ACPI_TABLE_DMAR_RHSA', 'Type Length Reserved RegisterBaseAddr ProximityDomain')):
+[docs]class ACPI_TABLE_DMAR_RHSA(namedtuple('ACPI_TABLE_DMAR_RHSA', 'Type Length Reserved RegisterBaseAddr ProximityDomain')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Remapping Hardware Status Affinity (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Reserved (0) : 0x{self.Reserved:08X}
- Register Base Address : 0x{self.RegisterBaseAddr:016X}
- Proximity Domain : 0x{self.ProximityDomain:08X}
+ Length : 0x{self.Length:04X}
+ Reserved (0) : 0x{self.Reserved:08X}
+ Register Base Address : 0x{self.RegisterBaseAddr:016X}
+ Proximity Domain : 0x{self.ProximityDomain:08X}
"""
-
#
# DMAR ACPI Name-space Device Declaration (ANDD) Structure
#
@@ -402,37 +368,32 @@ Source code for chipsec.hal.acpi_tables
assert 8 == ACPI_TABLE_DMAR_ANDD_SIZE
-
-[docs]
-class ACPI_TABLE_DMAR_ANDD(namedtuple('ACPI_TABLE_DMAR_ANDD', 'Type Length Reserved ACPIDevNum ACPIObjectName')):
+[docs]class ACPI_TABLE_DMAR_ANDD(namedtuple('ACPI_TABLE_DMAR_ANDD', 'Type Length Reserved ACPIDevNum ACPIObjectName')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Remapping Hardware Status Affinity (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Reserved (0) : {self.Reserved.hex()}
- ACPI Device Number : 0x{self.ACPIDevNum:02X}
- ACPI Object Name : {self.ACPIObjectName}
+ Length : 0x{self.Length:04X}
+ Reserved (0) : {self.Reserved.hex()}
+ ACPI Device Number : 0x{self.ACPIDevNum:02X}
+ ACPI Object Name : {self.ACPIObjectName}
"""
-
#
# DMAR SoC Integrated Address Translation Cache Reporting (SATC) Structure
#
-
-[docs]
-class ACPI_TABLE_DMAR_SATC(namedtuple('ACPI_TABLE_DMAR_SATC', 'Type Length Flags Reserved SegmentNumber DeviceScope')):
+[docs]class ACPI_TABLE_DMAR_SATC(namedtuple('ACPI_TABLE_DMAR_SATC', 'Type Length Flags Reserved SegmentNumber DeviceScope')):
__slots__ = ()
def __str__(self):
_str = f"""
SoC Integrated Address Translation Cache (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Flags : 0x{self.Flags:02X}
- Reserved (0) : 0x{self.Reserved:02X}
- Segment Number : 0x{self.SegmentNumber:016X}
+ Length : 0x{self.Length:04X}
+ Flags : 0x{self.Flags:02X}
+ Reserved (0) : 0x{self.Reserved:02X}
+ Segment Number : 0x{self.SegmentNumber:016X}
"""
_str += ' Device Scope :\n'
for ds in self.DeviceScope:
@@ -440,28 +401,24 @@ Source code for chipsec.hal.acpi_tables
return _str
-
#
# DMAR SoC Integrated Address Translation Cache Reporting (SIDP) Structure
#
-
-[docs]
-class ACPI_TABLE_DMAR_SIDP(namedtuple('ACPI_TABLE_DMAR_SIDP', 'Type Length Reserved SegmentNumber DeviceScope')):
+[docs]class ACPI_TABLE_DMAR_SIDP(namedtuple('ACPI_TABLE_DMAR_SIDP', 'Type Length Reserved SegmentNumber DeviceScope')):
__slots__ = ()
def __str__(self):
_str = f"""
SoC Integrated Address Translation Cache Reporting Structure (0x{self.Type:04X}):
- Length : 0x{self.Length:04X}
- Reserved (0) : 0x{self.Reserved:02X}
- Segment Number : 0x{self.SegmentNumber:016X}
+ Length : 0x{self.Length:04X}
+ Reserved (0) : 0x{self.Reserved:02X}
+ Segment Number : 0x{self.SegmentNumber:016X}
"""
_str += ' Device Scope :\n'
for ds in self.DeviceScope:
_str += str(ds)
return _str
-
########################################################################################################
#
# APIC Table
@@ -473,9 +430,7 @@ Source code for chipsec.hal.acpi_tables
ACPI_TABLE_SIZE_APIC = struct.calcsize(ACPI_TABLE_FORMAT_APIC)
-
-[docs]
-class APIC (ACPI_TABLE):
+[docs]class APIC (ACPI_TABLE):
def __init__(self):
self.apic_structs = []
self.ACPI_TABLE_FORMAT = {}
@@ -499,9 +454,7 @@ Source code for chipsec.hal.acpi_tables
"GIC_REDISTRIBUTOR": '<BBHQI'
}
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
(self.LAPICBase, self.Flags) = struct.unpack('=II', table_content[0: 8])
cont = 8
while cont < len(table_content) - 1:
@@ -512,22 +465,19 @@ Source code for chipsec.hal.acpi_tables
cont += length
return
-
def __str__(self) -> str:
apic_str = f"""------------------------------------------------------------------
APIC Table Contents
------------------------------------------------------------------
- Local APIC Base : 0x{self.LAPICBase:016X}
- Flags : 0x{self.Flags:08X}
+ Local APIC Base : 0x{self.LAPICBase:016X}
+ Flags : 0x{self.Flags:08X}
"""
apic_str += "\n Interrupt Controller Structures:\n"
for st in self.apic_structs:
apic_str += str(st)
return apic_str
-
-[docs]
- def get_structure_APIC(self, value: int, DataStructure: bytes) -> str:
+[docs] def get_structure_APIC(self, value: int, DataStructure: bytes) -> str:
if 0x00 == value:
ret = ACPI_TABLE_APIC_PROCESSOR_LAPIC(*struct.unpack_from(self.APIC_TABLE_FORMAT["PROCESSOR_LAPIC"], DataStructure))
elif 0x01 == value:
@@ -543,7 +493,7 @@ Source code for chipsec.hal.acpi_tables
elif 0x06 == value:
ret = ACPI_TABLE_APIC_IOSAPIC(*struct.unpack_from(self.APIC_TABLE_FORMAT["IOSAPIC"], DataStructure))
elif 0x07 == value:
- ret = ACPI_TABLE_APIC_PROCESSOR_LSAPIC(*struct.unpack_from(f'{self.APIC_TABLE_FORMAT["PROCESSOR_LSAPIC"]}{str(len(DataStructure) - 16)}s', DataStructure))
+ ret = ACPI_TABLE_APIC_PROCESSOR_LSAPIC(*struct.unpack_from(f'{self.APIC_TABLE_FORMAT["PROCESSOR_LSAPIC"]}{str(len(DataStructure) - 16)}s', DataStructure))
elif 0x08 == value:
ret = ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES(*struct.unpack_from(self.APIC_TABLE_FORMAT["PLATFORM_INTERRUPT_SOURCES"], DataStructure))
elif 0x09 == value:
@@ -564,291 +514,244 @@ Source code for chipsec.hal.acpi_tables
Reserved ....................................{value}"
{DataStructure_str}"
"""
- return str(ret)
-
-
+ return str(ret)
-
-[docs]
-class ACPI_TABLE_APIC_PROCESSOR_LAPIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_LAPIC', 'Type Length ACPIProcID APICID Flags')):
+[docs]class ACPI_TABLE_APIC_PROCESSOR_LAPIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_LAPIC', 'Type Length ACPIProcID APICID Flags')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Processor Local APIC (0x00)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- ACPI Proc ID : 0x{self.ACPIProcID:02X}
- APIC ID : 0x{self.APICID:02X}
- Flags : 0x{self.Flags:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ ACPI Proc ID : 0x{self.ACPIProcID:02X}
+ APIC ID : 0x{self.APICID:02X}
+ Flags : 0x{self.Flags:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_IOAPIC(namedtuple('ACPI_TABLE_APIC_IOAPIC', 'Type Length IOAPICID Reserved IOAPICAddr GlobalSysIntBase')):
+[docs]class ACPI_TABLE_APIC_IOAPIC(namedtuple('ACPI_TABLE_APIC_IOAPIC', 'Type Length IOAPICID Reserved IOAPICAddr GlobalSysIntBase')):
__slots__ = ()
def __str__(self) -> str:
return f"""
I/O APIC (0x01)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.IOAPICID:02X}
- I/O APIC ID : 0x{self.Reserved:02X}
- I/O APIC Base : 0x{self.IOAPICAddr:02X}
- Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.IOAPICID:02X}
+ I/O APIC ID : 0x{self.Reserved:02X}
+ I/O APIC Base : 0x{self.IOAPICAddr:02X}
+ Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE(namedtuple('ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE', 'Type Length Bus Source GlobalSysIntBase Flags')):
+[docs]class ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE(namedtuple('ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE', 'Type Length Bus Source GlobalSysIntBase Flags')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Interrupt Source Override (0x02)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Bus : 0x{self.Bus:02X}
- Source : 0x{self.Source:02X}
- Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
- Flags : 0x{self.Flags:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Bus : 0x{self.Bus:02X}
+ Source : 0x{self.Source:02X}
+ Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
+ Flags : 0x{self.Flags:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_NMI_SOURCE(namedtuple('ACPI_TABLE_APIC_NMI_SOURCE', 'Type Length Flags GlobalSysIntBase')):
+[docs]class ACPI_TABLE_APIC_NMI_SOURCE(namedtuple('ACPI_TABLE_APIC_NMI_SOURCE', 'Type Length Flags GlobalSysIntBase')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Non-maskable Interrupt (NMI) Source (0x03)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Flags : 0x{self.Flags:02X}
- Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Flags : 0x{self.Flags:02X}
+ Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_LAPIC_NMI(namedtuple('ACPI_TABLE_APIC_LAPIC_NMI', 'Type Length ACPIProcessorID Flags LocalAPICLINT')):
+[docs]class ACPI_TABLE_APIC_LAPIC_NMI(namedtuple('ACPI_TABLE_APIC_LAPIC_NMI', 'Type Length ACPIProcessorID Flags LocalAPICLINT')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Local APIC NMI (0x04)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- ACPI Processor ID : 0x{self.ACPIProcessorID:02X}
- Flags : 0x{self.Flags:02X}
- Local APIC LINT : 0x{self.LocalAPICLINT:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ ACPI Processor ID : 0x{self.ACPIProcessorID:02X}
+ Flags : 0x{self.Flags:02X}
+ Local APIC LINT : 0x{self.LocalAPICLINT:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE(namedtuple('ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE', 'Type Length Reserved LocalAPICAddress')):
+[docs]class ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE(namedtuple('ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE', 'Type Length Reserved LocalAPICAddress')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Local APIC Address Override (0x05)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.Reserved:02X}
- Local APIC Address : 0x{self.LocalAPICAddress:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.Reserved:02X}
+ Local APIC Address : 0x{self.LocalAPICAddress:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_IOSAPIC(namedtuple('ACPI_TABLE_APIC_IOSAPIC', 'Type Length IOAPICID Reserved GlobalSysIntBase IOSAPICAddress')):
+[docs]class ACPI_TABLE_APIC_IOSAPIC(namedtuple('ACPI_TABLE_APIC_IOSAPIC', 'Type Length IOAPICID Reserved GlobalSysIntBase IOSAPICAddress')):
__slots__ = ()
def __str__(self) -> str:
return f"""
I/O SAPIC (0x06)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- IO APIC ID : 0x{self.IOAPICID:02X}
- Reserved : 0x{self.Reserved:02X}
- Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
- IO SAPIC Address : 0x{self.IOSAPICAddress:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ IO APIC ID : 0x{self.IOAPICID:02X}
+ Reserved : 0x{self.Reserved:02X}
+ Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
+ IO SAPIC Address : 0x{self.IOSAPICAddress:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_PROCESSOR_LSAPIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_LSAPIC', 'Type Length ACPIProcID LocalSAPICID LocalSAPICEID Reserved Flags ACPIProcUIDValue ACPIProcUIDString'), ):
+[docs]class ACPI_TABLE_APIC_PROCESSOR_LSAPIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_LSAPIC', 'Type Length ACPIProcID LocalSAPICID LocalSAPICEID Reserved Flags ACPIProcUIDValue ACPIProcUIDString'), ):
__slots__ = ()
def __str__(self) -> str:
return f"""
Local SAPIC (0x07)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- ACPI Proc ID : 0x{self.ACPIProcID:02X}
- Local SAPIC ID : 0x{self.LocalSAPICID:02X}
- Local SAPIC EID : 0x{self.LocalSAPICEID:02X}
- Reserved : 0x{self.Reserved:02X}
- Flags : 0x{self.Flags:02X}
- ACPI Proc UID Value : 0x{self.ACPIProcUIDValue:02X}
- ACPI Proc UID String : 0x{self.ACPIProcUIDString:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ ACPI Proc ID : 0x{self.ACPIProcID:02X}
+ Local SAPIC ID : 0x{self.LocalSAPICID:02X}
+ Local SAPIC EID : 0x{self.LocalSAPICEID:02X}
+ Reserved : 0x{self.Reserved:02X}
+ Flags : 0x{self.Flags:02X}
+ ACPI Proc UID Value : 0x{self.ACPIProcUIDValue:02X}
+ ACPI Proc UID String : 0x{self.ACPIProcUIDString:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES(namedtuple('ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES', 'Type Length Flags InterruptType ProcID ProcEID IOSAPICVector GlobalSystemInterrupt PlatIntSourceFlags')):
+[docs]class ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES(namedtuple('ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES', 'Type Length Flags InterruptType ProcID ProcEID IOSAPICVector GlobalSystemInterrupt PlatIntSourceFlags')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Platform Interrupt Sources (0x08)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Flags : 0x{self.Flags:02X}
- Interrupt Type : 0x{self.InterruptType:02X}
- Proc ID : 0x{self.ProcID:02X}
- Proc EID : 0x{self.ProcEID:02X}
- I/O SAPIC Vector : 0x{self.IOSAPICVector:02X}
- Global System Interrupt : 0x{self.GlobalSystemInterrupt:02X}
- Plat Int Source Flags : 0x{self.PlatIntSourceFlags:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Flags : 0x{self.Flags:02X}
+ Interrupt Type : 0x{self.InterruptType:02X}
+ Proc ID : 0x{self.ProcID:02X}
+ Proc EID : 0x{self.ProcEID:02X}
+ I/O SAPIC Vector : 0x{self.IOSAPICVector:02X}
+ Global System Interrupt : 0x{self.GlobalSystemInterrupt:02X}
+ Plat Int Source Flags : 0x{self.PlatIntSourceFlags:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_PROCESSOR_Lx2APIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_Lx2APIC', 'Type Length Reserved x2APICID Flags ACPIProcUID')):
+[docs]class ACPI_TABLE_APIC_PROCESSOR_Lx2APIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_Lx2APIC', 'Type Length Reserved x2APICID Flags ACPIProcUID')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Processor Local x2APIC (0x09)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.Reserved:02X}
- x2APIC ID : 0x{self.x2APICID:02X}
- Flags : 0x{self.Flags:02X}
- ACPI Proc UID : 0x{self.ACPIProcUID:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.Reserved:02X}
+ x2APIC ID : 0x{self.x2APICID:02X}
+ Flags : 0x{self.Flags:02X}
+ ACPI Proc UID : 0x{self.ACPIProcUID:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_Lx2APIC_NMI(namedtuple('ACPI_TABLE_APIC_Lx2APIC_NMI', 'Type Length Flags ACPIProcUID Localx2APICLINT Reserved')):
+[docs]class ACPI_TABLE_APIC_Lx2APIC_NMI(namedtuple('ACPI_TABLE_APIC_Lx2APIC_NMI', 'Type Length Flags ACPIProcUID Localx2APICLINT Reserved')):
__slots__ = ()
def __str__(self) -> str:
return f"""
Local x2APIC NMI (0x0A)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Flags : 0x{self.Flags:02X}
- ACPI Proc UID : 0x{self.ACPIProcUID:02X}
- Local x2APIC LINT : 0x{self.Localx2APICLINT:02X}
- Reserved : 0x{self.Reserved:}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Flags : 0x{self.Flags:02X}
+ ACPI Proc UID : 0x{self.ACPIProcUID:02X}
+ Local x2APIC LINT : 0x{self.Localx2APICLINT:02X}
+ Reserved : 0x{self.Reserved:}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_GICC_CPU(namedtuple('ACPI_TABLE_APIC_GICC_CPU', 'Type Length Reserved CPUIntNumber ACPIProcUID Flags ParkingProtocolVersion PerformanceInterruptGSIV ParkedAddress PhysicalAddress GICV GICH VGICMaintenanceINterrupt GICRBaseAddress MPIDR')):
+[docs]class ACPI_TABLE_APIC_GICC_CPU(namedtuple('ACPI_TABLE_APIC_GICC_CPU', 'Type Length Reserved CPUIntNumber ACPIProcUID Flags ParkingProtocolVersion PerformanceInterruptGSIV ParkedAddress PhysicalAddress GICV GICH VGICMaintenanceINterrupt GICRBaseAddress MPIDR')):
__slots__ = ()
def __str__(self) -> str:
return f"""
GICC CPU Interface Structure (0x0B)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.Reserved:02X}
- CPU Int Number : 0x{self.CPUIntNumber:02X}
- ACPI Proc UID : 0x{self.ACPIProcUID:02X}
- Flags : 0x{self.Flags:02X}
- Parking Protocol Version : 0x{self.ParkingProtocolVersion:02X}
- Performance Interrupt GSIV : 0x{self.PerformanceInterruptGSIV:02X}
- Parked Address : 0x{self.ParkedAddress:02X}
- Physical Address : 0x{self.PhysicalAddress:02X}
- GICV : 0x{self.GICV:02X}
- GICH : 0x{self.GICH:02X}
- VGIC Maintenance INterrupt : 0x{self.VGICMaintenanceINterrupt:02X}
- GICR Base Address : 0x{self.GICRBaseAddress:02X}
- MPIDR : 0x{self.MPIDR:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.Reserved:02X}
+ CPU Int Number : 0x{self.CPUIntNumber:02X}
+ ACPI Proc UID : 0x{self.ACPIProcUID:02X}
+ Flags : 0x{self.Flags:02X}
+ Parking Protocol Version : 0x{self.ParkingProtocolVersion:02X}
+ Performance Interrupt GSIV : 0x{self.PerformanceInterruptGSIV:02X}
+ Parked Address : 0x{self.ParkedAddress:02X}
+ Physical Address : 0x{self.PhysicalAddress:02X}
+ GICV : 0x{self.GICV:02X}
+ GICH : 0x{self.GICH:02X}
+ VGIC Maintenance INterrupt : 0x{self.VGICMaintenanceINterrupt:02X}
+ GICR Base Address : 0x{self.GICRBaseAddress:02X}
+ MPIDR : 0x{self.MPIDR:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_GIC_DISTRIBUTOR(namedtuple('ACPI_TABLE_APIC_GIC_DISTRIBUTOR', 'Type Length Reserved GICID PhysicalBaseAddress SystemVectorBase Reserved2 ')):
+[docs]class ACPI_TABLE_APIC_GIC_DISTRIBUTOR(namedtuple('ACPI_TABLE_APIC_GIC_DISTRIBUTOR', 'Type Length Reserved GICID PhysicalBaseAddress SystemVectorBase Reserved2 ')):
__slots__ = ()
def __str__(self) -> str:
return f"""
GICD GIC Distributor Structure (0x0C)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.Reserved:02X}
- GICID : 0x{self.GICID:02X}
- Physical Base Address : 0x{self.PhysicalBaseAddress:02X}
- System Vector Base : 0x{self.SystemVectorBase:02X}
- Reserved : 0x{self.Reserved2:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.Reserved:02X}
+ GICID : 0x{self.GICID:02X}
+ Physical Base Address : 0x{self.PhysicalBaseAddress:02X}
+ System Vector Base : 0x{self.SystemVectorBase:02X}
+ Reserved : 0x{self.Reserved2:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_GIC_MSI(namedtuple('ACPI_TABLE_APIC_GIC_MSI', 'Type Length Reserved GICMSIFrameID PhysicalBaseAddress Flags SPICount SPIBase')):
+[docs]class ACPI_TABLE_APIC_GIC_MSI(namedtuple('ACPI_TABLE_APIC_GIC_MSI', 'Type Length Reserved GICMSIFrameID PhysicalBaseAddress Flags SPICount SPIBase')):
__slots__ = ()
def __str__(self) -> str:
return f"""
GICv2m MSI Frame (0x0D)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.Reserved:02X}
- GIC MSI Frame ID : 0x{self.GICMSIFrameID:02X}
- Physical Base Address : 0x{self.PhysicalBaseAddress:02X}
- Flags : 0x{self.Flags:02X}
- SPI Count : 0x{self.SPICount:02X}
- SPI Base : 0x{self.SPIBase:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.Reserved:02X}
+ GIC MSI Frame ID : 0x{self.GICMSIFrameID:02X}
+ Physical Base Address : 0x{self.PhysicalBaseAddress:02X}
+ Flags : 0x{self.Flags:02X}
+ SPI Count : 0x{self.SPICount:02X}
+ SPI Base : 0x{self.SPIBase:02X}
"""
-
-
-[docs]
-class ACPI_TABLE_APIC_GIC_REDISTRIBUTOR(namedtuple('ACPI_TABLE_APIC_GIC_REDISTRIBUTOR', 'Type Length Reserved DiscoverRangeBaseAdd DiscoverRangeLength')):
+[docs]class ACPI_TABLE_APIC_GIC_REDISTRIBUTOR(namedtuple('ACPI_TABLE_APIC_GIC_REDISTRIBUTOR', 'Type Length Reserved DiscoverRangeBaseAdd DiscoverRangeLength')):
__slots__ = ()
def __str__(self) -> str:
return f"""
GICR Redistributor Structure (0x0E)
- Type : 0x{self.Type:02X}
- Length : 0x{self.Length:02X}
- Reserved : 0x{self.Reserved:02X}
- Discover Range Base : 0x{self.DiscoverRangeBaseAdd:02X}
- Discover Range Length : 0x{self.DiscoverRangeLength:02X}
+ Type : 0x{self.Type:02X}
+ Length : 0x{self.Length:02X}
+ Reserved : 0x{self.Reserved:02X}
+ Discover Range Base : 0x{self.DiscoverRangeBaseAdd:02X}
+ Discover Range Length : 0x{self.DiscoverRangeLength:02X}
"""
-
########################################################################################################
#
# XSDT Table
@@ -856,30 +759,24 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class XSDT (ACPI_TABLE):
+[docs]class XSDT (ACPI_TABLE):
def __init__(self):
self.Entries = []
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
num_of_tables = len(table_content) // 8
self.Entries = struct.unpack(f'={num_of_tables:d}Q', table_content)
return
-
def __str__(self) -> str:
entries_str = ''.join([f'0x{addr:016X}\n' for addr in self.Entries])
return f"""==================================================================
Extended System Description Table (XSDT)
==================================================================
ACPI Table Entries:
-{entries_str}
+{entries_str}
"""
-
########################################################################################################
#
# RSDT Table
@@ -887,30 +784,24 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class RSDT (ACPI_TABLE):
+[docs]class RSDT (ACPI_TABLE):
def __init__(self):
self.Entries = []
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
num_of_tables = len(table_content) // 4
self.Entries = struct.unpack(f'={num_of_tables:d}I', table_content)
return
-
def __str__(self) -> str:
entries_str = ''.join([f'0x{addr:016X}\n' for addr in self.Entries])
return f"""==================================================================
Root System Description Table (RSDT)
==================================================================
ACPI Table Entries:
-{entries_str}
+{entries_str}
"""
-
########################################################################################################
#
# FADT Table
@@ -918,9 +809,7 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class FADT (ACPI_TABLE):
+[docs]class FADT (ACPI_TABLE):
def __init__(self):
self.dsdt = None
self.x_dsdt = None
@@ -928,9 +817,7 @@ Source code for chipsec.hal.acpi_tables
self.acpi_enable = None
self.acpi_disable = None
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
self.dsdt = struct.unpack('<I', table_content[4:8])[0]
self.smi = struct.unpack('<I', table_content[12:16])[0]
self.acpi_enable = struct.unpack('B', table_content[16:17])[0]
@@ -941,10 +828,7 @@ Source code for chipsec.hal.acpi_tables
if logger().HAL:
logger().log('[acpi] Cannot find X_DSDT entry in FADT.')
-
-
-[docs]
- def get_DSDT_address_to_use(self) -> Optional[int]:
+[docs] def get_DSDT_address_to_use(self) -> Optional[int]:
dsdt_address_to_use = None
if self.x_dsdt is None:
if self.dsdt != 0:
@@ -958,20 +842,18 @@ Source code for chipsec.hal.acpi_tables
dsdt_address_to_use = self.x_dsdt
return dsdt_address_to_use
-
def __str__(self) -> str:
dsdt_str = f'0x{self.x_dsdt:016X}' if self.x_dsdt is not None else 'Not found'
return f"""------------------------------------------------------------------
Fixed ACPI Description Table (FADT) Contents
------------------------------------------------------------------
- DSDT : 0x{self.dsdt:08X}
- X_DSDT : {dsdt_str}
- SMI_CMD : 0x{self.smi:04X}
- ACPI_EN : 0x{self.acpi_enable:01X}
- ACPI_DIS: 0x{self.acpi_disable:01X}
+ DSDT : 0x{self.dsdt:08X}
+ X_DSDT : {dsdt_str}
+ SMI_CMD : 0x{self.smi:04X}
+ ACPI_EN : 0x{self.acpi_enable:01X}
+ ACPI_DIS: 0x{self.acpi_disable:01X}
"""
-
########################################################################################################
#
# BGRT Table
@@ -979,15 +861,11 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class BGRT (ACPI_TABLE):
+[docs]class BGRT (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
self.Version = struct.unpack('<H', table_content[0:2])[0]
self.Status = struct.unpack('<b', table_content[2:3])[0]
self.ImageType = struct.unpack('<b', table_content[3:4])[0]
@@ -1009,20 +887,18 @@ Source code for chipsec.hal.acpi_tables
else:
self.ImageTypeStr = 'Reserved'
-
def __str__(self) -> str:
return f"""
------------------------------------------------------------------
- Version : {self.Version:d}
- Status : {self.Status:d}
- Clockwise Orientation Offset : {self.OrientationOffset}
- Image Type : {self.ImageType:d} {self.ImageTypeStr}
- Image Address : 0x{self.ImageAddress:016X}
- Image Offset X : 0x{self.ImageOffsetX:08X}
- Image Offset Y : 0x{self.ImageOffsetY:08X}
+ Version : {self.Version:d}
+ Status : {self.Status:d}
+ Clockwise Orientation Offset : {self.OrientationOffset}
+ Image Type : {self.ImageType:d} {self.ImageTypeStr}
+ Image Address : 0x{self.ImageAddress:016X}
+ Image Offset X : 0x{self.ImageOffsetX:08X}
+ Image Offset Y : 0x{self.ImageOffsetY:08X}
"""
-
########################################################################################################
#
# BERT Table
@@ -1030,16 +906,12 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class BERT (ACPI_TABLE):
+[docs]class BERT (ACPI_TABLE):
def __init__(self, bootRegion: bytes) -> None:
self.bootRegion = bootRegion
return
-
-[docs]
- def parseSectionType(self, table_content: bytes) -> str:
+[docs] def parseSectionType(self, table_content: bytes) -> str:
# Processor Generic: {0x9876CCAD, 0x47B4, 0x4bdb, {0xB6, 0x5E, 0x16, 0xF1, 0x93, 0xC4, 0xF3, 0xDB}}
# Processor Specific: IA32/X64:{0xDC3EA0B0, 0xA144, 0x4797, {0xB9, 0x5B, 0x53, 0xFA, 0x24, 0x2B, 0x6E, 0x1D}}
# Processor Specific: IPF: {0xe429faf1, 0x3cb7, 0x11d4, {0xb, 0xca, 0x7, 0x00, 0x80,0xc7, 0x3c, 0x88, 0x81}}
@@ -1057,7 +929,7 @@ Source code for chipsec.hal.acpi_tables
val3 = struct.unpack('<L', table_content[8:12])[0]
val4 = struct.unpack('<L', table_content[12:16])[0]
results = f'''0x{val1:08X} 0x{val2:08X} 0x{val3:08X} 0x{val4:08X} - '''
- """if val1 == 0x9876CCAD and val2 == 0x47B4 and val3 == 0x4bdb and val4 in [0xB6, 0x5E, 0x16, 0xF1, 0x93, 0xC4, 0xF3, 0xDB]:
+ """if val1 == 0x9876CCAD and val2 == 0x47B4 and val3 == 0x4bdb and val4 in [0xB6, 0x5E, 0x16, 0xF1, 0x93, 0xC4, 0xF3, 0xDB]:
return results + '''Generic Processor'''
elif val1 == 0xDC3EA0B0 and val2 == 0xA144 and val3 == 0x4797 and val4 in [0xB9, 0x5B, 0x53, 0xFA, 0x24, 0x2B, 0x6E, 0x1D]:
return results + '''Processor Specific: IA32/X64'''
@@ -1083,10 +955,7 @@ Source code for chipsec.hal.acpi_tables
return results + '''IOMMU Specific DMAr Section'''"""
return results + '''Unknown'''
-
-
-[docs]
- def parseTime(self, table_content: bytes) -> str:
+[docs] def parseTime(self, table_content: bytes) -> str:
seconds = struct.unpack('<B', table_content[0:1])[0]
minutes = struct.unpack('<B', table_content[1:2])[0]
hours = struct.unpack('<B', table_content[2:3])[0]
@@ -1100,10 +969,7 @@ Source code for chipsec.hal.acpi_tables
precision_str = '(time is percise and correlates to time of event)'
return f''' {hours:d}:{minutes:d}:{seconds:d} {month:d}/{day:d}/{century:d}{year:d} [m/d/y] {precision_str}'''
-
-
-[docs]
- def parseGenErrorEntries(self, table_content: bytes) -> str:
+[docs] def parseGenErrorEntries(self, table_content: bytes) -> str:
errorSeverities = ['Recoverable', 'Fatal', 'Corrected', 'None', 'Unknown severity entry']
sectionType = self.parseSectionType(table_content[0:16])
errorSeverity = struct.unpack('<L', table_content[16:20])[0]
@@ -1132,30 +998,27 @@ Source code for chipsec.hal.acpi_tables
if FRU_Id1 == 0 and FRU_Id2 == 0 and FRU_Id3 == 0 and FRU_Id4 == 0:
FRU_Id_str = ' - Default value, invalid FRU ID'
return f'''
- Section Type : {sectionType}
- Error Severity : {errorSeverity} - {errorSeverity_str}
- Revision : 0x{revision:04X}{revision_str}
- Validation Bits : 0x{validationBits:02X}
- Flags : 0x{flags:02X}
- Primary : 0x{flags & 1:02X}
- Containment Warning : 0x{flags & 2:02X}
- Reset : 0x{flags & 4:02X}
- Error Threshold Exceeded : 0x{flags & 8:02X}
- Resource Not Accessible : 0x{flags & 16:02X}
- Latent Error : 0x{flags & 32:02X}
- Propagated : 0x{flags & 64:02X}
- Overflow : 0x{flags & 128:02X}
- Reserved : 0x{flags & 256:02X}
+ Section Type : {sectionType}
+ Error Severity : {errorSeverity} - {errorSeverity_str}
+ Revision : 0x{revision:04X}{revision_str}
+ Validation Bits : 0x{validationBits:02X}
+ Flags : 0x{flags:02X}
+ Primary : 0x{flags & 1:02X}
+ Containment Warning : 0x{flags & 2:02X}
+ Reset : 0x{flags & 4:02X}
+ Error Threshold Exceeded : 0x{flags & 8:02X}
+ Resource Not Accessible : 0x{flags & 16:02X}
+ Latent Error : 0x{flags & 32:02X}
+ Propagated : 0x{flags & 64:02X}
+ Overflow : 0x{flags & 128:02X}
+ Reserved : 0x{flags & 256:02X}
Error Data Length : 0x{errDataLen:08X} ( {errDataLen:d} )
- FRU Id : {FRU_Id1} {FRU_Id2} {FRU_Id3} {FRU_Id4}{FRU_Id_str}
- FRU Text : {FRU_Text}
- Timestamp : {timestamp:d} - {timestamp_str}
+ FRU Id : {FRU_Id1} {FRU_Id2} {FRU_Id3} {FRU_Id4}{FRU_Id_str}
+ FRU Text : {FRU_Text}
+ Timestamp : {timestamp:d} - {timestamp_str}
Data : {data}'''
-
-
-[docs]
- def parseErrorBlock(self, table_content: bytes) -> None:
+[docs] def parseErrorBlock(self, table_content: bytes) -> None:
errorSeverities = ['Recoverable', 'Fatal', 'Corrected', 'None', 'Unknown severity entry']
blockStatus = struct.unpack('<L', table_content[0:4])[0]
rawDataOffset = struct.unpack('<L', table_content[4:8])[0]
@@ -1168,38 +1031,33 @@ Source code for chipsec.hal.acpi_tables
errorSeverity_str = errorSeverities[errorSeverity]
self.BootRegion = f'''
Generic Error Status Block
- Block Status : 0x{blockStatus:08X}
- Correctable Error Valid : 0x{blockStatus & 1:08X}
- Uncorrectable Error Valid : 0x{blockStatus & 2:08X}
- Multiple Uncorrectable Errors : 0x{blockStatus & 4:08X}
- Multiple Correctable Errors : 0x{blockStatus & 8:08X}
- Error Data Entry Count : 0x{blockStatus & 1023:08X}
- Reserved : 0x{blockStatus & 262143:08X}
+ Block Status : 0x{blockStatus:08X}
+ Correctable Error Valid : 0x{blockStatus & 1:08X}
+ Uncorrectable Error Valid : 0x{blockStatus & 2:08X}
+ Multiple Uncorrectable Errors : 0x{blockStatus & 4:08X}
+ Multiple Correctable Errors : 0x{blockStatus & 8:08X}
+ Error Data Entry Count : 0x{blockStatus & 1023:08X}
+ Reserved : 0x{blockStatus & 262143:08X}
Raw Data Offset : 0x{rawDataOffset:08X} ( {rawDataOffset:d} )
Raw Data Length : 0x{rawDataLen:08X} ( {rawDataLen:d} )
Data Length : 0x{dataLen:08X} ( {dataLen:d} )
- Error Severity : 0x{errorSeverity:08X} - {errorSeverity_str}
- Generic Error Data Entries{genErrorDataEntries}
+ Error Severity : 0x{errorSeverity:08X} - {errorSeverity_str}
+ Generic Error Data Entries{genErrorDataEntries}
'''
-
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
self.BootRegionLen = struct.unpack('<L', table_content[0:4])[0]
self.BootRegionAddr = struct.unpack('<Q', table_content[4:12])[0]
self.parseErrorBlock(self.bootRegion)
-
def __str__(self) -> str:
return f"""
------------------------------------------------------------------
- Boot Region Length : {self.BootRegionLen:d}
- Boot Region Address : 0x{self.BootRegionAddr:016X}
- Boot Region - {self.BootRegion}
+ Boot Region Length : {self.BootRegionLen:d}
+ Boot Region Address : 0x{self.BootRegionAddr:016X}
+ Boot Region - {self.BootRegion}
"""
-
########################################################################################################
#
# EINJ Table
@@ -1207,21 +1065,14 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class EINJ (ACPI_TABLE):
+[docs]class EINJ (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parseAddress(self, table_content: bytes) -> str:
+
-
-
-[docs]
- def parseInjection(self, table_content: bytes) -> None:
+[docs] def parseInjection(self, table_content: bytes) -> None:
errorInjectActions = ['BEGIN_INJECTION_OPERATION', 'GET_TRIGGER_ERROR_ACTION', 'SET_ERROR_TYPE', 'GET_ERROR_TYPE', 'END_OPERATION', 'EXECUTE_OPERATION',
'CHECK_BUSY_STATUS', 'GET_COMMAND_STATUS', 'SET_ERROR_TYPE_WITH_ADDRESS', 'GET_EXECUTE_OPERATION_TIMING', 'not recognized as valid aciton']
injectionInstructions = ['READ_REGISTER', 'READ_REGISTER_VALUE', 'WRITE_REGISTER', 'WRITE_REGISTER_VALUE', 'NOOP', 'not recognized as valid instruction']
@@ -1255,28 +1106,22 @@ Source code for chipsec.hal.acpi_tables
reserved_str = ''
self.results_str += f"""
Injection Instruction Entry
- Injection Action : 0x{injectionAction:02X} ( {injectionAction:d} ) - {injectionAction_str}
- Instruction : 0x{instruction:02X} ( {instruction:d} ) - {instruction_str}
- Flags : 0x{flags:02X} ( {flags:d} ){flags_str}
- Reserved : 0x{reserved:02X} ( {reserved:d} ){reserved_str}
- Register Region - {registerRegion}
+ Injection Action : 0x{injectionAction:02X} ( {injectionAction:d} ) - {injectionAction_str}
+ Instruction : 0x{instruction:02X} ( {instruction:d} ) - {instruction_str}
+ Flags : 0x{flags:02X} ( {flags:d} ){flags_str}
+ Reserved : 0x{reserved:02X} ( {reserved:d} ){reserved_str}
+ Register Region - {registerRegion}
Value : 0x{value:016X} ( {value:d} )
Mask : 0x{mask:016X} ( {mask:d} )
"""
-
-
-[docs]
- def parseInjectionActionTable(self, table_contents: bytes, numInjections: int) -> None:
+[docs] def parseInjectionActionTable(self, table_contents: bytes, numInjections: int) -> None:
curInjection = 0
while curInjection < numInjections:
self.parseInjection(table_contents[curInjection * 32:(curInjection + 1) * 32])
curInjection += 1
-
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
injectionHeaderSz = struct.unpack('<L', table_content[0:4])[0]
injectionFlags = struct.unpack('<B', table_content[4:5])[0]
reserved1 = struct.unpack('<B', table_content[5:6])[0]
@@ -1295,17 +1140,15 @@ Source code for chipsec.hal.acpi_tables
self.results_str = f"""
------------------------------------------------------------------
Injection Header Size : 0x{injectionHeaderSz:016X} ( {injectionHeaderSz:d} )
- Injection Flags : 0x{injectionFlags:02X}{injection_str}
- Reserved : 0x{reserved:06X}{reserved_str}
+ Injection Flags : 0x{injectionFlags:02X}{injection_str}
+ Reserved : 0x{reserved:06X}{reserved_str}
Injection Entry Count : 0x{injectionEntryCount:08X} ( {injectionEntryCount:d} )
Injection Instruction Entries
"""
-
def __str__(self) -> str:
return self.results_str
-
########################################################################################################
#
# ERST Table
@@ -1313,30 +1156,20 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class ERST (ACPI_TABLE):
+[docs]class ERST (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parseAddress(self, table_content: bytes) -> str:
+
-
-
-[docs]
- def parseActionTable(self, table_content: bytes, instrCountEntry: int) -> None:
+[docs] def parseActionTable(self, table_content: bytes, instrCountEntry: int) -> None:
curInstruction = 0
while curInstruction < instrCountEntry:
self.parseInstructionEntry(table_content[32 * curInstruction:])
curInstruction += 1
-
-
-[docs]
- def parseInstructionEntry(self, table_content: bytes) -> None:
+[docs] def parseInstructionEntry(self, table_content: bytes) -> None:
serializationInstr_str = ''
serializationAction = struct.unpack('<B', table_content[0:1])[0]
instruction = struct.unpack('<B', table_content[1:2])[0]
@@ -1369,19 +1202,16 @@ Source code for chipsec.hal.acpi_tables
self.results_str += f'''
Serialization Intruction Entry
- Serialized Action : 0x{serializationAction:02X} - {serializationAction_str}
- Instruction : 0x{instruction:02X} - {serializationInstr_str}
- Flags : 0x{flags:02X}{flags_str}
- Reserved : 0x{reserved:02X}{reserved_str}
- Register Region - {registerRegion}
- Value : 0x{value:016X}
- Mask : 0x{mask:016X}
+ Serialized Action : 0x{serializationAction:02X} - {serializationAction_str}
+ Instruction : 0x{instruction:02X} - {serializationInstr_str}
+ Flags : 0x{flags:02X}{flags_str}
+ Reserved : 0x{reserved:02X}{reserved_str}
+ Register Region - {registerRegion}
+ Value : 0x{value:016X}
+ Mask : 0x{mask:016X}
'''
-
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
headerSz = struct.unpack('<L', table_content[0:4])[0]
reserved = struct.unpack('<L', table_content[4:8])[0]
instrCountEntry = struct.unpack('<L', table_content[8:12])[0]
@@ -1392,17 +1222,15 @@ Source code for chipsec.hal.acpi_tables
self.results_str = f"""
------------------------------------------------------------------
Serialization Header Size : 0x{headerSz:08X} ( {headerSz:d} )
- Reserved : 0x{reserved:08X}{reserved_str}
+ Reserved : 0x{reserved:08X}{reserved_str}
Instruction Count Entry : 0x{instrCountEntry:08X} ( {instrCountEntry:d} )
Serialization Action Table
"""
self.parseActionTable(table_content[12:], instrCountEntry)
-
def __str__(self) -> str:
return self.results_str
-
########################################################################################################
#
# HEST Table
@@ -1410,15 +1238,11 @@ Source code for chipsec.hal.acpi_tables
########################################################################################################
-
-[docs]
-class HEST (ACPI_TABLE):
+[docs]class HEST (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parseErrEntry(self, table_content: bytes) -> Optional[int]:
+[docs] def parseErrEntry(self, table_content: bytes) -> Optional[int]:
_type = struct.unpack('<H', table_content[0:2])[0]
if _type == 0: # Arch Machine Check Execption Structure
return self.parseAMCES(table_content)
@@ -1432,10 +1256,7 @@ Source code for chipsec.hal.acpi_tables
return self.parseGHESS(table_content, _type)
return
-
-
-[docs]
- def parseNotify(self, table_content: bytes) -> str:
+[docs] def parseNotify(self, table_content: bytes) -> str:
types = ['Polled', 'External Interrupt', 'Local Interrupt', 'SCI', 'NMI', 'CMCI', 'MCE', 'GPI-Signal',
'ARMv8 SEA', 'ARMv8 SEI', 'External Interrupt - GSIV', 'Software Delicated Exception', 'Reserved']
errorType = struct.unpack('<B', table_content[0:1])[0]
@@ -1458,27 +1279,24 @@ Source code for chipsec.hal.acpi_tables
vector_str = 'Specifies the GSIV triggerd by error source'
return f"""Hardware Error Notification Structure
- Type : {errorType:d} - {typeStr}
- Length : 0x{length:02X}
- Configuration Write Enable : 0x{configWrEn:04X}
- Type : {configWrEn & 1:d}
- Poll Interval : {configWrEn & 2:d}
- Switch To Polling Threshold Value : {configWrEn & 4:d}
- Switch To Polling Threshold Window : {configWrEn & 8:d}
- Error Threshold Value : {configWrEn & 16:d}
- Error Threshold Window : {configWrEn & 32:d}
+ Type : {errorType:d} - {typeStr}
+ Length : 0x{length:02X}
+ Configuration Write Enable : 0x{configWrEn:04X}
+ Type : {configWrEn & 1:d}
+ Poll Interval : {configWrEn & 2:d}
+ Switch To Polling Threshold Value : {configWrEn & 4:d}
+ Switch To Polling Threshold Window : {configWrEn & 8:d}
+ Error Threshold Value : {configWrEn & 16:d}
+ Error Threshold Window : {configWrEn & 32:d}
Poll Interval : {pollInterval:d} milliseconds
- Vector : {vector:d}{vector_str}
- Switch To Polling Threshold Value : 0x{switchPollingThreshVal:08X}
+ Vector : {vector:d}{vector_str}
+ Switch To Polling Threshold Value : 0x{switchPollingThreshVal:08X}
Switch To Polling Threshold Window : {errThreshVal:d} milliseconds
- Error Threshold Value : 0x{errThreshVal:08X}
+ Error Threshold Value : 0x{errThreshVal:08X}
Error Threshold Window : {errThreshWind:d} milliseconds
"""
-
-
-[docs]
- def machineBankParser(self, table_content: bytes) -> None:
+[docs] def machineBankParser(self, table_content: bytes) -> None:
bankNum = struct.unpack('<B', table_content[0:1])[0]
clearStatus = struct.unpack('<B', table_content[1:2])[0]
statusDataFormat = struct.unpack('<B', table_content[2:3])[0]
@@ -1521,26 +1339,20 @@ Source code for chipsec.hal.acpi_tables
miscRegMSTAddr_str = ' - Ignore'
self.resultsStr += f"""Machine Check Error Bank Structure
- Bank Number : 0x{bankNum:04X}
- Clear Status On Initialization : 0x{clearStatus:04X} - {clearStatus_str}
- Status Data Format : 0x{statusDataFormat:04X} - {statusDataFormat_str}
- Reserved : 0x{reserved1:04X}
- Control Register MSR Address : 0x{controlRegMsrAddr:04X}{controlRegMsrAddr_str}
- Control Init Data : 0x{controlInitData:04X}
- Status Register MSR Address : 0x{statusRegMSRAddr:04X}{statusRegMSRAddr_str}
- Address Register MSR Address : 0x{addrRegMSRAddr:04X}{addrRegMSRAddr_str}
+ Bank Number : 0x{bankNum:04X}
+ Clear Status On Initialization : 0x{clearStatus:04X} - {clearStatus_str}
+ Status Data Format : 0x{statusDataFormat:04X} - {statusDataFormat_str}
+ Reserved : 0x{reserved1:04X}
+ Control Register MSR Address : 0x{controlRegMsrAddr:04X}{controlRegMsrAddr_str}
+ Control Init Data : 0x{controlInitData:04X}
+ Status Register MSR Address : 0x{statusRegMSRAddr:04X}{statusRegMSRAddr_str}
+ Address Register MSR Address : 0x{addrRegMSRAddr:04X}{addrRegMSRAddr_str}
Misc Register MSR Address : 0x{miscRegMSTAddr:04X}{miscRegMSTAddr_str}"""
-
-
-[docs]
- def parseAddress(self, table_content: bytes) -> str:
+
-
-
-[docs]
- def parseAMCES(self, table_content: bytes) -> int:
+[docs] def parseAMCES(self, table_content: bytes) -> int:
sourceID = struct.unpack('<H', table_content[2:4])[0]
reserved1 = struct.unpack('<H', table_content[4:6])[0]
flags = struct.unpack('<B', table_content[6:7])[0]
@@ -1577,17 +1389,17 @@ Source code for chipsec.hal.acpi_tables
self.resultsStr += f"""
Architecture Machine Check Exception Structure
- Source ID : 0x{sourceID:04X}
- Reserved : 0x{reserved1:04X}
- Flags : 0x{flags:02X}
- FIRMWARE_FIRST : {firmware_first} - {firmware_first_str}
- GHES_ASSIST : {ghes_assist} - {ghes_assist_str}
- Enabled : 0x{enabled:02X}
- Number of Records to Pre-allocate : 0x{recordsToPreAllocate:08X}
- Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
- Global Capability Init Data : 0x{globalCapabilityInitData:016X}
- Number of Hardware Banks : 0x{numHardwareBanks:02X}
- Reserved : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X} 0x{reserved2_4:02X} 0x{reserved2_5:02X} 0x{reserved2_6:02X} 0x{reserved2_7:02X}
+ Source ID : 0x{sourceID:04X}
+ Reserved : 0x{reserved1:04X}
+ Flags : 0x{flags:02X}
+ FIRMWARE_FIRST : {firmware_first} - {firmware_first_str}
+ GHES_ASSIST : {ghes_assist} - {ghes_assist_str}
+ Enabled : 0x{enabled:02X}
+ Number of Records to Pre-allocate : 0x{recordsToPreAllocate:08X}
+ Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
+ Global Capability Init Data : 0x{globalCapabilityInitData:016X}
+ Number of Hardware Banks : 0x{numHardwareBanks:02X}
+ Reserved : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X} 0x{reserved2_4:02X} 0x{reserved2_5:02X} 0x{reserved2_6:02X} 0x{reserved2_7:02X}
"""
curBankNum = 0
while curBankNum < numHardwareBanks:
@@ -1595,10 +1407,7 @@ Source code for chipsec.hal.acpi_tables
curBankNum += 1
return 40 + numHardwareBanks * 28
-
-
-[docs]
- def parseAMCS(self, table_content: bytes, _type: int) -> int:
+[docs] def parseAMCS(self, table_content: bytes, _type: int) -> int:
sourceID = struct.unpack('<H', table_content[2:4])[0]
reserved1 = struct.unpack('<H', table_content[4:6])[0]
flags = struct.unpack('<B', table_content[6:7])[0]
@@ -1638,18 +1447,18 @@ Source code for chipsec.hal.acpi_tables
title = 'Architecture Deferred Machine Check Structure'
self.resultsStr += f"""
- {title}
- Source ID : 0x{sourceID:04X}
- Reserved : 0x{reserved1:04X}
- Flags : 0x{flags:02X}{flags_str}
- FIRMWARE_FIRST : {firmware_first} - {firmware_first_str}
- GHES_ASSIST : {ghes_assist} - {ghes_assist_str}
- Enabled : 0x{enabled:02X}
- Number of Records to Pre-allocate : 0x{recordsToPreAllocate:08X}
- Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
- {notificationStructure}
- Number of Hardware Banks : 0x{numHardwareBanks:02X}
- Reserved : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X}
+ {title}
+ Source ID : 0x{sourceID:04X}
+ Reserved : 0x{reserved1:04X}
+ Flags : 0x{flags:02X}{flags_str}
+ FIRMWARE_FIRST : {firmware_first} - {firmware_first_str}
+ GHES_ASSIST : {ghes_assist} - {ghes_assist_str}
+ Enabled : 0x{enabled:02X}
+ Number of Records to Pre-allocate : 0x{recordsToPreAllocate:08X}
+ Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
+ {notificationStructure}
+ Number of Hardware Banks : 0x{numHardwareBanks:02X}
+ Reserved : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X}
"""
currBank = 0
@@ -1658,10 +1467,7 @@ Source code for chipsec.hal.acpi_tables
currBank += 1
return 48 + numHardwareBanks * 28
-
-
-[docs]
- def parseNMIStructure(self, table_content: bytes) -> int:
+[docs] def parseNMIStructure(self, table_content: bytes) -> int:
sourceID = struct.unpack('<H', table_content[2:4])[0]
reserved = struct.unpack('<L', table_content[4:8])[0]
numRecordsToPreAllocate = struct.unpack('<L', table_content[8:12])[0]
@@ -1675,18 +1481,15 @@ Source code for chipsec.hal.acpi_tables
self.resultsStr += f"""
Architecture NMI Error Structure
- Source ID : 0x{sourceID:04X}
- Reserved : 0x{reserved:08X}{reserved_str}
- Number of Records to Pre-Allocate : 0x{numRecordsToPreAllocate:08X}
- Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
- Max Raw Data Length : 0x{maxRawDataLength:08X}
+ Source ID : 0x{sourceID:04X}
+ Reserved : 0x{reserved:08X}{reserved_str}
+ Number of Records to Pre-Allocate : 0x{numRecordsToPreAllocate:08X}
+ Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
+ Max Raw Data Length : 0x{maxRawDataLength:08X}
"""
return 20
-
-
-[docs]
- def parsePCIe(self, table_content: bytes, _type: int) -> int:
+[docs] def parsePCIe(self, table_content: bytes, _type: int) -> int:
sourceID = struct.unpack('<H', table_content[2:4])[0]
reserved1 = struct.unpack('<H', table_content[4:6])[0]
flags = struct.unpack('<B', table_content[6:7])[0]
@@ -1714,8 +1517,8 @@ Source code for chipsec.hal.acpi_tables
secondaryUncorrErrServ = struct.unpack('<L', table_content[48:52])[0]
secondaryAdvCapabAndControl = struct.unpack('<L', table_content[52:56])[0]
extra_str = f'''
- Secondary Uncorrectable Error Mask : 0x{secondaryUncorrErrMask:08X}
- Secondary Uncorrectable Error Severity : 0x{secondaryUncorrErrServ:08X}
+ Secondary Uncorrectable Error Mask : 0x{secondaryUncorrErrMask:08X}
+ Secondary Uncorrectable Error Severity : 0x{secondaryUncorrErrServ:08X}
Secondary Advanced Capabilities and Control : 0x{secondaryAdvCapabAndControl:08X}'''
size = 56
else:
@@ -1751,31 +1554,28 @@ Source code for chipsec.hal.acpi_tables
isFirmware_str = ' - This field should be ignored since FIRMWARE_FIRST is set'
self.resultsStr += f"""
- {title}
- Source ID : 0x{sourceID:04X}
- Reserved : 0x{reserved1:08X}
- Flags : 0x{flags:02X}{flags_str}
- FIRMWARE_FIRST : {firmware_first} - {firmware_first_str} {isFirmware_str}
- GLOBAL : {global_flag} - {global_flag_str}
- Enabled : 0x{enabled:08X}
- Number of Records to Pre-Allocate : 0x{numRecordsToPreAllocate:08X}
- Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
- Bus : 0x{bus:08X}
- Device : 0x{device:04X}{isGlobal_str}
- Function : 0x{function:04X}{isGlobal_str}
- Device Control : 0x{deviceControl:04X}
- Reserved : 0x{reserved2:04X}{reserved2_str}
- Uncorrectable Error Mask : 0x{uncorrectableErrorMask:08X}
- Uncorrected Error Severity : 0x{uncorrectableErrorServerity:08X}
- Corrected Error Mask : 0x{correctableErrorMask:08X}
- Advanced Error Capabilities and Control : 0x{advancedErrorCapabilitiesAndControl:08X}{extra_str}
+ {title}
+ Source ID : 0x{sourceID:04X}
+ Reserved : 0x{reserved1:08X}
+ Flags : 0x{flags:02X}{flags_str}
+ FIRMWARE_FIRST : {firmware_first} - {firmware_first_str} {isFirmware_str}
+ GLOBAL : {global_flag} - {global_flag_str}
+ Enabled : 0x{enabled:08X}
+ Number of Records to Pre-Allocate : 0x{numRecordsToPreAllocate:08X}
+ Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
+ Bus : 0x{bus:08X}
+ Device : 0x{device:04X}{isGlobal_str}
+ Function : 0x{function:04X}{isGlobal_str}
+ Device Control : 0x{deviceControl:04X}
+ Reserved : 0x{reserved2:04X}{reserved2_str}
+ Uncorrectable Error Mask : 0x{uncorrectableErrorMask:08X}
+ Uncorrected Error Severity : 0x{uncorrectableErrorServerity:08X}
+ Corrected Error Mask : 0x{correctableErrorMask:08X}
+ Advanced Error Capabilities and Control : 0x{advancedErrorCapabilitiesAndControl:08X}{extra_str}
"""
return size
-
-
-[docs]
- def parseGHESS(self, table_content: bytes, _type: int) -> int:
+[docs] def parseGHESS(self, table_content: bytes, _type: int) -> int:
sourceID = struct.unpack('<H', table_content[2:4])[0]
relatedSourceID = struct.unpack('<H', table_content[4:6])[0]
flags = struct.unpack('<B', table_content[6:7])[0]
@@ -1795,8 +1595,8 @@ Source code for chipsec.hal.acpi_tables
readAckPresv = struct.unpack('<Q', table_content[76:84])[0]
readAckWr = struct.unpack('<Q', table_content[84:88])[0]
extra_str = f'''
- Read Ack Register - {readAckReg_str}
- Read Ack Preserve : 0x{readAckPresv:016X}
+ Read Ack Register - {readAckReg_str}
+ Read Ack Preserve : 0x{readAckPresv:016X}
Read Ack Write : 0x{readAckWr:016X}'''
if relatedSourceID == 65535:
relatedSourceID_str = 'Does not represent an alternate souce'
@@ -1804,28 +1604,25 @@ Source code for chipsec.hal.acpi_tables
relatedSourceID_str = ''
self.resultsStr += f"""
- {title}
- Source ID : 0x{sourceID:04X}
- Related Source Id : 0x{relatedSourceID:08X}{relatedSourceID_str}
+ {title}
+ Source ID : 0x{sourceID:04X}
+ Related Source Id : 0x{relatedSourceID:08X}{relatedSourceID_str}
Flags : 0x{flags:02X} - Reserved
- Enabled : 0x{enabled:02X}
- Number of Records to Pre-Allocate : 0x{numRecordsToPreAllocate:08X}
- Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
- Max Raw Data Length : 0x{maxRawDataLength:08X}
- Error Status Address - {address_str}
- {notification_str}
- Error Status Block Length : 0x{errStatusBlockLen:08X}{extra_str}
+ Enabled : 0x{enabled:02X}
+ Number of Records to Pre-Allocate : 0x{numRecordsToPreAllocate:08X}
+ Max Sections Per Record : 0x{maxSectorsPerRecord:08X}
+ Max Raw Data Length : 0x{maxRawDataLength:08X}
+ Error Status Address - {address_str}
+ {notification_str}
+ Error Status Block Length : 0x{errStatusBlockLen:08X}{extra_str}
"""
return 64
-
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
self.ErrorSourceCount = struct.unpack('<L', table_content[0:4])[0]
self.resultsStr = f"""
------------------------------------------------------------------
- Error Source Count : {self.ErrorSourceCount}
+ Error Source Count : {self.ErrorSourceCount}
"""
nextTable = 4
currErrSource = 0
@@ -1835,53 +1632,38 @@ Source code for chipsec.hal.acpi_tables
nextTable += table_entry
currErrSource += 1
-
def __str__(self) -> str:
return self.resultsStr
-
########################################################################################################
#
# SPMI Table
#
########################################################################################################
-
-[docs]
-class SPMI (ACPI_TABLE):
+[docs]class SPMI (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parseAddress(self, table_content: bytes) -> str:
+
-
-
-[docs]
- def parseNonUID(self, table_content: bytes) -> str:
+[docs] def parseNonUID(self, table_content: bytes) -> str:
pciSegGrpNum = struct.unpack('<B', table_content[0:1])[0]
pciBusNum = struct.unpack('<B', table_content[1:2])[0]
pciDevNum = struct.unpack('<B', table_content[2:3])[0]
pciFuncNum = struct.unpack('<B', table_content[3:4])[0]
- return f''' PCI Segment GroupNumber : 0x{pciSegGrpNum:02X}
- PCI Bus Number : 0x{pciBusNum:02X}
- PCI Device Number : 0x{pciDevNum:02X}
+ return f''' PCI Segment GroupNumber : 0x{pciSegGrpNum:02X}
+ PCI Bus Number : 0x{pciBusNum:02X}
+ PCI Device Number : 0x{pciDevNum:02X}
PCI Function Number : 0x{pciFuncNum:02X}'''
-
-
-[docs]
- def parseUID(self, table_content: bytes) -> str:
+[docs] def parseUID(self, table_content: bytes) -> str:
uid = struct.unpack('<L', table_content[0:4])[0]
return f''' UID : 0x{uid:02X}'''
-
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
interfaceType = struct.unpack('<B', table_content[0:1])[0]
reserved1 = struct.unpack('<B', table_content[1:2])[0]
specRev = struct.unpack('<B', table_content[2:3])[0]
@@ -1931,46 +1713,40 @@ Source code for chipsec.hal.acpi_tables
self.results = f'''==================================================================
Service Processor Management Interface Description Table ( SPMI )
==================================================================
- Interface Type : 0x{interfaceType:02X} - {intTypeStr}
+ Interface Type : 0x{interfaceType:02X} - {intTypeStr}
Reserved : 0x{reserved1:02X} - Must always be 01h to be compatible with any software implementing previous versions of the spec
- Specification Revision (version) : {specRevStr}
- Interrupt Type : 0x{interruptType:04X}
- SCI triggered through GPE : 0x{intType_0:02X} - {intTypeSCIGPE}
- I/0 APIC/SAPIC interrupt (Global System Interrupt) : 0x{intType_1:02X} - {intTypeIO}
+ Specification Revision (version) : {specRevStr}
+ Interrupt Type : 0x{interruptType:04X}
+ SCI triggered through GPE : 0x{intType_0:02X} - {intTypeSCIGPE}
+ I/0 APIC/SAPIC interrupt (Global System Interrupt) : 0x{intType_1:02X} - {intTypeIO}
Reserved : 0x{intType_other:02X} - Must be 0
- GPE : 0x{gpe:02X}{GPE_str}
+ GPE : 0x{gpe:02X}{GPE_str}
Reserved : 0x{reserved2:02X} - should be 00h
- PCI Device Flag : 0x{pciDeviceFlag:02X}
- PCI Device Flag : {pciDeviceFlag_0:d} {pci_str}
+ PCI Device Flag : 0x{pciDeviceFlag:02X}
+ PCI Device Flag : {pciDeviceFlag_0:d} {pci_str}
Reserved : {pciDeviceFlag_reserved:d} - must be 0
- Global System Interrupt : 0x{globalSysInter:08X}{globalSysInt_str}
- Base Address - {baseAdder}
-{otherStr}
- Reserved : 0x{reserved3:02X}
+ Global System Interrupt : 0x{globalSysInter:08X}{globalSysInt_str}
+ Base Address - {baseAdder}
+{otherStr}
+ Reserved : 0x{reserved3:02X}
'''
-
def __str__(self) -> str:
return self.results
-
########################################################################################################
#
# RASF Table
#
########################################################################################################
-
-[docs]
-class RASF (ACPI_TABLE):
+[docs]class RASF (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parse(self, table_content: bytes) -> None:
+[docs] def parse(self, table_content: bytes) -> None:
rpcci1 = struct.unpack('<B', table_content[0:1])[0]
rpcci2 = struct.unpack('<B', table_content[1:2])[0]
rpcci3 = struct.unpack('<B', table_content[2:3])[0]
@@ -1986,31 +1762,25 @@ Source code for chipsec.hal.acpi_tables
self.results = f'''==================================================================
ACPI RAS Feature Table ( RASF )
==================================================================
- RASF Platform Communication Channel Identifier : 0x{rpcci1:02X} 0x{rpcci2:02X} 0x{rpcci3:02X} 0x{rpcci4:02X} 0x{rpcci5:02X} 0x{rpcci6:02X} 0x{rpcci7:02X} 0x{rpcci8:02X} 0x{rpcci9:02X} 0x{rpcci10:02X} 0x{rpcci11:02X} 0x{rpcci12:02X}
+ RASF Platform Communication Channel Identifier : 0x{rpcci1:02X} 0x{rpcci2:02X} 0x{rpcci3:02X} 0x{rpcci4:02X} 0x{rpcci5:02X} 0x{rpcci6:02X} 0x{rpcci7:02X} 0x{rpcci8:02X} 0x{rpcci9:02X} 0x{rpcci10:02X} 0x{rpcci11:02X} 0x{rpcci12:02X}
'''
-
def __str__(self) -> str:
return self.results
-
########################################################################################################
#
# MSCT Table
#
########################################################################################################
-
-[docs]
-class MSCT (ACPI_TABLE):
+[docs]class MSCT (ACPI_TABLE):
def __init__(self):
return
-
-[docs]
- def parseProx(self, table_content: bytes, val: int) -> str:
+[docs] def parseProx(self, table_content: bytes, val: int) -> str:
rev = struct.unpack('<B', table_content[0:1])[0]
length = struct.unpack('<B', table_content[1:2])[0]
maxDomRangeL = struct.unpack('<L', table_content[2:6])[0]
@@ -2027,17 +1797,14 @@ Source code for chipsec.hal.acpi_tables
Maximum Proximity Domain Informaiton Structure[{val:d}]
Revision : 0x{rev:02X} ( {rev:d} )
Length : 0x{length:02X} ( {length:d} )
- Proximity Domain Range (low) : 0x{maxDomRangeL:04X}
- Proximity Domain Range (high) : 0x{maxDomRangeH:04X}
- Maximum Processor Capacity : 0x{maxProcCap:04X} ( {maxProcCap:d} ){maxProcCap_str}
- Maximum Memory Capacity : 0x{maxMemCap:016X} ( {maxMemCap:d} ) bytes {maxMemCap_str}
+ Proximity Domain Range (low) : 0x{maxDomRangeL:04X}
+ Proximity Domain Range (high) : 0x{maxDomRangeH:04X}
+ Maximum Processor Capacity : 0x{maxProcCap:04X} ( {maxProcCap:d} ){maxProcCap_str}
+ Maximum Memory Capacity : 0x{maxMemCap:016X} ( {maxMemCap:d} ) bytes {maxMemCap_str}
'''
-
-