cpu_compiler.c

#include "common.h"
 #define EXCEPTFMT  "%s -- PC = %#08X\n"
 //Defines exceptions
 //Called by asm_exception_handler 
 void 
 uc_exception_handler(void *framep) 
 {
     switch(uc_RD_SF_FORMAT(framep))
     {
         case 4:
         case 5:
         case 6:
         case 7:
             break;
         default:
             printf(EXCEPTFMT,"Stack type is illegal", uc_SF_PC(framep));
             break;
     }
 
     switch(uc_RD_SF_VECTOR(framep))
     {
         case 2:
             printf(EXCEPTFMT, "Error acces", uc_SF_PC(framep));
             switch(uc_RD_SF_FS(framep))
             {
                 case 4:
                     printf("instruction fetch error");
                     break;
                 case 8:
                     printf("operand - write error");
                     break;
                 case 12:
                     printf("operand - read error");
                     break;
                 default:
                     printf("reserved");
                     break;
             }
             break;
         case 3:
             printf(EXCEPTFMT, "Error address", uc_SF_PC(framep));
             switch(uc_RD_SF_FS(framep))
             {
                 case 4:
                     printf("instruction fetch error");
                     break;
                 case 8:
                     printf("operand - write error");
                     break;
                 case 12:
                     printf("operand - read error");
                     break;
                 default:
                     printf("reserved");
                     break;
             }
             break;
         case 4:
             printf(EXCEPTFMT, "Illegal instruction", uc_SF_PC(framep));
             break;
         case 8:
             printf(EXCEPTFMT, "Privilege violation", uc_SF_PC(framep));
             break;
         case 9:
             printf(EXCEPTFMT, "Trace Exception", uc_SF_PC(framep));
             break;
         default:
             cpu_handle_interrupt(uc_RD_SF_VECTOR(framep));
             break;
     }
 }
 
 //d0-the reset value of data register zero
 //d1-the reset value of data register one
 void
 uc_interpret_d0d1(int d0, int d1)
 {
 #ifdef DEBUG_PRINT
     switch (uc_D1_BUSW(d1))
     {
         case 0:
             printf("32-bit");
             break;
         default:
             printf("Reserved");
     }
     printf("Debug Version:         ");
     switch (uc_D0_DEBUG(d0))
     {
         case 0:
             printf("A\n");
             break;
         case 1:
             printf("B\n");
             break;
         case 2:
             printf("C\n");
             break;
         case 3:
             printf("D\n");
             break;
         case 4:
             printf("E\n");
             break;
         case 9:
             printf("B+\n");
             break;
         default :
             printf("Reserved\n");
     }
     printf("MAC: %s\n", uc_D0_MAC(d0) ? "Yes" : "No");
     printf("DIV: %s\n", uc_D0_DIV(d0) ? "Yes" : "No");
     printf("EMAC: %s\n", uc_D0_EMAC(d0) ? "Yes" : "No");
     printf("FPU: %s\n", uc_D0_FPU(d0) ? "Yes" : "No");
     printf("MMU: %s\n", uc_D0_MMU(d0) ? "Yes" : "No");
     printf("RAM Bank 0 Size: ");
     switch (uc_D1_RAM0SIZ(d1))
     {
         case 0:
         case 1:
         case 2:
         case 3:
             printf("None\n");
             break;
         case 4:
             printf("4KB\n");
             break;
         case 5:
             printf("8KB\n");
             break;
         case 6:
             printf("16KB\n");
             break;
         case 7:
             printf("32KB\n");
             break;
         case 8:
             printf("64KB\n");
             break;
         case 9:
             printf("128KB\n");
             break;
         case 10:
             printf("256KB\n");
             break;
         case 11:
             printf("512KB\n");
             break;
         default:
             printf("Reserved\n");
     }
     printf("RAM Bank 1 Size:");
     switch (uc_D1_RAM1SIZ(d1))
     {
         case 0:
         case 1:
         case 2:
         case 3:
             printf("None\n");
             break;
         case 4:
             printf("4KB\n");
             break;
         case 5:
             printf("8KB\n");
             break;
         case 6:
             printf("16KB\n");
             break;
         case 7:
             printf("32KB\n");
             break;
         case 8:
             printf("64KB\n");
             break;
         case 9:
             printf("128KB\n");
             break;
         case 10:
             printf("256KB\n");
             break;
         case 11:
             printf("512KB\n");
             break;
         default:
             printf("Reserved\n");
     }
     printf("ROM Bank 0 Size:       ");
     switch (uc_D1_ROM0SIZ(d1))
     {
         case 0:
         case 1:
         case 2:
         case 3:
             printf("None\n");
             break;
         case 4:
             printf("4KB\n");
             break;
         case 5:
             printf("8KB\n");
             break;
         case 6:
             printf("16KB\n");
             break;
         case 7:
             printf("32KB\n");
             break;
         case 8:
             printf("64KB\n");
             break;
         case 9:
             printf("128KB\n");
         default:
             printf("Reserved\n");
     }
     printf("ROM Bank 1 Size:       ");
     switch (uc_D1_ROM1SIZ(d1))
     {
         case 0:
         case 1:
         case 2:
         case 3:
             printf("None\n");
             break;
         case 4:
             printf("4KB\n");
             break;
         case 5:
             printf("8KB\n");
             break;
         case 6:
             printf("16KB\n");
             break;
         case 7:
             printf("32KB\n");
             break;
         case 8:
             printf("64KB\n");
             break;
         case 9:
             printf("128KB\n");
         default:
             printf("Reserved\n");
     }
     printf("Cache Line Size:       ");
     switch (uc_D1_CL(d1))
     {
         case 0:
             printf("16-byte\n");
             break;
         default:
             printf("Reserved\n");
     }
     printf("I-Cache Size:          ");
     switch (uc_D1_ICSIZ(d1))
     {
         case 0:
             printf("None\n");
             break;
         case 1:
             printf("512B\n");
             break;
         case 2:
             printf("1KB\n"); 
             break;
         case 3:
             printf("2KB\n");
             break;
         case 4:
             printf("4KB\n");
             break;
         case 5:
             printf("8KB\n");
             break;
         case 6:
             printf("16KB\n");
             break;
         case 7:
             printf("32KB\n");
             break;
         case 8:
             printf("64KB\n");
             break;
         default:
             printf("Reserved\n");
     }
     printf("D-Cache Size:          ");
     switch (uc_D1_DCSIZ(d1))
     {
         case 0:
             printf("None\n");
             break;
         case 1:
             printf("512B\n");
             break;
         case 2:
             printf("1KB\n");
             break;
         case 3:
             printf("2KB\n");
             break;
         case 4:
             printf("4KB\n");
             break;
         case 5:
             printf("8KB\n");
             break;
         case 6:
             printf("16KB\n");
             break;
         case 7:
             printf("32KB\n");
             break;
         case 8:
             printf("64KB\n");
             break;
         default:
             printf("Reserved\n");
     }
     printf();
 #else
 	// Remove warnings from compiler.
 	( void ) d0;
 	( void ) d1;
 #endif
 }
 
 void
 uc_irq_enable (void)
 {
     asm_set_ipl(0);
 }
 
 void
 uc_irq_disable (void)
 {
     asm_set_ipl(7);
 }
 
 ADDRESS
 uc_set_handler (int vector, ADDRESS new_handler)
 {
     ADDRESS old_handler;
     extern uint32 __VECTOR_RAM[];
 
     old_handler = (ADDRESS) __VECTOR_RAM[vector];
     __VECTOR_RAM[vector] = (uint32)new_handler;
     return old_handler;
 }