From 055cd7cb22a1a14dcddbdf783dabc8cb15a5afa7 Mon Sep 17 00:00:00 2001 From: Spencer-Comin Date: Wed, 20 Sep 2023 11:25:46 -0400 Subject: [PATCH] Z: Split flag for transactional execution facility Previously both constrained and non-constrained transactional memory facility support were indicated with the OMR_FEATURE_S390_TE flag. This commit removes the OMR_FEATURE_S390_TE flag and adds a separate flag for each constrained and non-constrained transactional execution facilities. Signed-off-by: Spencer Comin --- compiler/z/codegen/OMRCodeGenerator.cpp | 2 +- compiler/z/env/OMRCPU.cpp | 42 +++++++++++--- compiler/z/env/OMRCPU.hpp | 75 +++++++++++++++---------- include_core/omrport.h | 8 ++- port/unix/omrsysinfo.c | 60 +++++++++++++++----- 5 files changed, 129 insertions(+), 58 deletions(-) diff --git a/compiler/z/codegen/OMRCodeGenerator.cpp b/compiler/z/codegen/OMRCodeGenerator.cpp index cbd487a8108..acd843bf1b2 100644 --- a/compiler/z/codegen/OMRCodeGenerator.cpp +++ b/compiler/z/codegen/OMRCodeGenerator.cpp @@ -532,7 +532,7 @@ OMR::Z::CodeGenerator::initialize() if (comp->target().cpu.isAtLeast(OMR_PROCESSOR_S390_ZEC12)) { - if (comp->target().cpu.supportsFeature(OMR_FEATURE_S390_TE) && !comp->getOption(TR_DisableTM)) + if (comp->target().cpu.supportsTransactionalMemoryInstructions() && !comp->getOption(TR_DisableTM)) cg->setSupportsTM(); } diff --git a/compiler/z/env/OMRCPU.cpp b/compiler/z/env/OMRCPU.cpp index 47247f1b8ab..ff035fde63c 100644 --- a/compiler/z/env/OMRCPU.cpp +++ b/compiler/z/env/OMRCPU.cpp @@ -53,7 +53,8 @@ OMR::Z::CPU::detect(OMRPortLibrary * const omrPortLib) if (processorDescription.processor < OMR_PROCESSOR_S390_ZEC12) { - omrsysinfo_processor_set_feature(&processorDescription, OMR_FEATURE_S390_TE, FALSE); + omrsysinfo_processor_set_feature(&processorDescription, OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY, FALSE); + omrsysinfo_processor_set_feature(&processorDescription, OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY, FALSE); omrsysinfo_processor_set_feature(&processorDescription, OMR_FEATURE_S390_RI, FALSE); } @@ -168,9 +169,11 @@ OMR::Z::CPU::supportsFeatureOldAPI(uint32_t feature) case OMR_FEATURE_S390_FPE: supported = self()->getSupportsFloatingPointExtensionFacility(); break; - case OMR_FEATURE_S390_TE: - supported = self()->getSupportsTransactionalMemoryFacility(); + case OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY: + supported = self()->getSupportsConstrainedTransactionalExecutionFacility(); break; + case OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY: + supported = self()->getSupportsTransactionalExecutionFacility(); case OMR_FEATURE_S390_RI: supported = self()->getSupportsRuntimeInstrumentationFacility(); break; @@ -345,28 +348,49 @@ OMR::Z::CPU::setSupportsFloatingPointExtensionFacility(bool value) } bool -OMR::Z::CPU::getSupportsTransactionalMemoryFacility() +OMR::Z::CPU::getSupportsTransactionalExecutionFacility() { - return _flags.testAny(S390SupportsTM); + return _flags.testAny(OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY); } bool OMR::Z::CPU::supportsTransactionalMemoryInstructions() { - return self()->supportsFeature(OMR_FEATURE_S390_TE); + return self()->supportsFeature(OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY); } bool -OMR::Z::CPU::setSupportsTransactionalMemoryFacility(bool value) +OMR::Z::CPU::setSupportsTransactionalExecutionFacility(bool value) { if (value) { - _flags.set(S390SupportsTM); + _flags.set(OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY); } else { - _flags.reset(S390SupportsTM); + _flags.reset(OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY); + } + + return value; + } + +bool +OMR::Z::CPU::getSupportsConstrainedTransactionalExecutionFacility() + { + return _flags.testAny(OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY); + } + +bool +OMR::Z::CPU::setSupportsConstrainedTransactionalExecutionFacility(bool value) + { + if (value) + { + _flags.set(OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY); + } + else + { + _flags.reset(OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY); } return value; diff --git a/compiler/z/env/OMRCPU.hpp b/compiler/z/env/OMRCPU.hpp index bce55e8d1be..b27d0501127 100644 --- a/compiler/z/env/OMRCPU.hpp +++ b/compiler/z/env/OMRCPU.hpp @@ -82,7 +82,7 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU bool getSupportsHardwareSQRT(); bool hasPopulationCountInstruction(); - + /** \brief * Determines whether the High-Word facility is available on the current processor. */ @@ -95,12 +95,12 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the High-Word facility is available (if \c true) or not (if \c false). */ bool setSupportsHighWordFacility(bool value); - + /** \brief * Determines whether the Decimal Floating Point (DFP) facility is available on the current processor. */ bool getSupportsDecimalFloatingPointFacility(); - + /** \brief * Determines whether the Decimal Floating Point (DFP) facility is available on the current processor. * @@ -108,12 +108,12 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Decimal Floating Point facility is available (if \c true) or not (if \c false). */ bool setSupportsDecimalFloatingPointFacility(bool value); - + /** \brief * Determines whether the Floating Point Extension (FPE) facility is available on the current processor. */ bool getSupportsFloatingPointExtensionFacility(); - + /** \brief * Determines whether the Floating Point Extension (FPE) facility is available on the current processor. * @@ -121,31 +121,44 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Floating Point Extension facility is available (if \c true) or not (if \c false). */ bool setSupportsFloatingPointExtensionFacility(bool value); - + /** \brief - * Determines whether the Transactional Memory (TM) facility is available on the current processor. + * Determines whether the Transactional Execution (TX) facility is available on the current processor. */ - bool getSupportsTransactionalMemoryFacility(); + bool getSupportsTransactionalExecutionFacility(); /** \brief - * Determines whether the Transactional Memory (TM) facility is available on the current processor. - * Alias of supportsFeature(OMR_FEATURE_S390_TE) as a platform agnostic query. + * Determines whether the Transactional Execution (TX) facility is available on the current processor. + * Alias of supportsFeature(OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY) as a platform agnostic query. */ bool supportsTransactionalMemoryInstructions(); - + + /** \brief + * Determines whether the Transactional Execution (TX) facility is available on the current processor. + * + * \param value + * Determines whether the Transactional Execution facility is available (if \c true) or not (if \c false). + */ + bool setSupportsTransactionalExecutionFacility(bool value); + /** \brief - * Determines whether the Transactional Memory (TM) facility is available on the current processor. + * Determines whether the Constrained Transactional Execution (TXC) facility is available on the current processor. + */ + bool getSupportsConstrainedTransactionalExecutionFacility(); + + /** \brief + * Determines whether the Constrained Transactional Execution (TXC) facility is available on the current processor. * * \param value - * Determines whether the Transactional Memory facility is available (if \c true) or not (if \c false). + * Determines whether the Constrained Transactional Execution facility is available (if \c true) or not (if \c false). */ - bool setSupportsTransactionalMemoryFacility(bool value); - + bool setSupportsConstrainedTransactionalExecutionFacility(bool value); + /** \brief * Determines whether the Runtime Instrumentation (RI) facility is available on the current processor. */ bool getSupportsRuntimeInstrumentationFacility(); - + /** \brief * Determines whether the Runtime Instrumentation (RI) facility is available on the current processor. * @@ -153,12 +166,12 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Runtime Instrumentation facility is available (if \c true) or not (if \c false). */ bool setSupportsRuntimeInstrumentationFacility(bool value); - + /** \brief * Determines whether the Vector facility is available on the current processor. */ bool getSupportsVectorFacility(); - + /** \brief * Determines whether the Vector facility is available on the current processor. * @@ -166,12 +179,12 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Vector facility is available (if \c true) or not (if \c false). */ bool setSupportsVectorFacility(bool value); - + /** \brief * Determines whether the Vector Packed Decimal facility is available on the current processor. */ bool getSupportsVectorPackedDecimalFacility(); - + /** \brief * Determines whether the Vector Packed Decimal facility is available on the current processor. * @@ -179,7 +192,7 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Vector Packed Decimal facility is available (if \c true) or not (if \c false). */ bool setSupportsVectorPackedDecimalFacility(bool value); - + /** \brief * Determines whether the Miscellaneous Instruction Extensions 2 (MIE2) facility is available on the current * processor. @@ -202,22 +215,22 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * processor. */ bool getSupportsMiscellaneousInstructionExtensions3Facility(); - + /** \brief * Determines whether the Miscellaneous Instruction Extensions 3 (MIE3) facility is available on the current * processor. * * \param value - * Determines whether the Miscellaneous Instruction Extensions 3 facility is available (if \c true) or not (if + * Determines whether the Miscellaneous Instruction Extensions 3 facility is available (if \c true) or not (if * \c false). */ bool setSupportsMiscellaneousInstructionExtensions3Facility(bool value); - + /** \brief * Determines whether the Vector Enhancement 2 facility is available on the current processor. */ bool getSupportsVectorFacilityEnhancement2(); - + /** \brief * Determines whether the Vector Enhancement 2 facility is available on the current processor. * @@ -230,7 +243,7 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Vector Enhancement 1 facility is available on the current processor. */ bool getSupportsVectorFacilityEnhancement1(); - + /** \brief * Determines whether the Vector Enhancement 1 facility is available on the current processor. * @@ -238,12 +251,12 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Vector Enhancement 1 facility is available (if \c true) or not (if \c false). */ bool setSupportsVectorFacilityEnhancement1(bool value); - + /** \brief * Determines whether the Vector Packed Decimal facility is available on the current processor. */ bool getSupportsVectorPackedDecimalEnhancementFacility(); - + /** \brief * Determines whether the Vector Packed Decimal facility is available on the current processor. * @@ -251,12 +264,12 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Vector Packed Decimal facility is available (if \c true) or not (if \c false). */ bool setSupportsVectorPackedDecimalEnhancementFacility(bool value); - + /** \brief * Determines whether the Guarded Storage (GS) facility is available on the current processor. */ bool getSupportsGuardedStorageFacility(); - + /** \brief * Determines whether the Guarded Storage (GS) facility is available on the current processor. * @@ -264,7 +277,7 @@ class OMR_EXTENSIBLE CPU : public OMR::CPU * Determines whether the Guarded Storage facility is available (if \c true) or not (if \c false). */ bool setSupportsGuardedStorageFacility(bool value); - + /** * \brief Determines whether 32bit integer rotate is available * diff --git a/include_core/omrport.h b/include_core/omrport.h index 46348b17aa7..5491e7634a9 100644 --- a/include_core/omrport.h +++ b/include_core/omrport.h @@ -1526,7 +1526,6 @@ typedef struct OMRProcessorDesc { #define OMR_FEATURE_S390_MSA 3 /* STFLE bit 17 */ #define OMR_FEATURE_S390_DFP 6 /* STFLE bit 42 & 44 */ #define OMR_FEATURE_S390_HPAGE 7 -#define OMR_FEATURE_S390_TE 10 /* STFLE bit 50 & 73 */ #define OMR_FEATURE_S390_MSA_EXTENSION3 11 /* STFLE bit 76 */ #define OMR_FEATURE_S390_MSA_EXTENSION4 12 /* STFLE bit 77 */ @@ -1571,6 +1570,11 @@ typedef struct OMRProcessorDesc { /* STFLE bit 49 - Miscellaneous-instruction-extension facility */ #define OMR_FEATURE_S390_MISCELLANEOUS_INSTRUCTION_EXTENSION 49 +/* STFLE bit 50 - Constrained transactional-execution facility */ +#define OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY 50 +/* STFLE bit 73 - Transactional-execution facility */ +#define OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY 73 + /* z13 facilities */ /* STFLE bit 53 - Load/store-on-condition facility 2 */ @@ -1610,7 +1614,7 @@ typedef struct OMRProcessorDesc { /* z15 facilities */ -/* STFLE bit 61 - Miscellaneous-instruction-extensions facility 3 */ +/* STFLE bit 61 - Miscellaneous-instruction-extensions facility 3 */ #define OMR_FEATURE_S390_MISCELLANEOUS_INSTRUCTION_EXTENSION_3 61 /* STFLE bit 148 - Vector enhancements facility 2 */ diff --git a/port/unix/omrsysinfo.c b/port/unix/omrsysinfo.c index cde5051fad6..928bd8ebb87 100644 --- a/port/unix/omrsysinfo.c +++ b/port/unix/omrsysinfo.c @@ -851,7 +851,7 @@ omrsysinfo_get_processor_feature_name(struct OMRPortLibrary *portLibrary, uint32 /** - * Generate the corresponding string literals for the provided OMRProcessorDesc. The buffer will be zero + * Generate the corresponding string literals for the provided OMRProcessorDesc. The buffer will be zero * initialized and overwritten with the processor feature output string. * * @param[in] portLibrary The port library. @@ -1307,8 +1307,18 @@ omrsysinfo_get_s390_zos_supports_vector_extension_facility(void) return FALSE; } +/* The following two functions for checking if z/OS supports the constrained and non-constrained + * transactional executional facilities rely on FLCCVT and CVTFLAG4, documented here: + * + * FLCCVT is an ADDRESS (of the CVT structure) off the PSA structure + * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead300/PSA-map.htm + * + * CVTFLAG4 is a BITSTRING off the CVT structure containing the CVTTX (0x08), CVTTXC (0x04), and CVTRI (0x02) bits + * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead100/CVT-map.htm + */ + /** @internal - * Check if z/OS supports the Transactional Execution Facility (TX). We use the CVTTX (0x08) and CVTTXC (0x04) bits in + * Check if z/OS supports the Transactional Execution Facility (TX). We use the CVTTX (0x08) bit in * the CVT structure for the OS check. * * @return TRUE if TX is supported; FALSE otherwise. @@ -1316,16 +1326,25 @@ omrsysinfo_get_s390_zos_supports_vector_extension_facility(void) static BOOLEAN omrsysinfo_get_s390_zos_supports_transactional_execution_facility(void) { - /* FLCCVT is an ADDRESS off the PSA structure - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead300/PSA-map.htm */ - uint8_t* CVT = (uint8_t*)(*(uint32_t*)0x10); + uint8_t* FLCCVT = (uint8_t*)(*(uint32_t*)0x10); + uint8_t CVTFLAG4 = *(FLCCVT + 0x17B); - /* CVTFLAG4 is a BITSTRING off the CVT structure containing the CVTTX (0x08), CVTTXC (0x04), and CVTRI (0x02) bits - * https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.iead100/CVT-map.htm */ - uint8_t CVTFLAG4 = *(CVT + 0x17B); + return OMR_ARE_ALL_BITS_SET(CVTFLAG4, 0x08); +} - /* Note we check for both constrained and non-constrained transaction support */ - return OMR_ARE_ALL_BITS_SET(CVTFLAG4, 0x0C); +/** @internal + * Check if z/OS supports the Constrained Transactional Execution Facility (TXC). We use the CVTTXC (0x04) bit in + * the CVT structure for the OS check. + * + * @return TRUE if TXC is supported; FALSE otherwise. + */ +static BOOLEAN +omrsysinfo_get_s390_zos_supports_constrained_transactional_execution_facility(void) +{ + uint8_t* FLCCVT = (uint8_t*)(*(uint32_t*)0x10); + uint8_t CVTFLAG4 = *(FLCCVT + 0x17B); + + return OMR_ARE_ALL_BITS_SET(CVTFLAG4, 0x04); } /** @internal @@ -1564,14 +1583,23 @@ omrsysinfo_get_s390_description(struct OMRPortLibrary *portLibrary, OMRProcessor /* zEC12 facility and processor detection */ /* TE/TX hardware support */ - if (omrsysinfo_test_stfle(portLibrary, 50) && omrsysinfo_test_stfle(portLibrary, 73)) { + if (omrsysinfo_test_stfle(portLibrary, OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY)) { #if defined(J9ZOS390) if (omrsysinfo_get_s390_zos_supports_transactional_execution_facility()) #elif defined(LINUX) /* LINUX S390 */ if (OMR_ARE_ALL_BITS_SET(auxvFeatures, OMR_HWCAP_S390_TE)) #endif /* defined(J9ZOS390) */ { - omrsysinfo_set_feature(desc, OMR_FEATURE_S390_TE); + omrsysinfo_set_feature(desc, OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY); + + if (omrsysinfo_test_stfle(portLibrary, OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY)) { +#if defined(J9ZOS390) + if (omrsysinfo_get_s390_zos_supports_constrained_transactional_execution_facility()) +#endif /* defined(J9ZOS390) */ + { + omrsysinfo_set_feature(desc, OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY); + } + } } } @@ -1760,8 +1788,10 @@ omrsysinfo_get_s390_processor_feature_name(uint32_t feature) return "dfp"; case OMR_FEATURE_S390_HPAGE: return "hpage"; - case OMR_FEATURE_S390_TE: - return "te"; + case OMR_FEATURE_S390_TRANSACTIONAL_EXECUTION_FACILITY: + return "tx"; + case OMR_FEATURE_S390_CONSTRAINED_TRANSACTIONAL_EXECUTION_FACILITY: + return "txc"; case OMR_FEATURE_S390_MSA_EXTENSION3: return "msa_e3"; case OMR_FEATURE_S390_MSA_EXTENSION4: @@ -1928,7 +1958,7 @@ omrsysinfo_get_aarch64_processor_feature_name(uint32_t feature) case OMR_FEATURE_ARM64_FLAGM2: return "flagm2"; case OMR_FEATURE_ARM64_FRINTTS: - return "frint"; + return "frint"; case OMR_FEATURE_ARM64_SVE_I8MM: return "svei8mm"; case OMR_FEATURE_ARM64_F32MM: