From 4967e1b925061e5f29f693689586153e3dd4cd33 Mon Sep 17 00:00:00 2001
From: jvdd <boebievdd@gmail.com>
Date: Fri, 1 Mar 2024 16:26:56 +0100
Subject: [PATCH] :lotus_position: review code

---
 src/simd/simd_f64_ignore_nan.rs | 2 +-
 src/simd/simd_f64_return_nan.rs | 4 ++--
 src/simd/simd_i16.rs            | 1 -
 3 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/src/simd/simd_f64_ignore_nan.rs b/src/simd/simd_f64_ignore_nan.rs
index c96a270..b8e2a02 100644
--- a/src/simd/simd_f64_ignore_nan.rs
+++ b/src/simd/simd_f64_ignore_nan.rs
@@ -280,7 +280,7 @@ mod neon_ignore_nan {
     unimpl_SIMDArgMinMax!(f64, usize, SCALAR<FloatIgnoreNaN>, NEON<FloatIgnoreNaN>);
 }
 
-#[cfg(target_arch = "aarch64")]
+#[cfg(target_arch = "aarch64")] // stable for AArch64
 mod neon_ignore_nan {
     use super::super::config::NEON;
     use super::*;
diff --git a/src/simd/simd_f64_return_nan.rs b/src/simd/simd_f64_return_nan.rs
index c53be5a..51bb60e 100644
--- a/src/simd/simd_f64_return_nan.rs
+++ b/src/simd/simd_f64_return_nan.rs
@@ -392,7 +392,7 @@ mod avx512 {
 
 // There are NEON SIMD intrinsics for i64 (used after ord_transform), but
 //  - for arm we miss the vcgt_ and vclt_ intrinsics.
-//  - for aarch64 the required intrinsics are present (on nightly)
+//  - for aarch64 the required intrinsics are present (on stable!!)
 
 #[cfg(target_arch = "arm")]
 #[cfg(feature = "nightly_simd")]
@@ -410,7 +410,7 @@ mod neon {
     unimpl_SIMDArgMinMax!(f64, usize, SCALAR<FloatReturnNaN>, NEON<FloatReturnNaN>);
 }
 
-#[cfg(target_arch = "aarch64")]
+#[cfg(target_arch = "aarch64")] // stable for AArch64
 mod neon {
     use super::super::config::NEON;
     use super::*;
diff --git a/src/simd/simd_i16.rs b/src/simd/simd_i16.rs
index 5acefc6..e276033 100644
--- a/src/simd/simd_i16.rs
+++ b/src/simd/simd_i16.rs
@@ -441,7 +441,6 @@ mod neon {
 
         #[inline(always)]
         unsafe fn _mm_loadu(data: *const i16) -> int16x8_t {
-            // experimental on arm
             vld1q_s16(data as *const i16)
         }