.svlint.toml

[option]
linter = true
exclude_paths = []
indent = 4
prefix_inout = "b_"
prefix_input = "i_"
prefix_output = "o_"
prefix_label = "l_"
prefix_instance = "u_"
prefix_module = "mod_"
prefix_package = "pkg_"
prefix_interface = "ifc_"

[rules]
blocking_assignment_in_always_ff = true
case_default = false
default_nettype_none = true
enum_with_type = true
explicit_case_default = false
explicit_if_else = true
for_with_begin = true
function_same_as_system_function = true
function_with_automatic = true
generate_case_with_label = false
generate_for_with_label = false
generate_if_with_label = false
generate_keyword_forbidden = false
generate_keyword_required = false
genvar_declaration_in_loop = false
genvar_declaration_out_loop = false
if_with_begin = true
inout_with_tri = true
input_with_var = true
interface_port_with_modport = false
legacy_always = true
level_sensitive_always = false
localparam_explicit_type = false
localparam_type_twostate = false
loop_variable_declaration = false
lowercamelcase_interface = true
lowercamelcase_module = true
lowercamelcase_package = false
non_ansi_module = true
non_blocking_assignment_in_always_comb = true
output_with_var = true
parameter_explicit_type = false
parameter_in_package = false
parameter_type_twostate = false
prefix_inout = true
prefix_input = true
prefix_instance = false
prefix_interface = false
prefix_module = false
prefix_output = true
prefix_package = false
priority_keyword = false
sequential_block_in_always_comb = false
sequential_block_in_always_ff = false
sequential_block_in_always_latch = false
style_commaleading = false
style_indent = true
style_keyword_0or1space = false
style_keyword_0space = false
style_keyword_1or2space = false
style_keyword_1space = false
style_keyword_construct = false
style_keyword_datatype = false
style_keyword_end = false
style_keyword_maybelabel = false
style_keyword_newline = true
tab_character = false
unique0_keyword = false
unique_keyword = false
uppercamelcase_interface = false
uppercamelcase_module = false
uppercamelcase_package = false
wire_reg = true