testcases

[linsinan1995]

test long branching

./obj-rv32i_xcorevhwlp/bin/riscv32-unknown-elf-g++ -march=rv32i_xcorev1p0 -ftemplate-depth=1000 -c test2.cpp -o a.o
./obj-rv32i_xcorevhwlp/bin/riscv32-unknown-elf-objdump -dr a.o > text

#include <cstddef>
#define __FORCE_INLINE __attribute__((always_inline)) inline

template <std::size_t N> __FORCE_INLINE void npad()
{
    npad<N-1>();
    asm volatile("nop");
}
template <> __FORCE_INLINE void npad<0>()  { }

int main()
{
    asm goto (
        // "cv.beqimm s0, -16, %l[end]"
        "beq s0, s1, %l[end]"
        :
        :
        :
        : end
    );
    npad <999> ();
end:
    return 1;
}

[linsinan1995]

precisely control registers that hold the variable

#include <stdint.h>

#define TEST_SAVE(type, test_name, rd, rs, imm) \
  void test_name (void) {			\
    register void *dst asm(#rd);		\
    register type src asm(#rs);			\
    asm volatile(				\
	"lui\t%0,%%hi(array)      \n\t"		\
	"addi\t%0,%0,%%lo(array)  \n\t"		\
	"lb\t%1,0(%0)             \n\t"		\
	:: "r"(dst), "r"(src));			\
    ((type*)dst)[2] = src;			\
}

#define TEST_LOAD(type, test_name, rd, rs, imm) \
  void test_name (void) {			\
    register void *src asm(#rd);		\
    register type dst asm(#rs);			\
    asm volatile(				\
	"lui\t%0,%%hi(array)      \n\t"		\
	"addi\t%0,%0,%%lo(array)  \n\t"		\
	: : "r"(src));				\
    dst = ((type*)src)[imm];			\
    asm volatile(				\
	"sw\t%1,0(%0)              \n\t"	\
	: : "r"(src), "r"(dst));		\
}

TEST_SAVE (int8_t, test_c_sb0, a1, a1, 2)
TEST_SAVE (int8_t, test_c_sb1, a2, a3, 2)
TEST_SAVE (int8_t, test_c_sb2, a5, a3, 2)
TEST_SAVE (int8_t, test_c_sb3, a1, s0, 2)

TEST_LOAD (uint8_t, test_c_lbu0, a4, a5, 1)
TEST_LOAD (uint8_t, test_c_lbu1, a4, s5, 3)
TEST_LOAD (uint8_t, test_c_lbu2, a4, s1, 4)
TEST_LOAD (uint8_t, test_c_lbu3, a4, s0, 2)