diff --git a/src/config.vh b/src/config.vh index 68eb091..4056f70 100644 --- a/src/config.vh +++ b/src/config.vh @@ -22,7 +22,7 @@ localparam AUDIO_BIT_WIDTH = 16; localparam POWERUPNS = 100000000.0; localparam CLKPERNS = (1.0/CLKFRQ)*1000000.0; -localparam int POWERUPCYCLES = $ceil( POWERUPNS/CLKPERNS ); +localparam int POWERUPCYCLES = $rtoi($ceil( POWERUPNS/CLKPERNS )); // Main clock frequency localparam FREQ=27_000_000; // at least 10x baudrate diff --git a/src/memory_controller.v b/src/memory_controller.v index 517bbfd..50eb4d0 100644 --- a/src/memory_controller.v +++ b/src/memory_controller.v @@ -32,7 +32,7 @@ module MemoryController( // Physical SDRAM interface inout [SDRAM_DATA_WIDTH-1:0] SDRAM_DQ, // 16 bit bidirectional data bus output [SDRAM_ROW_WIDTH-1:0] SDRAM_A, // 13 bit multiplexed address bus - output [SDRAM_BANK_WIDTH:0] SDRAM_BA, // 4 banks + output [SDRAM_BANK_WIDTH-1:0] SDRAM_BA, // 4 banks output SDRAM_nCS, // a single chip select output SDRAM_nWE, // write enable output SDRAM_nRAS, // row address select @@ -51,11 +51,11 @@ reg r_read_a, r_read_b; reg [7:0] da, db; wire MemBusy, MemDataReady; +`ifndef VERILATOR + assign dout_a = (cycles == 3'd4 && r_read_a) ? MemDout : da; assign dout_b = (cycles == 3'd4 && r_read_b) ? MemDout : db; -`ifndef VERILATOR - // SDRAM driver sdram #( .FREQ(FREQ), .DATA_WIDTH(SDRAM_DATA_WIDTH), .ROW_WIDTH(SDRAM_ROW_WIDTH), @@ -126,14 +126,18 @@ end // memory model for verilator reg [7:0] SIM_MEM [0:1024*1024*4-1]; +reg [7:0] dout_a_next; +reg [7:0] dout_b_next; +assign dout_a = dout_a_next; +assign dout_b = dout_b_next; // in verilator model, our memory delay is 1-cycle // busy is always 0 always @(posedge clk) begin // cycles <= cycles == 3'd7 ? 3'd7 : cycles + 3'd1; - if (read_a) dout_a <= SIM_MEM[addr]; - if (read_b) dout_b <= SIM_MEM[addr]; + if (read_a) dout_a_next <= SIM_MEM[addr]; + if (read_b) dout_b_next <= SIM_MEM[addr]; if (write) SIM_MEM[addr] <= din; if (~resetn) begin diff --git a/src/nestang_top.sv b/src/nestang_top.sv index e50aba6..04a7762 100644 --- a/src/nestang_top.sv +++ b/src/nestang_top.sv @@ -228,7 +228,7 @@ UartDemux #(.FREQ(FREQ), .BAUDRATE(BAUDRATE)) uart_demux( .clk(clk), .reset(loader_reset), .indata(loader_input), .indata_clk(loader_clk), .mem_addr(loader_addr), .mem_data(loader_write_data), .mem_write(loader_write), .mem_refresh(loader_refresh), .mapper_flags(mapper_flags), - .done(loader_done), .error(loader_fail)); + .done(loader_done), .error(loader_fail), .loader_state(), .loader_bytes_left()); // The NES machine // nes_ce / 0 \___/ 1 \___/ 2 \___/ 3 \___/ 4 \___/ 0 \___ @@ -627,7 +627,7 @@ end // assign led = ~usb_btn; reg [23:0] led_cnt; -always @(posedge clk_p) led_cnt <= led_cnt + 1; +always @(posedge clk) led_cnt <= led_cnt + 1; assign led = {led_cnt[23], led_cnt[22]}; endmodule \ No newline at end of file diff --git a/verilator/Makefile b/verilator/Makefile index 38d5b2e..fcffcdf 100644 --- a/verilator/Makefile +++ b/verilator/Makefile @@ -1,30 +1,37 @@ +N=nestang_top +D=../src +SRCS=$D/tang_nano_20k/config.sv $D/apu.v $D/compat.v $D/cpu.v $D/hw_sound.v $D/MicroCode.v \ + $D/mmu.v $D/nestang_top.sv $D/nes.v $D/ppu.v $D/memory_controller.v $D/game_loader.v \ + $D/game_data.v +DEPS= +INCLUDES=-I$D -I$D/tang_nano_20k CFLAGS_SDL=$(shell sdl2-config --cflags) -O3 LIBS_SDL=$(shell sdl2-config --libs) -.PHONY: build sim verilate clean +.PHONY: build sim verilate clean gtkwave -build: ./obj_dir/VNES_Tang20k +build: ./obj_dir/V$N -verilate: ./obj_dir/VNES_Tang20k.cpp +verilate: ./obj_dir/V$N.cpp -./obj_dir/VNES_Tang20k.cpp: sim_main.cpp hdl/*.v +./obj_dir/V$N.cpp: sim_main.cpp $(SRCS) $(DEPS) @echo @echo "### VERILATE ####" mkdir -p obj_dir - cd obj_dir; ln -sf ../game.nes.hex .; ln -sf ../hdl/src/*.txt . - # verilator --top-module NES_Tang20k --trace -cc -O3 -CFLAGS "$(CFLAGS_SDL)" -LDFLAGS "$(LIBS_SDL)" hdl/*.v --exe sim_main.cpp - verilator --top-module NES_Tang20k -cc -O3 --exe -CFLAGS "$(CFLAGS_SDL)" -LDFLAGS "$(LIBS_SDL)" hdl/*.v sim_main.cpp + verilator --top-module $N --trace -cc -O3 --exe -CFLAGS "$(CFLAGS_SDL)" -LDFLAGS "$(LIBS_SDL)" $(INCLUDES) $(SRCS) sim_main.cpp -./obj_dir/VNES_Tang20k: verilate +./obj_dir/V$N: verilate @echo @echo "### BUILDING SIM ###" - make -C obj_dir -f VNES_Tang20k.mk VNES_Tang20k + make -C obj_dir -f V$N.mk V$N + cp -a *.hex obj_dir + cp -a $D/*.txt obj_dir -sim: ./obj_dir/VNES_Tang20k +sim: ./obj_dir/V$N @echo @echo "### SIMULATION ###" - @cd obj_dir && ./VNES_Tang20k + @cd obj_dir && ./V$N clean: rm -rf obj_dir \ No newline at end of file diff --git a/verilator/README.md b/verilator/README.md index 34b001a..9b6ea76 100644 --- a/verilator/README.md +++ b/verilator/README.md @@ -3,9 +3,8 @@ This is a Verilator-driven graphical simulation of nestang. Should be useful in To run the simulation: ``` -./setup.sh `pwd`/.. hexdump -ve '1/1 "%02x\n"' game.nes > game.nes.hex -# change INES_SIZE in nes_tang20k.v to reflect size of game.nes +# change INES_SIZE in game_data.v to reflect size of game.nes make sim ``` diff --git a/verilator/setup.sh b/verilator/setup.sh deleted file mode 100755 index 892d39a..0000000 --- a/verilator/setup.sh +++ /dev/null @@ -1,32 +0,0 @@ -# Setup verilator simulation for nes -# -# This runs under WSL. Make sure you've installed verilator with -# sudo apt install verilator - -if [ "$1" == "" ]; then - echo "./setup.sh " - exit; -fi - -DIR=$1 - -mkdir -p hdl -ln -sf $DIR/src/apu.v hdl -ln -sf $DIR/src/compat.v hdl -ln -sf $DIR/src/cpu.v hdl -ln -sf $DIR/src/hw_sound.v hdl -ln -sf $DIR/src/MicroCode.v hdl -ln -sf $DIR/src/mmu.v hdl -ln -sf $DIR/src/nes_tang20k.v hdl -ln -sf $DIR/src/nes.v hdl -ln -sf $DIR/src/ppu.v hdl -ln -sf $DIR/src/memory_controller.v hdl -ln -sf $DIR/src/game_loader.v hdl -ln -sf $DIR/src hdl/src - -echo "hdl/ directory setup done." - -if [ ! -f game.nes.hex ]; then - echo "You need game.nes.hex ROM file to do simulation. To generate from .nes files: " - echo ' hexdump -ve '"'"'1/1 "%02x\\n'"'"' game.nes > game.nes.hex' -fi diff --git a/verilator/sim_main.cpp b/verilator/sim_main.cpp index 96ee345..0b9bf86 100644 --- a/verilator/sim_main.cpp +++ b/verilator/sim_main.cpp @@ -1,9 +1,9 @@ #include #include -#include "VNES_Tang20k.h" -#include "VNES_Tang20k_NES_Tang20k.h" -#include "VNES_Tang20k_NES.h" +#include "Vnestang_top.h" +#include "Vnestang_top_nestang_top.h" +#include "Vnestang_top_NES.h" #include "verilated.h" #include #include "nes_palette.h" @@ -29,9 +29,9 @@ Pixel screenbuffer[H_RES*V_RES]; vluint64_t sim_time; int main(int argc, char** argv, char** env) { Verilated::commandArgs(argc, argv); - VNES_Tang20k* top = new VNES_Tang20k; + Vnestang_top* top = new Vnestang_top; // VNES_Tang20k_NES_Tang20k *nes_tang20k = top->NES_Tang20k; - VNES_Tang20k_NES *nes = top->NES_Tang20k->nes; + Vnestang_top_NES *nes = top->nestang_top->nes; bool frame_updated = false; uint64_t start_ticks = SDL_GetPerformanceCounter(); int frame_count = 0; @@ -73,10 +73,10 @@ int main(int argc, char** argv, char** env) { #endif while (1) { - top->sys_resetn = 1; - if(sim_time > 1 && sim_time < 5){ - top->sys_resetn = 0; - } + // top->sys_resetn = 1; + // if(sim_time > 1 && sim_time < 5){ + // top->sys_resetn = 0; + // } top->sys_clk ^= 1; top->eval(); #ifdef TRACE_ON