From 33b84a4f38358c25aa296e2fc8e270d16838f371 Mon Sep 17 00:00:00 2001 From: Nathaniel Mitchell Date: Wed, 21 Feb 2024 15:00:55 -0800 Subject: [PATCH] Add reg name to error when msr read fails Signed-off-by: Nathaniel Mitchell --- chipsec/chipset.py | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/chipsec/chipset.py b/chipsec/chipset.py index 0684767442..2304eb8036 100644 --- a/chipsec/chipset.py +++ b/chipsec/chipset.py @@ -30,7 +30,7 @@ from chipsec.helper.nonehelper import NoneHelper from chipsec.hal import cpu, io, iobar, mmio, msgbus, msr, pci, physmem, ucode, igd, cpuid from chipsec.hal.pci import PCI_HDR_RID_OFF -from chipsec.exceptions import UnknownChipsetError, DeviceNotFoundError, CSReadError +from chipsec.exceptions import HWAccessViolationError, UnknownChipsetError, DeviceNotFoundError, CSReadError from chipsec.exceptions import RegisterTypeNotFoundError, OsHelperError from chipsec.exceptions import CSFirstNotFoundError, CSBusNotFoundError @@ -486,7 +486,10 @@ def read_mmio_register(self, bus: Optional[int], reg: Dict[str, Any]) -> int: return reg_value def read_msr_register(self, cpu_thread: int, reg: Dict[str, Any]) -> int: - (eax, edx) = self.msr.read_msr(cpu_thread, reg['msr']) + try: + (eax, edx) = self.msr.read_msr(cpu_thread, reg['msr']) + except HWAccessViolationError as err: + raise HWAccessViolationError(f'Error reading {reg["name"]}: {err}', err.errorcode) return (edx << 32) | eax def read_portio_register(self, reg: Dict[str, Any]) -> int: