diff --git a/fpp-dev/env.html b/fpp-dev/env.html index 54f9fed01..f38face99 100644 --- a/fpp-dev/env.html +++ b/fpp-dev/env.html @@ -177,7 +177,7 @@

Environment

Before kicking off the development of your own Fault Proof Program , it's important to understand the environment that your program will be running in.

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The FPP runs on top of a custom FPVM target, which is typically a VM with a modified subset of an existing reduced instruction set architecture. The FPVM is designed to +

The FPP runs on top of a custom FPVM target, which is typically a VM with a modified subset of an existing reduced instruction set architecture and a subset of Linux syscalls. The FPVM is designed to execute verifiable programs, and commonly modifies the instruction set it is derived from as well as the internal representation of memory to support verifiable memory access, client (program) communication with the host (the FPVM), and other implementation-specific features.

Host <-> Client Communication

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specification).

In order for the client to read from the host, special syscalls are modified within the FPVM to allow the client to request preparation of and read foreign data.

Reading

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When the client wants to read data from the host, it must first send a "hint" to the host through the hint file descriptor, which is a request for the host to prepare the data for reading. The host will then +

When the client wants to read data from the host, it must first send a "hint" to the host through the hint file descriptor, which is a request for the host to prepare the data for reading. The host will then prepare the data, and send a hint acknowledgement back to the client. The client can then read the data from the host through the designated file descriptor.

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The preparation step ("hinting") is an optimization that allows the host to know ahead of time the intents of the client and the data it requires for execution. This can allow +

The preparation step ("hinting") is an optimization that allows the host to know ahead of time the intents of the client and the data it requires for execution. This can allow for lazy loading of data, and also prevent the need for unnecessary allocations within the host's memory. This step is a no-op on-chain, and is only ran locally when the host is the native implementation of the FPVM.

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Reading

Client->>+Host: Hint preimage (no-op on-chain / read-only mode) Host-->>Host: Prepare Preimage Host-->>-Client: Hint acknowledgement - Client-->>+Host: Preimage Read + Client-->>+Host: Preimage Request Host-->>-Client: Preimage Data
diff --git a/fpp-dev/targets.html b/fpp-dev/targets.html index d0d2d1404..495d41456 100644 --- a/fpp-dev/targets.html +++ b/fpp-dev/targets.html @@ -182,8 +182,66 @@

Supported

If there is a feature that you would like to see supported, please open an issue or consider contributing!

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Cannon (MIPS32rel1)

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TODO

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Cannon (MIPS32r2)

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Cannon is based off of the mips32r2 target architecture, supporting 55 instructions:

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+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
CategoryInstructionDescription
ArithmeticaddiAdd immediate (with sign-extension).
ArithmeticaddiuAdd immediate unsigned (no overflow).
ArithmeticadduAdd unsigned (no overflow).
LogicalandBitwise AND.
LogicalandiBitwise AND immediate.
BranchbUnconditional branch.
Conditional BranchbeqBranch on equal.
Conditional BranchbeqzBranch if equal to zero.
Conditional BranchbgezBranch on greater than or equal to zero.
Conditional BranchbgtzBranch on greater than zero.
Conditional BranchblezBranch on less than or equal to zero.
Conditional BranchbltzBranch on less than zero.
Conditional BranchbneBranch on not equal.
Conditional BranchbnezBranch if not equal to zero.
LogicalclzCount leading zeros.
ArithmeticdivuDivide unsigned.
Unconditional JumpjJump.
Unconditional JumpjalJump and link.
Unconditional JumpjalrJump and link register.
Unconditional JumpjrJump register.
Data TransferlbLoad byte.
Data TransferlbuLoad byte unsigned.
Data TransferluiLoad upper immediate.
Data TransferlwLoad word.
Data TransferlwrLoad word right.
Data TransfermfhiMove from HI register.
Data TransfermfloMove from LO register.
Data TransfermoveMove between registers.
Data TransfermovnMove conditional on not zero.
Data TransfermovzMove conditional on zero.
Data TransfermtloMove to LO register.
ArithmeticmulMultiply (to produce a word result).
ArithmeticmultuMultiply unsigned.
ArithmeticneguNegate unsigned.
No OpnopNo operation.
LogicalnotBitwise NOT (pseudo-instruction in MIPS).
LogicalorBitwise OR.
LogicaloriBitwise OR immediate.
Data TransfersbStore byte.
LogicalsllShift left logical.
LogicalsllvShift left logical variable.
ComparisonsltSet on less than (signed).
ComparisonsltiSet on less than immediate.
ComparisonsltiuSet on less than immediate unsigned.
ComparisonsltuSet on less than unsigned.
LogicalsraShift right arithmetic.
LogicalsrlShift right logical.
LogicalsrlvShift right logical variable.
ArithmeticsubuSubtract unsigned.
Data TransferswStore word.
Data TransferswrStore word right.
SerializationsyncSynchronize shared memory.
System CallssyscallSystem call.
LogicalxorBitwise XOR.
LogicalxoriBitwise XOR immediate.
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Asterisc (RISC-V)

Asterisc is based off of the rv64gc target architecture, which defines the following extensions: