From 0cf1fee8fe0d114d25374281be01fb4cc65ce854 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Norbert=20Kami=C5=84ski?= Date: Sun, 26 Nov 2023 23:45:49 +0100 Subject: [PATCH] SEO: Fix broken links MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Norbert Kamiński --- docs/apu_flashing_ipxe.md | 2 +- docs/debug/hdd_mPCIe_log_analyze.md | 2 +- docs/debug/sdcard_test.md | 3 +-- docs/debug/tpm.md | 2 +- docs/pfSense-install-guide.md | 2 +- docs/tpm_pin_mapping.md | 2 +- 6 files changed, 6 insertions(+), 7 deletions(-) diff --git a/docs/apu_flashing_ipxe.md b/docs/apu_flashing_ipxe.md index f1fbbb5a..e0cd6333 100644 --- a/docs/apu_flashing_ipxe.md +++ b/docs/apu_flashing_ipxe.md @@ -130,7 +130,7 @@ Flashing procedure Type `root` as password to finish logging process. - > Steps shown above can be automated using Robot Framework and [this test](https://github.com/pcengines/apu-test-suite/pull/2/files). + > Steps shown above can be automated using Robot Framework. 8. Now you can start flashing process. To flash firmware with `flashrom` usage type: diff --git a/docs/debug/hdd_mPCIe_log_analyze.md b/docs/debug/hdd_mPCIe_log_analyze.md index d0db5523..cf5da07c 100644 --- a/docs/debug/hdd_mPCIe_log_analyze.md +++ b/docs/debug/hdd_mPCIe_log_analyze.md @@ -286,7 +286,7 @@ mPCIe2 case you can not fully load into OS: it reboots after: `tsc unst` executing in this case. This is done in file - [seabios/src/hw/ahci.c](https://github.com/pcengines/seabios/blob/apu2-support/src/hw/ahci.c), + [seabios/src/hw/ahci.c](https://github.com/pcengines/seabios/blob/apu_support/src/hw/ahci.c), function `ahci_port_setup` that starts with line 421. ``` diff --git a/docs/debug/sdcard_test.md b/docs/debug/sdcard_test.md index f950c08f..eb115866 100644 --- a/docs/debug/sdcard_test.md +++ b/docs/debug/sdcard_test.md @@ -26,8 +26,7 @@ ### Diff analyze -1. [GOOD-not-inserted.cap](https://github.com/pcengines/apu2-documentation/blob/master/docs/debug/logs/GOOD-not-inserted.cap) - vs [BAD-not-inserted.cap](https://github.com/pcengines/apu2-documentation/blob/master/docs/debug/logs/BAD-not-inserted.cap) +1. `GOOD-not-inserted.cap` vs `BAD-not-inserted.cap` No differences other than timing differences such as: diff --git a/docs/debug/tpm.md b/docs/debug/tpm.md index 5c3def29..90786fad 100644 --- a/docs/debug/tpm.md +++ b/docs/debug/tpm.md @@ -52,7 +52,7 @@ The first condition fails and code falls down to TPM 1.2. ### Fix -According to Infineon [datasheet](https://www.infineon.com/dgdl/Infineon-TPM%20SLB%209665-DS-v10_15-EN.pdf?fileId=5546d4625185e0e201518b83d9273d87), +According to Infineon [datasheet](https://www.scribd.com/document/390073324/Infineon-TPM-SLB-9665-DS-v10-15-EN-1-pdf), the CHIP complies to [TPM Main Specification, Family "2.0", Level 00, Revision 01.16](https://trustedcomputinggroup.org/resource/tpm-library-specification/). However I could nto find there any information about hardware registers. diff --git a/docs/pfSense-install-guide.md b/docs/pfSense-install-guide.md index 31d1ee3c..1cc6b397 100644 --- a/docs/pfSense-install-guide.md +++ b/docs/pfSense-install-guide.md @@ -17,7 +17,7 @@ pfSense Installation Guide ## pfSense Image In order to install pfSense on apu2/3/5 platforms from USB, obtain following -[Image](https://sgpfiles.netgate.com/mirror/downloads/pfSense-CE-memstick-serial-2.5.0-RELEASE-amd64.img.gz) +[Image](https://sgpfiles.netgate.com/mirror/downloads/pfSense-CE-memstick-serial-2.7.1-RELEASE-amd64.img.gz) from official mirror and follow the official [Writing Disk Images](https://docs.netgate.com/pfsense/en/latest/hardware/writing-disk-images.html) guide for Windows, Linux, UNIX or MAC OS X. diff --git a/docs/tpm_pin_mapping.md b/docs/tpm_pin_mapping.md index d04e5126..28caf987 100644 --- a/docs/tpm_pin_mapping.md +++ b/docs/tpm_pin_mapping.md @@ -1,6 +1,6 @@ # Pin mapping -![TPM1a](/docs/TPM1a.png) +![TPM1a](TPM1a.png) APU3/4 | TPM1a -----|-----