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gem5 Simulator System. https://www.gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 version [DEVELOP-FOR-22.1]
gem5 compiled Jun 16 2023 22:18:40
gem5 started Jun 27 2023 10:44:31
gem5 executing on geralt, pid 2208142
command line: /home/msyu/simulator/plct-gem5/build/RISCV/gem5.opt /home/msyu/simulator/plct-gem5/configs/example/se.py -c > rvv_bench
Global frequency set at 1000000000000 ticks per second
warn: No dot file generated. Please install pydot to generate the dot file and pdf.
build/RISCV/mem/dram_interface.cc:690: warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (512 Mbytes)
0: system.remote_gdb: listening for remote gdb on port 7000
**** REAL SIMULATION ****
build/RISCV/sim/simulate.cc:194: info: Entering event queue @ 0. Starting simulation...
build/RISCV/sim/mem_state.cc:443: info: Increasing stack size by one page.
VleffEndMicroInst numSrc: 8, numDestRegs: 0
VleffEndMicroInst::execute begin
VleffEndMicroInst::execute getRegOperand done
VleffEndMicroInst::execute getWritableRegOperand done
VleffEndMicroInst::execute new_vl sum done
VleffEndMicroInst::execute setRegOperand done
VleffEndMicroInst::execute end
VleffEndMicroInst::execute begin
VleffEndMicroInst::execute getRegOperand done
VleffEndMicroInst::execute getWritableRegOperand done
VleffEndMicroInst::execute new_vl sum done
VleffEndMicroInst::execute setRegOperand done
VleffEndMicroInst::execute end
VleffEndMicroInst numSrc: 8, numDestRegs: 0
VleffEndMicroInst::execute begin
VleffEndMicroInst::execute getRegOperand done
VleffEndMicroInst::execute getWritableRegOperand done
VleffEndMicroInst::execute new_vl sum done
VleffEndMicroInst::execute setRegOperand done
VleffEndMicroInst::execute end
malloc(): smallbin double linked list corrupted
build/RISCV/sim/syscall_emul.cc:85: warn: ignoring syscall rt_sigprocmask(...)
(further warnings will be suppressed)
build/RISCV/sim/syscall_emul.cc:85: warn: ignoring syscall rt_sigaction(...)
(further warnings will be suppressed)
build/RISCV/sim/debug.cc:89: warn: need to stop all queues
./run.sh: line 10: 2208142 Trace/breakpoint trap (core dumped) $GEM5 $SE -c $exec
The text was updated successfully, but these errors were encountered:
I have the same issue, but in my case, the C code only contains a helloworld
#include<stdio.h>
int main()
{
printf("This is a C program.\n");
return 0;
}
And the log is
gem5 version [DEVELOP-FOR-22.1]
gem5 compiled Nov 14 2023 12:18:33
gem5 started Nov 17 2023 06:50:53
gem5 executing on 8ce8695cf0bf, pid 17606
command line: build/RISCV/gem5.opt configs/example/se.py --cmd tests/test-progs/hello/bin/riscv/linux/rvv_vadd_static
Global frequency set at 1000000000000 ticks per second
build/RISCV/mem/dram_interface.cc:690: warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (512 Mbytes)
0: system.remote_gdb: listening for remote gdb on port 7000
**** REAL SIMULATION ****
build/RISCV/sim/simulate.cc:194: info: Entering event queue @ 0. Starting simulation...
build/RISCV/sim/mem_state.cc:443: info: Increasing stack size by one page.
VleffEndMicroInst numSrc: 8, numDestRegs: 0
VleffEndMicroInst::execute begin
VleffEndMicroInst::execute getRegOperand done
VleffEndMicroInst::execute getWritableRegOperand done
VleffEndMicroInst::execute new_vl sum done
VleffEndMicroInst::execute setRegOperand done
VleffEndMicroInst::execute end
VleffEndMicroInst::execute begin
VleffEndMicroInst::execute getRegOperand done
VleffEndMicroInst::execute getWritableRegOperand done
VleffEndMicroInst::execute new_vl sum done
VleffEndMicroInst::execute setRegOperand done
VleffEndMicroInst::execute end
VleffEndMicroInst numSrc: 8, numDestRegs: 0
VleffEndMicroInst::execute begin
VleffEndMicroInst::execute getRegOperand done
VleffEndMicroInst::execute getWritableRegOperand done
VleffEndMicroInst::execute new_vl sum done
VleffEndMicroInst::execute setRegOperand done
VleffEndMicroInst::execute end
malloc(): smallbin double linked list corrupted
build/RISCV/sim/syscall_emul.cc:85: warn: ignoring syscall rt_sigprocmask(...)
(further warnings will be suppressed)
build/RISCV/sim/syscall_emul.cc:85: warn: ignoring syscall rt_sigaction(...)
(further warnings will be suppressed)
build/RISCV/sim/debug.cc:89: warn: need to stop all queues
Trace/breakpoint trap (core dumped)
Hi
I found that using malloc will trigger abort, can you help to confirm the problem, thanks.
compiler cmd: riscv64-unknown-linux-gnu-g++ -march=rv64gv main.cpp -std=c++17 -ldl -lpthread -static
gnu-toolchain:
Gem5:
Cmd to run gem5
The text was updated successfully, but these errors were encountered: