diff --git a/riscv-executor/src/submachines.rs b/riscv-executor/src/submachines.rs
index 15f6d848b0..a5aa96d85b 100644
--- a/riscv-executor/src/submachines.rs
+++ b/riscv-executor/src/submachines.rs
@@ -266,15 +266,18 @@ impl SubmachineKind for BinaryMachine {
             trace.set_current_row("A_byte", (a1 as u32).into());
             trace.set_current_row("B_byte", (b1 as u32).into());
             trace.set_current_row("C_byte", (c1 as u32).into());
+            trace.set_current_row("operation_id_next", op_id);
         } else {
             trace.set_final_row("A_byte", (a1 as u32).into());
             trace.set_final_row("B_byte", (b1 as u32).into());
             trace.set_final_row("C_byte", (c1 as u32).into());
+            trace.set_final_row("operation_id_next", op_id);
         }
 
         // 4 rows for each binary operation
         trace.push_row();
         trace.set_current_row("operation_id", op_id);
+        trace.set_current_row("operation_id_next", op_id);
         trace.set_current_row("A_byte", (a2 as u32).into());
         trace.set_current_row("B_byte", (b2 as u32).into());
         trace.set_current_row("C_byte", (c2 as u32).into());
@@ -284,6 +287,7 @@ impl SubmachineKind for BinaryMachine {
 
         trace.push_row();
         trace.set_current_row("operation_id", op_id);
+        trace.set_current_row("operation_id_next", op_id);
         trace.set_current_row("A_byte", (a3 as u32).into());
         trace.set_current_row("B_byte", (b3 as u32).into());
         trace.set_current_row("C_byte", (c3 as u32).into());
@@ -293,6 +297,7 @@ impl SubmachineKind for BinaryMachine {
 
         trace.push_row();
         trace.set_current_row("operation_id", op_id);
+        trace.set_current_row("operation_id_next", op_id);
         trace.set_current_row("A_byte", (a4 as u32).into());
         trace.set_current_row("B_byte", (b4 as u32).into());
         trace.set_current_row("C_byte", (c4 as u32).into());
@@ -352,14 +357,19 @@ impl SubmachineKind for ShiftMachine {
         if trace.len() > 0 {
             trace.set_current_row("A_byte", (b1 as u32).into());
             trace.set_current_row("C_part", (((b1 as u32) << shl) >> shr).into());
+            trace.set_current_row("operation_id_next", op_id);
+            trace.set_current_row("B_next", b);
         } else {
             trace.set_final_row("A_byte", (b1 as u32).into());
             trace.set_final_row("C_part", (((b1 as u32) << shl) >> shr).into());
+            trace.set_final_row("operation_id_next", op_id);
+            trace.set_final_row("B_next", b);
         }
 
         // 4 rows for each shift operation
         trace.push_row();
         trace.set_current_row("operation_id", op_id);
+        trace.set_current_row("operation_id_next", op_id);
         trace.set_current_row("A_byte", (b2 as u32).into());
         let c_part_factor = (b2 as u32) << 8;
         let c_part = ((c_part_factor << shl) >> shr).into();
@@ -367,10 +377,12 @@ impl SubmachineKind for ShiftMachine {
         let a_row = a.u() & 0xff;
         trace.set_current_row("A", a_row.into());
         trace.set_current_row("B", b);
+        trace.set_current_row("B_next", b);
         trace.set_current_row("C", ((a_row << shl) >> shr).into());
         //
         trace.push_row();
         trace.set_current_row("operation_id", op_id);
+        trace.set_current_row("operation_id_next", op_id);
         trace.set_current_row("A_byte", (b3 as u32).into());
         let c_part_factor = (b3 as u32) << 16;
         let c_part = ((c_part_factor << shl) >> shr).into();
@@ -378,10 +390,12 @@ impl SubmachineKind for ShiftMachine {
         let a_row = a.u() & 0xffff;
         trace.set_current_row("A", a_row.into());
         trace.set_current_row("B", b);
+        trace.set_current_row("B_next", b);
         trace.set_current_row("C", ((a_row << shl) >> shr).into());
         //
         trace.push_row();
         trace.set_current_row("operation_id", op_id);
+        trace.set_current_row("operation_id_next", op_id);
         trace.set_current_row("A_byte", (b4 as u32).into());
         let c_part_factor = (b4 as u32) << 24;
         let c_part = ((c_part_factor << shl) >> shr).into();
@@ -389,6 +403,7 @@ impl SubmachineKind for ShiftMachine {
         let a_row = a.u() & 0xffffff;
         trace.set_current_row("A", a_row.into());
         trace.set_current_row("B", b);
+        trace.set_current_row("B_next", b);
         trace.set_current_row("C", ((a_row << shl) >> shr).into());
         // latch row
         trace.push_row();
diff --git a/riscv/tests/common/mod.rs b/riscv/tests/common/mod.rs
index 7aee28edc3..ba33dac17b 100644
--- a/riscv/tests/common/mod.rs
+++ b/riscv/tests/common/mod.rs
@@ -1,7 +1,9 @@
 use mktemp::Temp;
 use powdr_number::{BabyBearField, FieldElement, GoldilocksField, KnownField, KoalaBearField};
 use powdr_pipeline::{
-    test_util::{run_pilcom_with_backend_variant, test_plonky3_pipeline, BackendVariant},
+    test_util::{
+        run_pilcom_with_backend_variant, test_mock_backend, test_plonky3_pipeline, BackendVariant,
+    },
     Pipeline,
 };
 use powdr_riscv::CompilerOptions;
@@ -32,6 +34,8 @@ pub fn verify_riscv_asm_string<T: FieldElement, S: serde::Serialize + Send + Syn
     // Compute the witness once for all tests that follow.
     pipeline.compute_witness().unwrap();
 
+    test_mock_backend(pipeline.clone());
+
     // verify with PILCOM
     if T::known_field().unwrap() == KnownField::GoldilocksField {
         let pipeline_gl: Pipeline<GoldilocksField> =
@@ -72,7 +76,7 @@ pub fn verify_riscv_asm_string<T: FieldElement, S: serde::Serialize + Send + Syn
         pipeline.rollback_from_witness();
         let executor_trace: Vec<_> = execution.trace.into_iter().collect();
         let pipeline = pipeline.add_external_witness_values(executor_trace);
-        test_plonky3_pipeline::<T>(pipeline);
+        test_mock_backend(pipeline);
     }
 }
 
diff --git a/std/machines/large_field/binary.asm b/std/machines/large_field/binary.asm
index e7315b1972..f19bca5efe 100644
--- a/std/machines/large_field/binary.asm
+++ b/std/machines/large_field/binary.asm
@@ -35,5 +35,10 @@ machine Binary(byte_binary: ByteBinary) with
     B' = B * (1 - latch) + B_byte * FACTOR;
     C' = C * (1 - latch) + C_byte * FACTOR;
 
-    link => C_byte = byte_binary.run(operation_id', A_byte, B_byte);
+    // TODO: Currently, the bus linker does not support next references in operations and links.
+    //       We add an extra witness column to make the Goldilocks RISC-V machine work for now.
+    //       This will be fixed with #2140.
+    col witness operation_id_next;
+    operation_id' = operation_id_next;
+    link => C_byte = byte_binary.run(operation_id_next, A_byte, B_byte);
 }
diff --git a/std/machines/large_field/shift.asm b/std/machines/large_field/shift.asm
index deb158fb00..efd2d9c482 100644
--- a/std/machines/large_field/shift.asm
+++ b/std/machines/large_field/shift.asm
@@ -67,5 +67,11 @@ machine Shift(byte_shift: ByteShift) with
     unchanged_until(B, latch);
     C' = C * (1 - latch) + C_part;
 
-    link => C_part = byte_shift.run(operation_id', A_byte, B', FACTOR_ROW);
+    // TODO: Currently, the bus linker does not support next references in operations and links.
+    //       We add an extra witness columns to make the Goldilocks RISC-V machine work for now.
+    //       This will be fixed with #2140.
+    col witness operation_id_next, B_next;
+    operation_id' = operation_id_next;
+    B' = B_next;
+    link => C_part = byte_shift.run(operation_id_next, A_byte, B_next, FACTOR_ROW);
 }