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#----------------------------------------------------------
# Copyright (c) 2020 R. Timothy Edwards
# Revisions: See below
#
# This file is an Open Source foundry process describing
# the SkyWater S8 hybrid 0.18um / 0.13um fabrication
# process. The file may be distributed under the terms
# of the Apache 2.0 license agreement.
#
#----------------------------------------------------------
# This file is designed to be used with magic versions
# 8.3.24 or newer.
#----------------------------------------------------------
tech
format 35
sky130A
end
version
version 20200508
description "SkyWater SKY130: PRE ALPHA Vendor Open Source rules and DRC"
end
#----------------------------------------------------------
# Status 7/10/20: Rev 1 (alpha):
# First public release
#--------------------------------------------------------------
#--------------------------------------------------------------
# Supported device types
#--------------------------------------------------------------
# device name magic ID layer description
#-------------------------------------------------------------
# nshort nfet standard nFET
# nshort scnfet standard nFET in standard cell**
# nlowvt nfetlvt low Vt nFET
# sonos_p/e nsonos SONOS nFET
# pshort pfet standard pFET
# pshort scpfet standard pFET in standard cell**
# plowvt pfetlvt low Vt pFET
# phighvt pfethvt high Vt pFET
# ntvnative --- native nFET
# phv mvpfet thickox pFET
# nhv mvnfet thickox nFET
# nhvnative mvnnfet thickox native nFET
# ndiode ndiode n+ diff diode
# ndiode_h mvndiode thickox n+ diff diode
# pdiode pdiode p+ diff diode
# pdiode_h mvpdiode thickox p+ diff diode
# ndiode_native nndiode diode with nndiff
# ndiode_lvt ndiodelvt low Vt n+ diff diode
# pdiode_lvt pdiodelvt low Vt p+ diff diode
# pdiode_hvt pdiodehvt high Vt p+ diff diode
# nwdiode --- nwell diode
# dnwdiode_psub --- deep nwell diode to substrate
# dnwdiode_pw --- deep nwell diode to pwell
# xcmimc1 mimcap MiM cap 1st plate
# xcmimc2 mimcap2 MiM cap 2nd plate
# mrdn rdn n+ diff resistor
# mrdn_hv mvrdn thickox n+ diff resistor
# mrdp rdp p+ diff resistor
# mrdp_hv mvrdp thickox p+ diff resistor
# mrl1 rli local interconnect resistor
# mrp1 npres n+ poly resistor
# xhrpoly_* ppres (*) p+ poly resistor (300 Ohms/sq)
# uhrpoly_* xres (*) p+ poly resistor (2k Ohms/sq)
# xcnwvc varactor varactor (low Vt?)
# xcnwvc2 varactorhvt high Vt varactor
# xchvnwc mvvaractor thickox varactor
# xpwres rpw pwell resistor (in deep nwell)
#
# (*) Note that ppres may extract into some generic type
# called "xhrpoly", but only specific sizes of xhrpoly are
# allowed, and these are created from fixed layouts like the
# types below.
#
# (**) nFET and pFET in standard cells are the same as devices
# outside of the standard cell except for the DRC rule for
# FET to diffusion contact spacing (which is 0.05um, not 0.055um)
#
# To avoid creating a large number of types, a few ID layers are
# used in conjunction with standard devices types: "lvt" for
# low threshold voltage, and "hvt" for high threshold voltage.
# "dnwell" is used as an identifier layer where appropriate.
# Layer HVI (thick oxide) is treated differently, and types
# "mv*" are defined where thick oxide is required.
#
#-------------------------------------------------------------
# The following devices are not extracted but are represented
# only by script-generated subcells in the PDK.
#-------------------------------------------------------------
# nshortesd ESD nFET
# nhvesd ESD thickox nFET
# nhvnativeesd ESD native nFET
# phvesd ESD thickox pFET
# fnpass flash nFET device
# npnpar1x* parasitic NPN
# npn_1x1_2p0_hv thickox gated parasitic NPN
# pnppar parasitic PNP
# pnppar5x parasitic PNP
# xesd_ndiode_h_*** ESD n+ diode
# xesd_pdiode_h_*** ESD p+ diode
# reslocsub local substrate island indicator
# xcmvpp Vpp cap
# xcmvpp_2 Vpp cap
# xcmvpp_* Vpp cap
# xcmvpp* Vpp cap
# balun balun inductor
# ind4 inductor
# fuse metal fuse device
#--------------------------------------------------------------
#-----------------------------------------------------
# Tile planes
#-----------------------------------------------------
planes
dwell,dw
well,w
active,a
locali,li1,li
metal1,m1
metal2,m2
metal3,m3
cap1,c1
metal4,m4
cap2,c2
metal5,m5
block,b
comment,c
end
#-----------------------------------------------------
# Tile types
#-----------------------------------------------------
types
# Deep nwell
dwell dnwell,dnw
# Wells
well nwell,nw
-well pwell,pw
-well rpw,rpwell
-well obswell
# Transistors
active nmos,ntransistor,nfet
-active scnmos,scntransistor,scnfet
active pmos,ptransistor,pfet
-active scpmos,scptransistor,scpfet
-active nnmos,nntransistor
active mvnmos,mvntransistor,mvnfet
active mvpmos,mvptransistor,mvpfet
-active mvnnmos,mvnntransistor,mvnnfet,nnfet
-active varactor,varact,var
-active mvvaractor,mvvaract,mvvar
-active pmoslvt,pfetlvt
-active pmoshvt,pfethvt
-active nmoslvt,nfetlvt
-active varactorhvt,varacthvt,varhvt
-active nsonos,sonos
# Diffusions
active ndiff,ndiffusion,ndif
active pdiff,pdiffusion,pdif
-active mvndiff,mvndiffusion,mvndif
-active mvpdiff,mvpdiffusion,mvpdif
active ndiffc,ndcontact,ndc
active pdiffc,pdcontact,pdc
-active mvndiffc,mvndcontact,mvndc
-active mvpdiffc,mvpdcontact,mvpdc
active psubdiff,psubstratepdiff,ppdiff,ppd,psd
active nsubdiff,nsubstratendiff,nndiff,nnd,nsd
-active mvpsubdiff,mvpsubstratepdiff,mvppdiff,mvppd,mvpsd
-active mvnsubdiff,mvnsubstratendiff,mvnndiff,mvnnd,mvnsd
active psubdiffcont,psubstratepcontact,psc
active nsubdiffcont,nsubstratencontact,nsc
-active mvpsubdiffcont,mvpsubstratepcontact,mvpsc
-active mvnsubdiffcont,mvnsubstratencontact,mvnsc
-active obsactive
-active mvobsactive
# Poly
active poly,p,polysilicon
active polycont,pc,pcontact,polycut,polyc
active xpolycontact,xpolyc,xpc
# Resistors
-active npolyres,npres,mrp1
-active ppolyres,ppres,xhrpoly
-active xpolyres,xpres,xres,uhrpoly
-active ndiffres,rnd,rdn,rndiff
-active pdiffres,rpd,rdp,rpdiff
-active mvndiffres,mvrnd,mvrdn,mvrndiff
-active mvpdiffres,mvrpd,mvrdp,mvrpdiff
-active rmp
# Diodes
-active pdiode,pdi
-active ndiode,ndi
-active nndiode,nndi
-active pdiodec,pdic
-active ndiodec,ndic
-active nndiodec,nndic
-active mvpdiode,mvpdi
-active mvndiode,mvndi
-active mvpdiodec,mvpdic
-active mvndiodec,mvndic
-active pdiodelvt,pdilvt
-active pdiodehvt,pdihvt
-active ndiodelvt,ndilvt
-active pdiodelvtc,pdilvtc
-active pdiodehvtc,pdihvtc
-active ndiodelvtc,ndilvtc
# Local Interconnect
locali locali,li1,li
-locali corelocali,coreli1,coreli
-locali rlocali,rli1,rli
locali viali,vial,lic,licon,m1c,v0
-locali obsli1,obsli
-locali obsli1c,obslic,obslicon
# Metal 1
metal1 metal1,m1,met1
-metal1 rmetal1,rm1,rmet1
metal1 via1,m2contact,m2cut,m2c,via,v,v1
-metal1 obsm1
-metal1 padl
# Metal 2
metal2 metal2,m2,met2
-metal2 rmetal2,rm2,rmet2
metal2 via2,m3contact,m3cut,m3c,v2
-metal2 obsm2
# Metal 3
metal3 metal3,m3,met3
-metal3 rmetal3,rm3,rmet3
-metal3 obsm3
metal3 via3,v3
-cap1 mimcap,mim,capm
-cap1 mimcapcontact,mimcapc,mimcc,capmc
# Metal 4
metal4 metal4,m4,met4
-metal4 rmetal4,rm4,rmet4
-metal4 obsm4
metal4 via4,v4
-cap2 mimcap2,mim2,capm2
-cap2 mimcap2contact,mimcap2c,mim2cc,capm2c
# Metal 5
metal5 metal5,m5,met5
-metal5 rm5,rmetal5,rmet5
-metal5 obsm5
# Miscellaneous
-block glass
-block fillblock
-comment comment
-comment obscomment
end
#-----------------------------------------------------
# Magic contact types
#-----------------------------------------------------
contact
pc poly locali
ndc ndiff locali
pdc pdiff locali
nsc nsd locali
psc psd locali
ndic ndiode locali
ndilvtc ndiodelvt locali
nndic nndiode locali
pdic pdiode locali
pdilvtc pdiodelvt locali
pdihvtc pdiodehvt locali
xpc xpc locali
mvndc mvndiff locali
mvpdc mvpdiff locali
mvnsc mvnsd locali
mvpsc mvpsd locali
mvndic mvndiode locali
mvpdic mvpdiode locali
lic locali metal1
obslic obsli obsm1
via1 metal1 metal2
via2 metal2 metal3
via3 metal3 metal4
via4 metal4 metal5
stackable
# MiM cap contacts are not stackable!
mimcc mimcap metal4
mim2cc mimcap2 metal5
padl m1 m2 m3 m4 m5 glass
end
#-----------------------------------------------------
# Layer aliases
#-----------------------------------------------------
aliases
allwellplane nwell
allnwell nwell,obswell
allnfets nfet,scnfet,mvnfet,mvnnfet,nfetlvt,nsonos
allpfets pfet,scpfet,mvpfet,pfethvt,pfetlvt
allfets allnfets,allpfets,varactor,mvvaractor,varhvt
allnactivenonfet *ndiff,*nsd,*ndiode,*nndiode,*mvndiff,*mvnsd,*mvndiode,*ndiodelvt
allnactive allnactivenonfet,allnfets
allnactivenontap *ndiff,*ndiode,*nndiode,*mvndiff,*mvndiode,*ndiodelvt,allnfets
allnactivetap *nsd,*mvnsd,var,varhvt,mvvar
allpactivenonfet *pdiff,*psd,*pdiode,*mvpdiff,*mvpsd,*mvpdiode,*pdiodelvt,*pdiodehvt
allpactive allpactivenonfet,allpfets
allpactivenontap *pdiff,*pdiode,*mvpdiff,*mvpdiode,*pdiodelvt,*pdiodehvt,allpfets
allpactivetap *psd,*mvpsd
allactivenonfet allnactivenonfet,allpactivenonfet
allactive allactivenonfet,allfets
allactiveres ndiffres,pdiffres,mvndiffres,mvpdiffres
allndifflv *ndif,*nsd,*ndiode,ndiffres,nfet,scnfet,nfetlvt,nsonos
allpdifflv *pdif,*psd,*pdiode,pdiffres,pfet,scpfet,pfetlvt,pfethvt
alldifflv allndifflv,allpdifflv
allndifflvnonfet *ndif,*nsd,*ndiode,*nndiode,ndiffres,*ndiodelvt
allpdifflvnonfet *pdif,*psd,*pdiode,pdiffres,*pdiodelvt,*pdiodehvt
alldifflvnonfet allndifflvnonfet,allpdifflvnonfet
allndiffmv *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnnfet
allpdiffmv *mvpdif,*mvpsd,*mvpdiode,mvpdiffres,mvpfet
alldiffmv allndiffmv,allpdiffmv
allndiffmvnontap *mvndif,*mvndiode,*nndiode,mvndiffres,mvnfet,mvnnfet
allpdiffmvnontap *mvpdif,*mvpdiode,mvpdiffres,mvpfet
alldiffmvnontap allndiffmvnontap,allpdiffmvnontap
allndiffmvnonfet *mvndif,*mvnsd,*mvndiode,*nndiode,mvndiffres
allpdiffmvnonfet *mvpdif,*mvpsd,*mvpdiode,mvpdiffres
alldiffmvnonfet allndiffmvnonfet,allpdiffmvnonfet
alldiffnonfet alldifflvnonfet,alldiffmvnonfet
alldiff alldifflv,alldiffmv
allpolyres mrp1,xhrpoly,uhrpoly,rmp
allpolynonfet *poly,allpolyres,xpc
allpolynonres *poly,allfets,xpc
allpoly allpolynonfet,allfets
allpolynoncap *poly,xpc,allfets,allpolyres
allndiffcontlv ndc,nsc,ndic,nndic,ndilvtc
allpdiffcontlv pdc,psc,pdic,pdilvtc,pdihvtc
allndiffcontmv mvndc,mvnsc,mvndic
allpdiffcontmv mvpdc,mvpsc,mvpdic
allndiffcont allndiffcontlv,allndiffcontmv
allpdiffcont allpdiffcontlv,allpdiffcontmv
alldiffcontlv allndiffcontlv,allpdiffcontlv
alldiffcontmv allndiffcontmv,allpdiffcontmv
alldiffcont alldiffcontlv,alldiffcontmv
allcont alldiffcont,pc
allres allpolyres,allactiveres
allli *locali,coreli,rli
allm1 *m1,rm1
allm2 *m2,rm2
allm3 *m3,rm3
allm4 *m4,rm4
allm5 *m5,rm5
allpad padl
psub pwell
end
#-----------------------------------------------------
# Layer drawing styles
#-----------------------------------------------------
styles
styletype mos
dnwell cwell
nwell nwell
pwell pwell
rpwell pwell ptransistor_stripes
ndiff ndiffusion
pdiff pdiffusion
nsd ndiff_in_nwell
psd pdiff_in_pwell
nfet ntransistor ntransistor_stripes
scnfet ntransistor ntransistor_stripes
pfet ptransistor ptransistor_stripes
scpfet ptransistor ptransistor_stripes
var polysilicon ndiff_in_nwell
ndc ndiffusion metal1 contact_X'es
pdc pdiffusion metal1 contact_X'es
nsc ndiff_in_nwell metal1 contact_X'es
psc pdiff_in_pwell metal1 contact_X'es
pfetlvt ptransistor ptransistor_stripes implant1
pfethvt ptransistor ptransistor_stripes implant2
nfetlvt ntransistor ntransistor_stripes implant1
nsonos ntransistor implant3
varhvt polysilicon ndiff_in_nwell implant2
mvndiff ndiffusion hvndiff_mask
mvpdiff pdiffusion hvpdiff_mask
mvnsd ndiff_in_nwell hvndiff_mask
mvpsd pdiff_in_pwell hvpdiff_mask
mvnfet ntransistor ntransistor_stripes hvndiff_mask
mvnnfet ntransistor ndiff_in_nwell hvndiff_mask
mvpfet ptransistor ptransistor_stripes
mvvar polysilicon ndiff_in_nwell hvndiff_mask
mvndc ndiffusion metal1 contact_X'es hvndiff_mask
mvpdc pdiffusion metal1 contact_X'es hvpdiff_mask
mvnsc ndiff_in_nwell metal1 contact_X'es hvndiff_mask
mvpsc pdiff_in_pwell metal1 contact_X'es hvpdiff_mask
poly polysilicon
pc polysilicon metal1 contact_X'es
npolyres polysilicon silicide_block nselect2
ppolyres polysilicon silicide_block pselect2
xpc polysilicon pselect2 metal1 contact_X'es
rmp polysilicon poly_resist_stripes
pdiode pdiffusion pselect2
ndiode ndiffusion nselect2
pdiodec pdiffusion pselect2 metal1 contact_X'es
ndiodec ndiffusion nselect2 metal1 contact_X'es
nndiode ndiffusion nselect2 implant3
ndiodelvt ndiffusion nselect2 implant1
pdiodelvt pdiffusion pselect2 implant1
pdiodehvt pdiffusion pselect2 implant2
pdilvtc pdiffusion pselect2 implant1 metal1 contact_X'es
pdihvtc pdiffusion pselect2 implant2 metal1 contact_X'es
ndilvtc ndiffusion nselect2 implant1 metal1 contact_X'es
mvpdiode pdiffusion pselect2 hvpdiff_mask
mvndiode ndiffusion nselect2 hvndiff_mask
mvpdiodec pdiffusion pselect2 metal1 contact_X'es hvpdiff_mask
mvndiodec ndiffusion nselect2 metal1 contact_X'es hvndiff_mask
nndiodec ndiff_in_nwell nselect2 metal1 contact_X'es hvndiff_mask
locali metal1
coreli metal1
rli metal1 poly_resist_stripes
lic metal1 metal2 via1arrow
obsli metal1
obslic metal1 metal2 via1arrow
metal1 metal2
rm1 metal2 poly_resist_stripes
obsm1 metal2
m2c metal2 metal3 via2arrow
metal2 metal3
rm2 metal3 poly_resist_stripes
obsm2 metal3
m3c metal3 metal4 via3alt
metal3 metal4
rm3 metal4 poly_resist_stripes
obsm3 metal4
mimcap metal3 mems
mimcc metal3 contact_X'es mems
mimcap2 metal4 mems
mim2cc metal4 contact_X'es mems
via3 metal4 metal5 via4
metal4 metal5
rm4 metal5 poly_resist_stripes
obsm4 metal5
via4 metal5 metal6 via5
metal5 metal6
rm5 metal6 poly_resist_stripes
obsm5 metal6
glass overglass
mrp1 poly_resist poly_resist_stripes
xhrpoly poly_resist silicide_block
uhrpoly poly_resist
ndiffres ndiffusion ndop_stripes
pdiffres pdiffusion pdop_stripes
mvndiffres ndiffusion hvndiff_mask ndop_stripes
mvpdiffres pdiffusion hvpdiff_mask pdop_stripes
comment comment
error_p error_waffle
error_s error_waffle
error_ps error_waffle
fillblock cwell
obswell cwell
obsactive implant4
padl metal6 via6 overglass
magnet substrate_field_implant
rotate via3alt
fence via5
end
#-----------------------------------------------------
# Special paint/erase rules
#-----------------------------------------------------
compose
compose nfet poly ndiff
compose pfet poly pdiff
compose var poly nsd
compose mvnfet poly mvndiff
compose mvpfet poly mvpdiff
compose mvvar poly mvnsd
paint ndc nwell pdc
paint nfet nwell pfet
paint scnfet nwell scpfet
paint ndiff nwell pdiff
paint psd nwell nsd
paint psc nwell nsc
paint pdc pwell ndc
paint pfet pwell nfet
paint scpfet pwell scnfet
paint pdiff pwell ndiff
paint nsd pwell psd
paint nsc pwell psc
paint pdc coreli pdc
paint ndc coreli ndc
paint pc coreli pc
paint nsc coreli pc
paint psc coreli pc
paint viali coreli viali
paint coreli pdc pdc
paint coreli ndc ndc
paint coreli pc pc
paint coreli nsc nsc
paint coreli psc psc
paint coreli viali viali
paint m4 obsm4 m4
paint m5 obsm5 m5
end
#-----------------------------------------------------
# Electrical connectivity
#-----------------------------------------------------
connect
*nwell,*nsd,*mvnsd,dnwell *nwell,*nsd,*mvnsd,dnwell
pwell,*psd,*mvpsd pwell,*psd,*mvpsd
*li,coreli *li,coreli
*m1 *m1
*m2 *m2
*m3 *m3
*m4 *m4
*m5 *m5
*mimcap *mimcap
*mimcap2 *mimcap2
allnactivenonfet allnactivenonfet
allpactivenonfet allpactivenonfet
*poly,xpc,allfets *poly,xpc,allfets
end
#-----------------------------------------------------
# CIF/GDS output layer definitions
#-----------------------------------------------------
# NOTE: All values in this section MUST be multiples of 25
# or else magic will scale below the allowed layout grid size
cifoutput
#----------------------------------------------------------------
style gdsii
# NOTE: This section is used for actual GDS output
#----------------------------------------------------------------
scalefactor 10 nanometers
options calma-permissive-labels
gridlimit 5
#----------------------------------------------------------------
# Create a temp layer from the cell bounding box for use in
# generating ID layers. Note that "boundary", unlike "bbox",
# requires the FIXED_BBOX property (abutment box) in the cell.
#----------------------------------------------------------------
templayer CELLBOUND
boundary
#----------------------------------------------------------------
# BOUND
#----------------------------------------------------------------
layer BOUND CELLBOUND
calma 235 4
# Create a boundary outside of an abutment box, so that layers
# can be made to stretch to the abutment box edges. First strink
# so that any box that would be so small as to interact with
# itself will be removed.
templayer CELLRING CELLBOUND
shrink 345
grow 545
and-not CELLBOUND
#----------------------------------------------------------------
# DNWELL
#----------------------------------------------------------------
layer DNWELL dnwell
calma 64 18
layer PWRES rpw
and dnwell
calma 64 13
#----------------------------------------------------------------
# NWELL
#----------------------------------------------------------------
layer NWELL allnwell
bloat-all rpw dnwell
and-not rpw,pwell
calma 64 20
layer WELLTXT
labels allnwell noport
calma 64 16
layer WELLPIN
labels allnwell port
calma 64 5
#----------------------------------------------------------------
# SUB (text/port only)
#----------------------------------------------------------------
layer SUBTXT
labels pwell noport
calma 122 16
layer SUBPIN
labels pwell port
calma 64 59
#----------------------------------------------------------------
# DIFF
#----------------------------------------------------------------
layer DIFF allnactivenontap,allpactivenontap,allactiveres
labels allnactivenontap,allpactivenontap
calma 65 20
#----------------------------------------------------------------
# TAP
#----------------------------------------------------------------
layer TAP allnactivetap,allpactivetap
labels allnactivetap,allpactivetap
calma 65 44
#----------------------------------------------------------------
# PPLUS, NPLUS (PSDM, NSDM)
#----------------------------------------------------------------
templayer basePPLUS pdiffres,mvpdiffres
grow 15
or xhrpoly,uhrpoly,xpc
grow 110
bloat-or allpactivetap * 125 allnactivenontap 0
bloat-or allpactivenontap * 125 allnactivetap 0
bridge 380 380
templayer extendPPLUS basePPLUS,CELLRING
grow 185
shrink 185
and-not CELLRING
layer PPLUS basePPLUS,extendPPLUS
close 265000
calma 94 20
templayer baseNPLUS ndiffres,mvndiffres
grow 125
bloat-or allnactivetap * 125 allpactivenontap 0
bloat-or allnactivenontap * 125 allpactivetap 0
bridge 380 380
templayer extendNPLUS baseNPLUS,CELLRING
grow 185
shrink 185
and-not CELLRING
layer NPLUS baseNPLUS,extendNPLUS
close 265000
calma 93 44
#----------------------------------------------------------------
# LVTN
#----------------------------------------------------------------
layer LVTN pfetlvt,nfetlvt,mvvar,mvnnfet,nsonos,*pdiodelvt,*ndiodelvt,*nndiode
grow 180
bridge 380 380
grow 185
shrink 185
close 265000
calma 125 44
#----------------------------------------------------------------
# HVTP
#----------------------------------------------------------------
layer HVTP pfethvt,varhvt,*pdiodehvt
grow 180
bridge 380 380
grow 185
shrink 185
close 265000
calma 78 44
#----------------------------------------------------------------
# SONOS
#----------------------------------------------------------------
layer SONOS nsonos
grow 100
grow-min 410
bridge 500 410
grow 250
shrink 250
calma 80 20
#----------------------------------------------------------------
# SONOS requires COREID around area (areaid.ce). Also, the
# coreli layer indicates a cell needing COREID.
#----------------------------------------------------------------
layer COREID
bloat-all nsonos,coreli CELLBOUND
calma 81 2
#----------------------------------------------------------------
# STDCELL applies to all cells containing scnfet or scpfet.
#----------------------------------------------------------------
layer STDCELL scnfet
bloat-all scpfet,scnfet CELLBOUND
calma 81 4
#----------------------------------------------------------------
# RPM
#----------------------------------------------------------------
layer RPM
bloat-all xhrpoly xpc
grow 200
grow-min 1270
grow 420
shrink 420
calma 86 20
#----------------------------------------------------------------
# URPM (2kOhms/sq. poly implant)
#----------------------------------------------------------------
layer URPM
bloat-all uhrpoly xpc
grow 200
grow-min 1270
grow 420
shrink 420
calma 79 20
#----------------------------------------------------------------
# LDNTM (Tip implant for SONOS FETs)
#----------------------------------------------------------------
layer LDNTM
bloat-all nsonos *ndiff
grow 185
grow 345
shrink 345
calma 11 44
#----------------------------------------------------------------
# HVNTM (Tip implant for MV ndiff devices)
#----------------------------------------------------------------
templayer hvntm_block *mvpsd
grow 185
layer HVNTM
bloat-all mvnfet,mvnnfet,*mvndiode,mvrdn,*nndiode *mvndiff
bloat-all mvvaractor *mvnsd
and-not hvntm_block
grow 185
grow 345
shrink 345
calma 125 20
#----------------------------------------------------------------
# POLY
#----------------------------------------------------------------
layer POLY allpoly
calma 66 20
layer POLYTXT
labels allpoly noport
calma 66 16
layer POLYPIN
labels allpoly port
calma 66 5
#----------------------------------------------------------------
# THKOX (HVI) (includes rules NWELL 8-11 and DIFFTAP 14-26)
#----------------------------------------------------------------
templayer baseTHKOX *mvpsd
grow-min 470
or alldiffmv,mvvar
grow 185
bloat-all alldiffmv nwell
grow-min 600
bridge 700 600
templayer extendTHKOX baseTHKOX,CELLRING
grow 345
shrink 345
and-not CELLRING
layer THKOX baseTHKOX,extendTHKOX
calma 75 20
#----------------------------------------------------------------
# CONT (LICON)
#----------------------------------------------------------------
layer CONT allcont
squares-grid 0 170 170
calma 66 44
# Contact for pres is different than other LICON contacts
# See rules LICON 1b, 1c (width/length) and 2b (spacing)
templayer xpc_horiz xpc
shrink 1007
grow 1007
layer CONT xpc
and-not xpc_horiz
# Force long edge vertical for contacts narrower than 2um
# Minimum space is 350 but 520 satisfies no. of contacts rule
slots 80 190 520 80 2000 350
calma 66 44
layer CONT xpc
and xpc_horiz
# Force long edge vertical for contacts wider than 2um
# Minimum space is 350 but 520 satisfies no. of contacts rule
slots 80 2000 350 80 190 520
calma 66 44
#----------------------------------------------------------------
# NPC (Nitride poly cut)
# surrounds CONT (LICON) on poly only (i.e., pc)
#----------------------------------------------------------------
layer NPC pc
squares-grid 0 170 170
grow 100
bridge 270 270
grow 130
shrink 130
calma 95 20
# NPC is also generated on xhrpoly and uhrpoly resistors
layer NPC xpc,xhrpoly,uhrpoly
# xpc surrounds precision_resistor by 0.095um
grow 95
grow 130
shrink 130
calma 95 20
#----------------------------------------------------------------
# Device markers
#----------------------------------------------------------------
layer DIFFRES rdn,mvrdn,rdp,mvrdp
calma 65 13
layer POLYRES mrp1
calma 66 13
# POLYSHORT is a poly layer resistor like rli, rm1, etc., for metal layers
layer POLYSHORT rmp
calma 66 15
# POLYRES extends to edge of contact cut
layer POLYRES xhrpoly,uhrpoly
grow 60
and xpc
or xhrpoly,uhrpoly
calma 66 13
layer DIODE *pdi,*ndi,*nndi,*mvpdi,*mvndi,*pdilvt,*pdihvt,*ndilvt
# To be done: Expand to include anode, cathode, and guard ring
calma 81 23
#----------------------------------------------------------------
# LI
#----------------------------------------------------------------
layer LI allli
calma 67 20
layer LITXT
labels *locali,coreli noport
calma 67 16
layer LIPIN
labels *locali,coreli port
calma 67 5
layer LIRES rli
labels rli
calma 67 13
#----------------------------------------------------------------
# MCON
#----------------------------------------------------------------
layer MCON lic
squares-grid 0 170 190
calma 67 44
#----------------------------------------------------------------
# MET1
#----------------------------------------------------------------
layer MET1 allm1
calma 68 20
layer MET1TXT
labels allm1 noport
calma 68 16
layer MET1PIN
labels allm1 port
calma 68 5
layer MET1RES rm1
labels rm1
calma 68 13
#----------------------------------------------------------------
# VIA1
#----------------------------------------------------------------
layer VIA1 via1
squares-grid 55 150 170
calma 68 44
#----------------------------------------------------------------
# MET2
#----------------------------------------------------------------
layer MET2 allm2
calma 69 20
layer MET2TXT
labels allm2 noport
calma 69 16
layer MET2PIN
labels allm2 port
calma 69 5
layer MET2RES rm2
labels rm2
calma 69 13
#----------------------------------------------------------------
# VIA2
#----------------------------------------------------------------