From ff6e1647ce3f3bf9f4eeb238343f09bbf7d5bc0d Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Mon, 6 Jan 2025 08:46:30 +0000 Subject: [PATCH] performance: Update based on ARC review - Fix rate_limit to transition_latency - Add more description for PERF_SET_LIMIT https://github.com/riscv-non-isa/riscv-rpmi/issues/79#issuecomment-2559059036 Signed-off-by: Ley Foon Tan --- src/srvgrp-performance.adoc | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/srvgrp-performance.adoc b/src/srvgrp-performance.adoc index b2d9e92..35f2a48 100644 --- a/src/srvgrp-performance.adoc +++ b/src/srvgrp-performance.adoc @@ -463,7 +463,7 @@ loop: for (i = 0; i < list.returned; i++, num++) { opp[num].freq = list.entry[entry_num++]; opp[num].power = list.entry[entry_num++]; - opp[num].rate_limit = list.entry[entry_num++]; + opp[num].transition_latency = list.entry[entry_num++]; } /* Check if there are remaining OPP to be read */ @@ -734,7 +734,15 @@ performance domain in the system. ==== Service: PERF_SET_LIMIT (SERVICE_ID: 0x08) This service is used to set the performance limit of a specific -performance domain in the system. +performance domain in the system. Any subsequent calls to `PERF_SET_LEVEL` +will ensure the requested performance level stays within the defined range. + +If the current performance level falls outside the newly defined minimum and +maximum range, the platform microcontroller firmware will automatically adjust +it to comply with the updated limits. If notifications are enabled, the +platform microcontroller firmware will send an appropriate notification +(e.g., `PERF_LEVEL_CHANGE`, `PERF_POWER_CHANGE`, etc.) to the +application processor. [#table_perf_setlimit_request_data] .Request Data