From 5f74c9d5612949ef1947304aba62bc4ea86bf6f2 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Mon, 20 Nov 2023 10:19:57 -0800 Subject: [PATCH] Allow invalid virtual addresses not to match at all --- Sdtrig.tex | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/Sdtrig.tex b/Sdtrig.tex index 5d751821..e0b78981 100644 --- a/Sdtrig.tex +++ b/Sdtrig.tex @@ -323,8 +323,15 @@ \subsection{Invalid Virtual Addresses} For virtual address matches without a mask, \RcsrTdataTwo must be able to hold all valid virtual addresses but it need not be capable of holding other values. -Implementations may convert an invalid virtual address to a different invalid -virtual address before comparing the address to \RcsrTdataTwo. +If \RcsrTdataTwo can contain any invalid virtual addresses, then writes of an +invalid virtual address that can not be represented as-is should be converted to +a different invalid virtual address that can be represented. +Note that valid virtual addresses are sign extended, while valid physical +addresses are zero extended. It must be possible to represent all of them in +\RcsrTdataTwo. + +The compare value for an invalid virtual address may be a different invalid +virtual address than the effective address. \begin{commentary} A straightforward trigger implementation would compare the effective address @@ -338,6 +345,15 @@ \subsection{Invalid Virtual Addresses} invalid virtual address. \end{commentary} +In addition, implementations may decide not to perform trigger matching against +invalid virtual addresses at all. + +\begin{commentary} + The behavior of a given hart when matching against invalid virtual addresses + is hard to predict. Furthermore, accessing memory at an invalid virtual + address is already easy to catch because an exception will be generated. +\end{commentary} + \section{Multiple State Change Instructions} \label{sec:multistate} An instruction that performs multiple architectural state changes (e.g.,