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Inconsistency in setting cmderr
for different registers
#1072
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AFAIU, this does not matter since [3.14.6. Abstract Control and Status (
As for your second point, my understanding is
If I'm correct, maybe rewriting the rule as:
Will make it a bit clearer. |
@en-sc Thank you for pointing this out, I missed this part of the spec initially. So We discussed this with @stefano-codasip internally and prepared a proposal to clarify the wording in the spec: #1076
Please, let us know if the proposed change looks OK to you. Thanks. |
Thanks @en-sc - I also totally missed
As @JanMatCodasip pointed out, we discussed this internally, and both agree on the changes proposed in his pull request. |
For
abstractcs
,abstractauto
andcommand
, the RISC-V Debug spec reads:For
dataX
andprogbufX
the RISC-V Debug spec reads:The former indicates that the Debug Module should wait for
abstractcs.busy
to become zero before settingabstractcs.cmderr
to one. The latter seem to indicate an immediate setting ofabstractcs.cmderr
without waiting for the command to complete.abstractcs
,abstractauto
andcommand
registers, then I believe there is a further inconsistency / issue with following sentence of the spec:If we wait for the command to complete before setting
cmderr
to one, and we get an exception (cmderr
value 3), what shouldcmderr
be set to in that case? Because the busy error occurs before the exception, butcmderr
would still be zero when the exception comes in.The text was updated successfully, but these errors were encountered: