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Spec doesn't say to clear the second lowest bit of trap handler addresses #427

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Timmmm opened this issue Oct 14, 2024 · 0 comments

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v1.0

Timmmm commented Oct 14, 2024

When setting PC to a vectored address on trap or xRET, the spec says:

If the fetch is successful, the hart clears the low bit of the handler address and sets the PC to this handler address.

This is presumably a mistake - it should clear the lowest bit if 16-bit instructions are supported, otherwise clear the lowest two bits.

jb-brelot-nxp added the v1.0 label

jb-brelot-nxp self-assigned this

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