From 0e316c56a5f7adc52f4e337123647050c780b7a0 Mon Sep 17 00:00:00 2001 From: Paolo Savini Date: Thu, 29 Aug 2024 14:56:54 +0000 Subject: [PATCH] [RISCV] Apply the optimization of vle/vse for small sizes only to user emulation. This commit limits to used mode the use of a loop that emulates vle/vse RVV instructions that avoids some overhead in user mode but is ineffective in system mode. Signed-off-by: Paolo Savini --- target/riscv/vector_helper.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 9026661573c5..08f71abc2215 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -648,6 +648,7 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc, VSTART_CHECK_EARLY_EXIT(env); +#ifdef CONFIG_USER_ONLY /* For data sizes <= 64 bits and for LMUL=1 with VLEN=128 bits we get a * better performance by doing a simple simulation of the load/store * without the overhead of prodding the host RAM */ @@ -692,7 +693,7 @@ vext_ldst_us(void *vd, target_ulong base, CPURISCVState *env, uint32_t desc, vext_set_tail_elems_1s(evl, vd, desc, nf, esz, max_elems); return; } - +#endif vext_cont_ldst_elements(&info, base, env->vreg, env->vstart, evl, desc, log2_esz, false);