From 8823bae71c4e18979578ec2a3c9101e06c4c7a11 Mon Sep 17 00:00:00 2001 From: imkiva Date: Wed, 13 Mar 2024 13:30:40 +0800 Subject: [PATCH] [Clang][XTHeadVector] implement 12.10 `vdivu/vdiv/vrem/vremu` --- clang/include/clang/Basic/riscv_vector_xtheadv.td | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/clang/include/clang/Basic/riscv_vector_xtheadv.td b/clang/include/clang/Basic/riscv_vector_xtheadv.td index 64c87b27181de2..b99b906354a691 100644 --- a/clang/include/clang/Basic/riscv_vector_xtheadv.td +++ b/clang/include/clang/Basic/riscv_vector_xtheadv.td @@ -1036,6 +1036,12 @@ let UnMaskedPolicyScheme = HasPassthruOperand in { // 12.9. Vector Single-Width Integer Multiply Operations // 12.10. Vector Integer Divide Operations +let UnMaskedPolicyScheme = HasPassthruOperand in { + defm th_vdivu : RVVUnsignedBinBuiltinSet; + defm th_vdiv : RVVSignedBinBuiltinSet; + defm th_vremu : RVVUnsignedBinBuiltinSet; + defm th_vrem : RVVSignedBinBuiltinSet; +} // 12.11. Vector Widening Integer Multiply Operations