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Arch_DR.thy
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(*
* Copyright 2014, NICTA
*
* This software may be distributed and modified according to the terms of
* the GNU General Public License version 2. Note that NO WARRANTY is provided.
* See "LICENSE_GPLv2.txt" for details.
*
* @TAG(NICTA_GPL)
*)
theory Arch_DR
imports Untyped_DR
begin
context begin interpretation Arch . (*FIXME: arch_split*)
definition
"make_arch_duplicate cap \<equiv> case cap of
cdl_cap.PageTableCap oid _ mp \<Rightarrow> cdl_cap.PageTableCap oid Fake None
| cdl_cap.FrameCap dev oid rghts sz _ mp \<Rightarrow> cdl_cap.FrameCap dev oid rghts sz Fake None"
definition
"get_pt_mapped_addr cap \<equiv>
case cap of (cap.ArchObjectCap (arch_cap.PageTableCap p asid)) \<Rightarrow> transform_mapping asid
| _ \<Rightarrow> None"
definition
"transform_page_table_inv invok \<equiv> case invok of
ARM_A.PageTableMap cap slot pde slot' \<Rightarrow>
if (\<exists>oref attribs. pde = ARM_A.PageTablePDE (addrFromPPtr oref) attribs 0
\<and> is_pt_cap cap \<and> oref \<in> obj_refs cap)
then Some (cdl_page_table_invocation.PageTableMap (transform_cap cap)
(make_arch_duplicate (transform_cap cap))
(transform_cslot_ptr slot) (transform_pd_slot_ref slot'))
else None
| ARM_A.PageTableUnmap cap slot \<Rightarrow>
Some (cdl_page_table_invocation.PageTableUnmap (get_pt_mapped_addr cap)
(obj_ref_of cap) (transform_cslot_ptr slot))"
definition flush_type_map :: "ARM_A.flush_type \<Rightarrow> flush"
where "flush_type_map f \<equiv> case f of
ARM_A.Unify \<Rightarrow> flush.Unify
| ARM_A.Clean \<Rightarrow> flush.Clean
| ARM_A.Invalidate \<Rightarrow> flush.Invalidate
| ARM_A.CleanInvalidate \<Rightarrow> flush.CleanInvalidate"
definition transform_page_dir_inv :: "ARM_A.page_directory_invocation \<Rightarrow> cdl_page_directory_invocation option"
where "transform_page_dir_inv invok \<equiv> case invok of
ARM_A.page_directory_invocation.PageDirectoryFlush flush _ _ _ _ _ \<Rightarrow>
Some (cdl_page_directory_invocation.PageDirectoryFlush (flush_type_map flush))
|ARM_A.page_directory_invocation.PageDirectoryNothing \<Rightarrow>
Some (cdl_page_directory_invocation.PageDirectoryNothing) "
definition transform_page_inv :: "ARM_A.page_invocation \<Rightarrow> cdl_page_invocation option"
where "transform_page_inv invok \<equiv> case invok of
ARM_A.page_invocation.PageMap asid cap ct_slot entries \<Rightarrow>
Some (cdl_page_invocation.PageMap (transform_cap cap)
(case_sum (transform_pte \<circ> fst) (transform_pde \<circ> fst) entries)
(transform_cslot_ptr ct_slot)
(case_sum (\<lambda>pair. [ (transform_pt_slot_ref \<circ> hd \<circ> snd) pair])
(\<lambda>pair. [(transform_pd_slot_ref \<circ> hd \<circ> snd) pair]) entries))
| ARM_A.page_invocation.PageRemap asid entries \<Rightarrow>
Some (cdl_page_invocation.PageRemap
(case_sum (transform_pte \<circ> fst) (transform_pde \<circ> fst) entries)
(case_sum (\<lambda>pair. [ (transform_pt_slot_ref \<circ> hd \<circ> snd) pair])
(\<lambda>pair. [(transform_pd_slot_ref \<circ> hd \<circ> snd) pair]) entries))
| ARM_A.page_invocation.PageUnmap (arch_cap.PageCap _ a _ sz asid) ref \<Rightarrow>
Some (cdl_page_invocation.PageUnmap (transform_mapping asid) a (transform_cslot_ptr ref) (pageBitsForSize sz))
| ARM_A.page_invocation.PageFlush flush _ _ _ _ _ \<Rightarrow>
Some (cdl_page_invocation.PageFlushCaches (flush_type_map flush))
| ARM_A.page_invocation.PageGetAddr base \<Rightarrow> Some (cdl_page_invocation.PageGetAddress)
| _ \<Rightarrow> None"
definition translate_arch_invocation :: "arch_invocation \<Rightarrow> cdl_invocation option"
where "translate_arch_invocation invo \<equiv> case invo of
arch_invocation.InvokePageTable oper \<Rightarrow> option_map cdl_invocation.InvokePageTable (transform_page_table_inv oper)
| arch_invocation.InvokePage oper \<Rightarrow> option_map cdl_invocation.InvokePage (transform_page_inv oper)
| arch_invocation.InvokePageDirectory oper \<Rightarrow> option_map cdl_invocation.InvokePageDirectory (transform_page_dir_inv oper)
| arch_invocation.InvokeASIDControl oper \<Rightarrow>
Some (case oper of ARM_A.MakePool frame slot parent base
\<Rightarrow> cdl_invocation.InvokeAsidControl
(cdl_asid_control_invocation.MakePool
(cdl_cap.UntypedCap False {frame..frame + 2 ^ pageBits - 1} {})
(transform_cslot_ptr parent)
{frame..frame + 2 ^ pageBits - 1}
(transform_cslot_ptr slot)
(fst $ transform_asid base)))
| arch_invocation.InvokeASIDPool oper \<Rightarrow>
Some (case oper of ARM_A.Assign asid pool_ptr ct_slot
\<Rightarrow> cdl_invocation.InvokeAsidPool
(cdl_asid_pool_invocation.Assign
(transform_asid asid)
(transform_cslot_ptr ct_slot)
(pool_ptr, snd (transform_asid asid))))"
definition arch_invocation_relation :: "cdl_invocation \<Rightarrow> arch_invocation \<Rightarrow> bool"
where "arch_invocation_relation cdl_invok arch_invok \<equiv>
translate_arch_invocation arch_invok = Some cdl_invok"
lemma corres_symb_exec_in_gets:
"corres_underlying sr nf nf' r P P' f (gets g >>= j)
= (\<forall>v. corres_underlying sr nf nf' r P (P' and (\<lambda>s. g s = v)) f (j v))"
"corres_underlying sr nf nf' r P P' (gets g' >>= j') f'
= (\<forall>v. corres_underlying sr nf nf' r (P and (\<lambda>s. g' s = v)) P' (j' v) f')"
by (auto simp add: corres_underlying_def exec_gets split_def)
lemma select_ignored:
"select S >>= (\<lambda>_. f) = (if S = {} then select {} else f)"
apply (intro ext)
apply (simp add: select_def bind_def cart_singleton_image
image_image image_constant_conv)
done
lemma liftM_select:
"liftM f (select S) = select (f ` S)"
apply (rule ext)
apply (auto simp add: select_def bind_def liftM_def return_def split_def
cart_singleton_image image_image)
done
lemma gets_bind_alternative:
"((gets f >>= g) \<sqinter> h) = gets f >>= (\<lambda>x. g x \<sqinter> h)"
by (rule ext, simp add: alternative_def exec_gets)
lemma corres_from_rdonly:
assumes rdonly: "\<And>P. \<lbrace>P\<rbrace> f \<lbrace>\<lambda>rv. P\<rbrace>" "\<And>P. \<lbrace>P\<rbrace> g \<lbrace>\<lambda>rv. P\<rbrace>"
assumes rv: "\<And>s s'. \<lbrakk> P s; P' s'; (s, s') \<in> sr \<rbrakk>
\<Longrightarrow> \<lbrace>op = s'\<rbrace> g \<lbrace>\<lambda>rv s''. \<exists>rv' s'''. (rv', s''') \<in> fst (f s) \<and> r rv' rv\<rbrace>"
assumes nfl: "fl' \<Longrightarrow> no_fail P' g"
shows "corres_underlying sr fl fl' r P P' f g"
apply (clarsimp simp: corres_underlying_def no_failD[OF nfl])
apply (frule in_inv_by_hoareD[OF rdonly(2)], simp)
apply (frule(3) use_valid[OF _ rv], simp)
apply clarsimp
apply (frule in_inv_by_hoareD[OF rdonly(1)], simp)
apply fastforce
done
lemma get_pde_sp:
"\<lbrace>P\<rbrace> get_pde p \<lbrace>\<lambda>pde s. \<exists>pd. ko_at (ArchObj (arch_kernel_obj.PageDirectory pd)) (p && ~~ mask pd_bits) s
\<and> pde = (pd (ucast (p && mask pd_bits >> 2))) \<and> P s\<rbrace>"
apply (wp get_pde_wp)
apply auto
done
lemmas less_kernel_base_mapping_slots = less_kernel_base_mapping_slots_both[where x=0, simplified]
lemma dcorres_lookup_pt_slot:
"dcorres (dc \<oplus> (\<lambda>r r'. r = transform_pt_slot_ref r')) \<top>
( valid_arch_objs
and (\<exists>\<rhd> (lookup_pd_slot pd vptr && ~~ mask pd_bits))
and valid_idle and pspace_aligned
and K (is_aligned pd 14 \<and> ucast (lookup_pd_slot pd vptr && mask pd_bits >> 2) \<notin> kernel_mapping_slots))
(cdl_lookup_pt_slot pd vptr) (lookup_pt_slot pd vptr)"
apply (rule dcorres_expand_pfx)
apply (clarsimp simp:cdl_lookup_pt_slot_def
lookup_pt_slot_def liftE_bindE dcorres_lookup_pd_slot)
apply (rule corres_guard_imp)
apply (rule corres_split[OF _ dcorres_get_pde])
apply (rule_tac F = "case rv' of ARM_A.pde.PageTablePDE ptab x xa \<Rightarrow>
is_aligned (ptrFromPAddr ptab) 10 | _ \<Rightarrow> True"
in corres_gen_asm2)
apply (case_tac rv')
prefer 2
apply (clarsimp simp:transform_pde_def)
apply (rename_tac pt rights w)
apply (rule dcorres_returnOk)
apply (clarsimp simp:transform_pt_slot_ref_def
vaddr_segment_nonsense3 vaddr_segment_nonsense4)
apply (subst shiftl_shiftr_id)
apply simp
apply (rule le_less_trans)
apply (rule word_and_le1)
apply simp
apply simp
apply (simp add: transform_pde_def)+
apply (rule hoare_strengthen_post[where Q = "\<lambda>r. valid_pde r and pspace_aligned"] )
apply (wp get_pde_valid)
apply (clarsimp simp:valid_pde_def dest!:pt_aligned
split:ARM_A.pde.splits)
apply simp
apply auto
done
lemma lookup_pt_slot_aligned_6':
"\<lbrace> valid_arch_objs
and (\<exists>\<rhd> (lookup_pd_slot pd vptr && ~~ mask pd_bits))
and valid_idle and pspace_aligned
and K (is_aligned pd 14 \<and> is_aligned vptr 16 \<and> ucast (lookup_pd_slot pd vptr && mask pd_bits >> 2) \<notin> kernel_mapping_slots)\<rbrace>
lookup_pt_slot pd vptr \<lbrace>\<lambda>rv s. is_aligned rv 6\<rbrace>, -"
apply (rule hoare_gen_asmE)
apply (simp add:lookup_pt_slot_def)
apply (wp|wpc)+
apply clarsimp
apply (rule hoare_strengthen_post[where Q = "\<lambda>r. valid_pde r and pspace_aligned"] )
apply wp
apply simp+
apply (clarsimp simp:valid_pde_def dest!:pt_aligned split:ARM_A.pde.splits)
apply (erule aligned_add_aligned)
apply (rule is_aligned_shiftl)
apply (rule is_aligned_andI1)
apply (rule is_aligned_shiftr)
apply simp+
done
lemma create_mapping_entries_dcorres:
assumes pdid: "pdid = pd_ptr"
and pd_aligned: "is_aligned pd_ptr pd_bits"
and vp_aligned: "vmsz_aligned vptr pgsz"
and kb: "vptr < kernel_base"
shows
"dcorres (dc \<oplus> (\<lambda>rv rv'. rv = case_sum (\<lambda>pair. [ (transform_pt_slot_ref \<circ> hd \<circ> snd) pair])
(\<lambda>pair. [(transform_pd_slot_ref \<circ> hd \<circ> snd) pair]) rv'
\<and> case_sum (transform_pte \<circ> fst) (transform_pde \<circ> fst) rv'
= FrameCap False (ptrFromPAddr base)
vm_rights (pageBitsForSize pgsz) Fake None))
\<top>
(page_directory_at pd_ptr and valid_idle and valid_arch_objs and pspace_aligned
and (\<exists>\<rhd> (lookup_pd_slot pd_ptr vptr && ~~ mask pd_bits)))
(cdl_page_mapping_entries vptr (pageBitsForSize pgsz) pd_ptr)
(create_mapping_entries base vptr pgsz vm_rights attrib pd_ptr)"
proof -
have aligned_4_hd:
"\<And>r :: word32. is_aligned r 6 \<Longrightarrow> hd [r , r + 4 .e. r + 0x3C] = r"
apply (subgoal_tac "r \<le> r + 0x3C")
apply (clarsimp simp: upto_enum_step_def less_def | intro conjI)+
apply fastforce
apply (subst hd_map)
apply (clarsimp simp:upto_enum_def)
apply (clarsimp simp:upto_enum_def hd_map)
apply (rule is_aligned_no_wrap')
apply simp
apply simp
done
show ?thesis using pdid vp_aligned
apply hypsubst_thin
proof (induct pgsz)
case ARMSmallPage
show ?case using ARMSmallPage.prems
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (rule dcorres_injection_handler_rhs)
apply (simp add:liftE_bindE cdl_page_mapping_entries_def)
apply (rule corres_dummy_returnOk_r)
apply (rule corres_guard_imp)
apply (rule corres_splitEE[OF dcorres_returnOk])
apply assumption
apply (clarsimp)
apply (rule dcorres_lookup_pt_slot)
apply wp+
apply simp
apply (clarsimp simp:
dest!:page_directory_at_aligned_pd_bits )
apply (frule less_kernel_base_mapping_slots_both[OF kb,where x = 0])
apply simp
apply (simp add:pageBits_def pd_bits_def)
done
next
case ARMLargePage
show ?case using ARMLargePage.prems
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (rule dcorres_injection_handler_rhs)
apply (simp add:liftE_bindE cdl_page_mapping_entries_def)
apply (rule corres_dummy_returnOk_r)
apply (rule corres_guard_imp)
apply (rule corres_splitEE)
apply (rule_tac F = "is_aligned rv' 6" in corres_gen_asm2)
apply (rule dcorres_returnOk)
apply (subst aligned_4_hd)
apply clarsimp
apply assumption
apply (clarsimp)
apply (rule dcorres_lookup_pt_slot)
apply (wp lookup_pt_slot_aligned_6')+
apply simp
apply (clarsimp simp:
dest!:page_directory_at_aligned_pd_bits )
apply (frule less_kernel_base_mapping_slots_both[OF kb,where x = 0])
apply simp
apply (simp add:pageBits_def pd_bits_def vmsz_aligned_def)
done
next
case ARMSection
show ?case using ARMSection.prems
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (simp add:liftE_bindE cdl_page_mapping_entries_def)
apply (rule corres_guard_imp)
apply (rule_tac F = "is_aligned pd_ptr 14" in corres_gen_asm2)
apply (rule dcorres_returnOk)
apply (clarsimp simp:transform_pde_def vmsz_aligned_def)
apply (simp add: dcorres_lookup_pd_slot)
apply simp
apply (clarsimp simp: pd_bits_def pageBits_def
dest!:page_directory_at_aligned_pd_bits )
done
next
case ARMSuperSection
show ?case using ARMSuperSection.prems
using pd_aligned
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (simp add:liftE_bindE cdl_page_mapping_entries_def)
apply (rule corres_guard_imp)
apply (rule_tac F = "is_aligned pd_ptr 14" in corres_gen_asm2)
apply (rule dcorres_returnOk)
apply (clarsimp simp:transform_pde_def vmsz_aligned_def)
apply (subst aligned_4_hd)
apply (rule lookup_pd_slot_aligned_6)
apply (simp add:vmsz_aligned_def)+
apply (simp add: dcorres_lookup_pd_slot)
apply simp
apply (clarsimp simp: pd_bits_def pageBits_def
dest!:page_directory_at_aligned_pd_bits )
done
qed
qed
lemma create_mapping_entries_dcorres_select:
assumes pdid: "pdid = pd_ptr"
and pd_aligned: "is_aligned pd_ptr pd_bits"
and vp_aligned: "vmsz_aligned vptr pgsz"
and kb: "vptr < kernel_base"
shows
"dcorres (dc \<oplus> (\<lambda>rv rv'. rv = case_sum (\<lambda>pair. [ (transform_pt_slot_ref \<circ> hd \<circ> snd) pair])
(\<lambda>pair. [(transform_pd_slot_ref \<circ> hd \<circ> snd) pair]) rv'
\<and> case_sum (transform_pte \<circ> fst) (transform_pde \<circ> fst) rv'
= FrameCap False (ptrFromPAddr base)
vm_rights (pageBitsForSize pgsz) Fake None))
(\<lambda>s. frslots = all_pd_pt_slots pd pdid s
\<and> cdl_objects s pdid = Some pd)
(page_directory_at pd_ptr and valid_idle and valid_arch_objs and pspace_aligned
and (\<exists>\<rhd> (lookup_pd_slot pd_ptr vptr && ~~ mask pd_bits)))
(liftE (select {M. set M \<subseteq> frslots \<and> distinct M}) \<sqinter> Monads_D.throw)
(create_mapping_entries base vptr pgsz vm_rights attrib pd_ptr)"
proof -
have lookup_pd_slot_offs_times_4_mask_2[simp]:
"\<And>x. lookup_pd_slot pd_ptr vptr + of_nat x * 4 && mask 2 = 0"
apply (subst is_aligned_mask[symmetric])
apply (rule aligned_add_aligned[where n=2], simp_all add: word_bits_conv)
apply (simp add: lookup_pd_slot_def)
apply (rule aligned_add_aligned[OF pd_aligned],
simp_all add: pd_bits_def pageBits_def word_bits_conv)
apply (simp_all add: is_aligned_shiftl word_shift_by_2)
done
have inj_on_pd:
"inj_on (\<lambda>x. transform_pd_slot_ref (lookup_pd_slot pd_ptr vptr + toEnum x * 4)) {0 ..< 16}"
apply (rule inj_onI, clarsimp simp: transform_pd_slot_ref_def)
apply (drule bits_low_high_eq[rotated])
apply (simp add: mask_twice pd_bits_def pageBits_def)
apply (drule(1) mask_eqI[rotated])
apply (simp add: word_shift_by_2)
apply (rule ccontr, erule(3) of_nat_shift_distinct_helper)
apply (simp_all add: word_bits_conv)
done
have map_includedI:
"\<And>S g xs. \<lbrakk>set (map g xs) \<subseteq> S;xs \<noteq> []\<rbrakk> \<Longrightarrow> g (hd xs) \<in> S"
by (clarsimp simp:hd_map_simp neq_Nil_conv)
show ?thesis using pdid vp_aligned
apply clarsimp
proof (induct pgsz)
case ARMSmallPage
show ?case using ARMSmallPage.prems
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (rule dcorres_injection_handler_rhs)
apply (simp add: lookup_pt_slot_def liftE_bindE)
apply (rule corres_symb_exec_r[OF _ get_pde_sp get_pde_inv], simp_all)[1]
apply (clarsimp simp add: corres_alternate2 split: ARM_A.pde.split)
apply (rule corres_alternate1)
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp select_wp | simp)+
apply (simp add: returnOk_def in_monad select_def, wp)
apply (clarsimp simp: transform_pt_slot_ref_def all_pd_pt_slots_def
opt_object_page_directory[unfolded opt_object_def]
obj_at_def object_slots_def transform_page_directory_contents_def
unat_map_def kernel_pde_mask_def lookup_pd_slot_pd
pd_aligned
dest!: a_type_pdD
del: disjCI)
apply (drule valid_arch_objsD, simp add: obj_at_def, simp+)
apply (cut_tac less_kernel_base_mapping_slots[OF kb pd_aligned])
apply (drule_tac x="ucast (lookup_pd_slot pd_ptr vptr && mask pd_bits >> 2)" in bspec)
apply simp
apply (drule_tac t="pda v" for v in sym, simp)
apply (clarsimp simp: obj_at_def a_type_def del: disjCI)
apply (clarsimp split: Structures_A.kernel_object.split_asm if_split_asm
arch_kernel_obj.split_asm del: disjCI)
apply (frule_tac p="ptrFromPAddr v" for v in pspace_alignedD, simp+)
apply (rule disjI2, rule conjI)
apply (rule_tac x="unat (lookup_pd_slot pd_ptr vptr && mask pd_bits >> 2)"
in exI)
apply (simp add: transform_pde_def ucast_nat_def)
apply (subst is_aligned_add_helper, simp add: pt_bits_def pageBits_def)
apply (rule shiftl_less_t2n)
apply (rule order_le_less_trans, rule word_and_le1, simp add: pt_bits_def pageBits_def)
apply (simp add: pt_bits_def pageBits_def)
apply simp
apply (simp add: kernel_mapping_slots_def)
apply (subst is_aligned_add_helper, simp add: pt_bits_def pageBits_def)
apply (rule shiftl_less_t2n)
apply (rule order_le_less_trans, rule word_and_le1, simp add: pt_bits_def pageBits_def)
apply (simp add: pt_bits_def pageBits_def)
apply (simp add: dom_def transform_def transform_objects_def
restrict_map_def map_add_def)
apply (clarsimp simp: valid_idle_def pred_tcb_at_def obj_at_def)
done
next
case ARMLargePage
show ?case using ARMLargePage.prems
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (rule dcorres_injection_handler_rhs)
apply (simp add: lookup_pt_slot_def liftE_bindE)
apply (rule corres_symb_exec_r[OF _ get_pde_sp get_pde_inv], simp_all)[1]
apply (clarsimp simp add: corres_alternate2 split: ARM_A.pde.split)
apply (rename_tac word1 set word2)
apply (rule corres_alternate1)
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp select_wp | simp)+
apply (simp add: returnOk_def in_monad select_def, wp)
apply (clarsimp simp: pd_aligned obj_at_def lookup_pd_slot_pd
a_type_simps)
apply (drule valid_arch_objsD, simp add: obj_at_def, simp+)
apply (cut_tac less_kernel_base_mapping_slots[OF kb pd_aligned])
apply (drule_tac x="ucast (lookup_pd_slot pd_ptr vptr && mask pd_bits >> 2)" in bspec)
apply simp
apply (drule_tac t="pda v" for v in sym, simp)
apply (clarsimp simp: obj_at_def a_type_def del: disjCI)
apply (clarsimp split: Structures_A.kernel_object.split_asm if_split_asm
arch_kernel_obj.split_asm del: disjCI)
apply (frule_tac p="ptrFromPAddr v" for v in pspace_alignedD, simp+)
apply (rule map_includedI)
apply (clarsimp simp: transform_pt_slot_ref_def all_pd_pt_slots_def
opt_object_page_directory[unfolded opt_object_def]
object_slots_def transform_page_directory_contents_def
unat_map_def kernel_pde_mask_def
del: disjCI UnCI)
apply (subgoal_tac "x && ~~ mask pt_bits = ptrFromPAddr word1")
apply (rule disjI2, rule conjI)
apply (rule_tac x="unat (lookup_pd_slot pd_ptr vptr && mask pd_bits >> 2)"
in exI)
apply (simp add: transform_pde_def ucast_nat_def)
apply (simp add: kernel_mapping_slots_def)
apply (simp add: dom_def transform_def transform_objects_def
restrict_map_def)
apply (clarsimp simp: valid_idle_def pred_tcb_at_def obj_at_def)
apply (clarsimp simp: upto_enum_step_def pt_bits_def pageBits_def
split: if_split_asm)
apply (subst add.assoc, subst is_aligned_add_helper, assumption)
apply (simp only: word_shift_by_2 word_shiftl_add_distrib[symmetric])
apply (rule shiftl_less_t2n)
apply (rule is_aligned_add_less_t2n[where n=4])
apply (rule is_aligned_andI1)
apply (rule is_aligned_shiftr)
apply (simp add: vmsz_aligned_def)
apply (simp add: minus_one_helper5)
apply simp
apply (rule order_le_less_trans, rule word_and_le1, simp)
apply simp
apply simp
apply (simp add: upto_enum_step_def not_less upto_enum_def)
apply (rule is_aligned_no_wrap'[where sz = 6])
apply (erule aligned_add_aligned[OF _ is_aligned_shiftl])
apply (rule is_aligned_andI1[OF is_aligned_shiftr])
apply (simp add:vmsz_aligned_def)
apply simp
apply simp
done
next
case ARMSection
show ?case using ARMSection.prems
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (rule corres_alternate1)
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp select_wp | simp)+
apply (simp add: returnOk_def in_monad select_def, wp)
apply (clarsimp simp: transform_pde_def obj_at_def
opt_object_page_directory[unfolded opt_object_def]
dest!: a_type_pdD)
apply (simp add: transform_pd_slot_ref_def lookup_pd_slot_def
all_pd_pt_slots_def object_slots_def
transform_page_directory_contents_def
dom_def unat_map_def)
done
next
case ARMSuperSection
show ?case using ARMSuperSection.prems
using pd_aligned
apply (simp add: liftME_def[symmetric] o_def transform_pte_def
lookup_error_injection dc_def[symmetric])
apply (rule corres_alternate1)
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp select_wp | simp)+
apply (simp add: returnOk_def in_monad select_def, wp)
apply (clarsimp simp: transform_pde_def obj_at_def
opt_object_page_directory[unfolded opt_object_def]
dest!: a_type_pdD)
apply (rule map_includedI)
apply clarsimp
apply (clarsimp simp: all_pd_pt_slots_def transform_pd_slot_ref_def
object_slots_def transform_page_directory_contents_def
dom_def unat_map_def)
apply (simp add: not_less upto_enum_step_def upto_enum_def)
apply (rule is_aligned_no_wrap'[where sz = 6])
apply (erule lookup_pd_slot_aligned_6)
apply (simp add:pd_bits_def pageBits_def)
apply simp
done
qed
qed
schematic_goal get_master_pde_invalid_sp:
"\<lbrace>P\<rbrace> get_master_pde p
\<lbrace>\<lambda>pde s. pde = ARM_A.pde.InvalidPDE \<longrightarrow>
(\<exists>pd. ko_at (ArchObj (arch_kernel_obj.PageDirectory pd)) (?p && ~~ mask pd_bits) s \<and>
pde = pd (ucast (?p && mask pd_bits >> 2))) \<and> P s\<rbrace>"
apply (simp add:get_master_pde_def)
apply (wp get_pde_wp |wpc)+
apply (clarsimp simp:obj_at_def)
apply (auto simp add:mask_lower_twice pd_bits_def pageBits_def)
done
lemma shiftl_mod:
"\<lbrakk> n < 32; (x :: word32) < 2 ^ (32 - n) \<rbrakk> \<Longrightarrow> unat (x << n) mod 2 ^ n = 0"
apply (subst shiftl_t2n)
apply (clarsimp simp:unat_word_ariths)
apply (subgoal_tac "2 ^ n * unat x < 2 ^ 32")
apply (clarsimp)
apply (subst (asm) word_unat_power)
apply (drule unat_less_helper)
apply (rule_tac y="2^n * 2 ^(32-n)" in less_le_trans)
apply simp
apply (simp add:power_add[symmetric])
done
(*
* Decoding Arch invocations is equivalent.
*)
lemma decode_invocation_archcap_corres:
notes label_split_asm = invocation_label.split_asm arch_invocation_label.split_asm
shows
"\<lbrakk> Some intent = transform_intent (invocation_type label') args';
invoked_cap_ref = transform_cslot_ptr invoked_cap_ref';
invoked_cap = transform_cap invoked_cap';
excaps = transform_cap_list excaps';
invoked_cap' = cap.ArchObjectCap x \<rbrakk> \<Longrightarrow>
dcorres (dc \<oplus> (\<lambda>rv rv'. \<exists>ai. rv' = Invocations_A.InvokeArchObject ai
\<and> arch_invocation_relation rv ai))
\<top> (invs and valid_etcbs and valid_cap invoked_cap'
and (\<lambda>s. \<forall>x \<in> set (map fst excaps'). s \<turnstile> x)
and (\<lambda>s. \<forall>x \<in> set excaps'. cte_wp_at (diminished (fst x)) (snd x) s))
(Decode_D.decode_invocation invoked_cap invoked_cap_ref excaps intent)
(Decode_A.decode_invocation label' args' cap_index' invoked_cap_ref' invoked_cap' excaps')"
apply (rule_tac F="\<forall>x \<in> set (map fst excaps'). cap_aligned x" in corres_req)
apply (fastforce simp add: valid_cap_aligned)
apply clarsimp
proof (induct x)
case (ASIDPoolCap ap_ptr asid)
thus ?case
apply (simp add: Decode_D.decode_invocation_def
decode_invocation_def arch_decode_invocation_def
split del: if_split)
apply (clarsimp simp: get_asid_pool_intent_def transform_intent_def
map_option_Some_eq2 throw_opt_def
decode_asid_pool_invocation_def
split del: if_split split: label_split_asm list.split_asm)
apply (simp add: split_beta corres_alternate2
liftE_bindE corres_symb_exec_in_gets
corres_whenE_throwError_split_rhs
split: cap.split arch_cap.split option.split)
apply (clarsimp simp: get_index_def transform_cap_list_def
throw_on_none_def split_beta bindE_assoc
dc_def[symmetric])
apply (rule corres_guard_imp)
apply (rule corres_symb_exec_r)
apply (clarsimp simp: corres_whenE_throwError_split_rhs
corres_alternate2)
apply (rule corres_alternate1)
apply (simp add: select_ext_def bind_assoc)
apply (rule dcorres_symb_exec_r)
apply (rule corres_assert_rhs)
apply (rule_tac x="unat (free_asid_pool_select pool asid)" in select_pick_corres_asm)
apply (rule CollectI)
apply (elim conjE)
apply (rule le_p2_minus_1)
apply (rule unat_le_helper)
apply simp
apply (rule corres_returnOk[where P=\<top> and P'="\<lambda>rv. is_aligned asid asid_low_bits"])
apply (clarsimp simp:arch_invocation_relation_def translate_arch_invocation_def
transform_asid_def asid_high_bits_of_def cap_object_simps
shiftr_irrelevant up_ucast_inj_eq)
apply (erule impE)
apply (rule arg_cong[where f=ucast])
apply (subst shiftr_irrelevant)
apply (rule minus_one_helper5)
apply (simp add: asid_low_bits_def)
apply (subst ucast_le_migrate)
apply (simp add: asid_low_bits_def word_size)
apply (simp add: word_size)
apply (subst ucast_down_minus)
apply (simp add: is_down_def target_size_def source_size_def word_size)
apply (simp add: asid_low_bits_def)
apply simp
apply simp
apply (simp add: ucast_ucast_add)
apply (erule_tac P="ucast asid = 0" in notE)
apply (rule ucast_up_inj[where 'b=32])
apply (simp add: ucast_ucast_mask is_aligned_mask asid_low_bits_def)
apply simp
apply (wp select_wp | simp add:valid_cap_def split del: if_split)+
done
next
case ASIDControlCap
thus ?case
apply (simp add: Decode_D.decode_invocation_def
decode_invocation_def arch_decode_invocation_def
bindE_assoc
split del: if_split)
apply (clarsimp simp: get_asid_control_intent_def transform_intent_def
map_option_Some_eq2 throw_opt_def
decode_asid_control_invocation_def
transform_cnode_index_and_depth_def
split del: if_split split: label_split_asm list.split_asm)
apply (simp add: split_beta corres_alternate2
liftE_bindE corres_symb_exec_in_gets
corres_whenE_throwError_split_rhs
transform_cnode_index_and_depth_def
select_ignored
split: cap.split arch_cap.split option.split)
apply (clarsimp simp: get_index_def transform_cap_list_def
throw_on_none_def split_beta bindE_assoc
dc_def[symmetric])
apply (intro conjI impI allI)
apply (rule corres_symb_exec_r[OF dcorres_alternative_throw],
(wp | simp)+)
defer
apply ((rule corres_symb_exec_r[OF dcorres_alternative_throw],
(wp | simp)+)+)[11]
apply (rename_tac dev ptr sz v)
apply (case_tac dev)
apply simp
apply (rule corres_alternate2)
apply (rule corres_guard_imp)
apply (rule corres_symb_exec_r)
apply (rule dcorres_throw)
apply ((wp|simp)+)[5]
apply clarsimp
apply (rule conjI[rotated])
apply clarsimp
apply (rule corres_alternate2)
apply (rule corres_guard_imp)
apply (rule corres_symb_exec_r)
apply (rule dcorres_throw)
apply ((wp|simp)+)[5]
apply clarsimp
apply (rule corres_guard_imp)
apply (rule corres_alternate1)
apply (clarsimp simp: select_ext_def bind_assoc)
apply (rule dcorres_symb_exec_r)
apply (rule corres_assert_rhs)
apply (rule_tac x="unat (free_asid_select v)" in select_pick_corres_asm)
apply (rule CollectI)
apply (elim conjE)
apply (rule le_p2_minus_1)
apply (rule unat_le_helper)
apply simp
apply (simp add:bindE_assoc)
apply (rule corres_splitEE [OF _ dcorres_ensure_no_children[where P="op \<noteq> cap.NullCap"]])
apply (rule corres_splitEE [OF _ lookup_slot_for_cnode_op_corres])
apply (simp, elim conjE)
apply (rule corres_splitEE [OF _ dcorres_ensure_empty])
apply (rule corres_returnOk[where P=\<top> and P'=\<top>])
apply (simp add:transform_def arch_invocation_relation_def
translate_arch_invocation_def)
apply (simp add:transform_asid_def unat_ucast asid_high_bits_def asid_low_bits_def
unat_lt2p[where 'a=8, simplified])
apply (thin_tac "free_asid_select v \<notin> dom v")
apply clarsimp
apply (subgoal_tac "unat ((ucast (free_asid_select v) :: word32) << 10) mod 1024=0")
apply (simp add: asid_high_bits_of_shift[simplified asid_low_bits_def])
apply (rule shiftl_mod[where n=10, simplified])
apply (cut_tac x="free_asid_select v" and 'a=32 in ucast_less)
apply simp
apply (rule less_trans)
apply simp
apply simp
apply (wp lsfco_not_idle select_inv select_wp | simp)+
apply (simp add: cte_wp_at_caps_of_state neq_Nil_conv invs_mdb_cte mdb_cte_at_rewrite)
apply auto
done
next
case (PageCap dev base rights pgsz asid)
thus ?case
including no_pre
apply (simp add: Decode_D.decode_invocation_def
decode_invocation_def arch_decode_invocation_def
split del: if_split)
apply (clarsimp simp: get_page_intent_def transform_intent_def
map_option_Some_eq2 throw_opt_def
decode_page_invocation_def
transform_intent_page_map_def
transform_intent_page_remap_def
split del: if_split split: label_split_asm list.split_asm,
simp_all add: split_beta corres_alternate2
liftE_bindE corres_symb_exec_in_gets
corres_whenE_throwError_split_rhs
transform_cnode_index_and_depth_def
select_ignored throw_on_none_def
get_index_def transform_cap_list_def
dc_def[symmetric]
split: cap.split arch_cap.split option.split)
apply (clarsimp simp: gets_bind_alternative
gets_the_def bind_assoc corres_symb_exec_in_gets
assert_opt_def)
apply (clarsimp simp: neq_Nil_conv valid_cap_simps obj_at_def
opt_object_page_directory invs_valid_idle label_to_flush_type_def isPageFlushLabel_def
dest!: a_type_pdD)+
apply (rule_tac r'=dc and P'="I" and Q'="\<lambda>rv. I and (\<exists>\<rhd> (lookup_pd_slot rv x21 && ~~ mask pd_bits))" for I
in corres_alternative_throw_splitE[OF _ _ returnOk_wp[where x="()"], simplified])
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp+ | simp)+
apply (rule hoare_strengthen_post, rule hoare_post_taut)
apply (case_tac r, auto simp add: in_monad)[1]
apply (simp add: corres_whenE_throwError_split_rhs corres_alternate2
check_vp_alignment_def unlessE_whenE)
apply (clarsimp simp add: liftE_bindE[symmetric])
apply (rule corres_alternative_throw_splitE)
apply (rule corres_alternate1)
apply (rule corres_guard_imp,
rule create_mapping_entries_dcorres[OF refl])
apply (clarsimp simp: neq_Nil_conv cap_aligned_def
pd_bits_def pageBits_def)
apply (simp add: vmsz_aligned_def)
apply (simp only: linorder_not_le, erule order_le_less_trans[rotated])
apply simp
apply simp
apply (fastforce simp: neq_Nil_conv valid_cap_simps dest!:page_directory_at_rev)
apply (rule corres_from_rdonly[where P=\<top> and P'=\<top>], simp_all)[1]
apply (wp+ | simp)+
apply (rule validE_cases_valid, rule hoare_pre)
apply (wp+ | simp)+
apply (clarsimp simp add: in_monad conj_disj_distribR[symmetric])
apply (simp add: conj_disj_distribR cong: conj_cong)
apply (simp add: arch_invocation_relation_def translate_arch_invocation_def
transform_page_inv_def update_cap_rights_def
update_mapping_cap_status_def Types_D.cap_rights_def
mask_vm_rights_def transform_mapping_def)
apply wp+
apply (rule hoare_pre, wp, simp)
apply (rule hoare_pre, wp, auto)[1]
apply (wp | simp add: whenE_def split del: if_split)+
apply (rule hoare_pre, wp, simp)
apply clarsimp
apply (clarsimp simp: gets_bind_alternative
gets_the_def bind_assoc corres_symb_exec_in_gets
assert_opt_def)
apply (rule_tac F="v \<noteq> None" in corres_req)
apply (clarsimp simp: neq_Nil_conv valid_cap_simps obj_at_def
opt_object_page_directory invs_valid_idle
dest!: a_type_pdD)
apply (clarsimp simp: gets_bind_alternative corres_symb_exec_in_gets)
apply (rule_tac r'=dc and P'="I" and Q'="\<lambda>rv. I and (\<exists>\<rhd> (lookup_pd_slot rv b && ~~ mask pd_bits))" for I
in corres_alternative_throw_splitE[OF _ _ returnOk_wp[where x="()"], simplified])
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp | simp)+
apply (rule hoare_strengthen_post, rule hoare_post_taut)
apply (case_tac r, auto simp add: in_monad)[1]
apply (simp add: corres_whenE_throwError_split_rhs corres_alternate2
check_vp_alignment_def unlessE_whenE)
apply (clarsimp simp add: liftE_bindE[symmetric])
apply (rule_tac F="b < kernel_base" in corres_req)
apply (clarsimp simp: valid_cap_simps)
apply (rule corres_alternative_throw_splitE)
apply (rule corres_guard_imp,
rule create_mapping_entries_dcorres_select[OF refl])
apply (clarsimp simp: neq_Nil_conv cap_aligned_def
pd_bits_def pageBits_def)
apply (simp add: vmsz_aligned_def)
apply simp
apply (fastforce simp: opt_object_def)
apply (clarsimp simp: neq_Nil_conv valid_cap_simps)
apply auto[1]
apply (rule corres_from_rdonly[where P=\<top> and P'=\<top>], simp_all)[1]
apply (wp | simp)+
apply (rule validE_cases_valid, rule hoare_pre)
apply (wp | simp)+
apply (clarsimp simp add: in_monad conj_disj_distribR[symmetric])
apply (simp add: conj_disj_distribR cong: conj_cong)
apply (simp add: arch_invocation_relation_def translate_arch_invocation_def
transform_page_inv_def update_cap_rights_def
update_mapping_cap_status_def Types_D.cap_rights_def
mask_vm_rights_def)
apply wp+
apply (rule hoare_pre, wp, simp)
apply (rule hoare_pre, wp, auto)[1]
apply (wp | simp add: whenE_def split del: if_split)+
apply (rule hoare_pre, wp, simp)
apply (rule corres_alternate1)
apply (simp add: returnOk_def arch_invocation_relation_def cap_object_simps
translate_arch_invocation_def transform_page_inv_def)
apply (clarsimp)
apply (rule corres_from_rdonly)
apply (wp, clarsimp)
apply (simp only: Let_unfold, wp+, clarsimp, rule valid_validE, (wp whenE_inv)+, clarsimp, wp+)
apply (rule validE_cases_valid, rule hoare_pre)
apply (wp | simp add: Let_unfold arch_invocation_relation_def translate_arch_invocation_def
transform_page_inv_def)+
apply (clarsimp simp: in_monad conj_disj_distribR[symmetric])
apply (safe)
apply blast
apply (metis flush.exhaust)
apply (rule corres_from_rdonly)
apply (wp, clarsimp)
apply (simp only: Let_unfold, wp+, clarsimp, rule valid_validE, (wp whenE_inv)+, clarsimp, wp+)
apply (rule validE_cases_valid, rule hoare_pre)
apply (wp | simp add: Let_unfold arch_invocation_relation_def translate_arch_invocation_def
transform_page_inv_def)+
apply (clarsimp simp: in_monad conj_disj_distribR[symmetric])
apply (safe)
apply blast
apply (metis flush.exhaust)
apply (rule corres_from_rdonly)
apply (wp, clarsimp)
apply (simp only: Let_unfold, wp, clarsimp, rule valid_validE, (wp whenE_inv)+, clarsimp, wp+)
apply (rule validE_cases_valid, rule hoare_pre)
apply (wp | simp add: Let_unfold arch_invocation_relation_def translate_arch_invocation_def
transform_page_inv_def)+
apply (clarsimp simp: in_monad conj_disj_distribR[symmetric])
apply (safe)
apply blast
apply (metis flush.exhaust)
apply (rule corres_from_rdonly)
apply (wp, clarsimp)
apply (simp only: Let_unfold, wp, clarsimp, rule valid_validE, (wp whenE_inv)+, clarsimp, wp)
apply (rule validE_cases_valid, rule hoare_pre)
apply (wp | simp add: Let_unfold arch_invocation_relation_def translate_arch_invocation_def
transform_page_inv_def)+
apply (clarsimp simp: in_monad conj_disj_distribR[symmetric])
apply (safe)
apply blast
apply (metis flush.exhaust)
apply (clarsimp simp: isPageFlushLabel_def)+
apply (rule corres_returnOk,clarsimp simp:arch_invocation_relation_def
translate_arch_invocation_def transform_page_inv_def |
clarsimp simp: isPageFlushLabel_def)+
done
next
case (PageTableCap ptr asid)
thus ?case
apply (simp add: Decode_D.decode_invocation_def
decode_invocation_def arch_decode_invocation_def
split del: if_split)
apply (clarsimp simp: get_page_table_intent_def transform_intent_def
map_option_Some_eq2 throw_opt_def cdl_get_pt_mapped_addr_def
decode_page_table_invocation_def
transform_intent_page_table_map_def
split del: if_split
split: label_split_asm list.split_asm)
apply (simp add: throw_on_none_def transform_cap_list_def
get_index_def split_beta alternative_refl
transform_mapping_def corres_whenE_throwError_split_rhs corres_alternate2
split: cap.split arch_cap.split option.split cdl_frame_cap_type.splits)
apply (clarsimp simp: dc_def[symmetric] liftE_bindE
gets_the_def bind_assoc transform_mapping_def
corres_symb_exec_in_gets gets_bind_alternative)
apply (rule_tac r'=dc and P'="I" and Q'="\<lambda>rv. I and (\<exists>\<rhd> (lookup_pd_slot rv ab && ~~ mask pd_bits))"
for I in corres_alternative_throw_splitE[OF _ _ returnOk_wp[where x="()"], simplified])
apply (rule corres_from_rdonly, simp_all)[1]
apply (wp | simp)+
apply (rule hoare_strengthen_post, rule hoare_post_taut)
apply (case_tac r, auto simp add: in_monad)[1]
apply (simp add: corres_whenE_throwError_split_rhs corres_alternate2
check_vp_alignment_def unlessE_whenE)
apply clarsimp
apply (rule corres_symb_exec_r
[OF _ get_master_pde_invalid_sp get_master_pde_inv],simp_all)[1]
apply (clarsimp simp add: corres_whenE_throwError_split_rhs
corres_alternate2)
apply (rule corres_alternate1)
apply (rule corres_from_rdonly,simp_all)[1]
apply (wp select_wp | simp)+
apply (simp add: returnOk_def, wp)
apply (clarsimp simp: in_monad select_def arch_invocation_relation_def
translate_arch_invocation_def transform_page_table_inv_def
addrFromPPtr_def is_cap_simps cap_object_def
cdl_lookup_pd_slot_def cap_has_object_def
neq_Nil_conv cap_aligned_def)
apply (simp add: make_arch_duplicate_def transform_pd_slot_ref_def)
apply (clarsimp simp add: free_pd_slots_def opt_object_page_directory
obj_at_def invs_valid_idle pd_shifting
object_slots_def transform_page_directory_contents_def
unat_map_def kernel_pde_mask_def
transform_pde_def transform_mapping_def)
apply (simp add: pd_shifting_dual ucast_nat_def shiftr_20_less triple_shift_fun
le_shiftr linorder_not_le cap_object_simps)
apply (rule hoare_pre, wp, auto)[1]
apply (wp | simp)+
apply (simp add: whenE_def split del: if_split)
apply (rule hoare_pre, wp, simp)
apply (clarsimp simp: is_final_cap'_def
is_final_cap_def split:list.splits)
apply (simp add: liftE_bindE is_final_cap_def corres_symb_exec_in_gets
unlessE_whenE corres_whenE_throwError_split_rhs
corres_alternate2)
apply (rule corres_alternate1, simp add: returnOk_def)
apply (clarsimp simp: arch_invocation_relation_def translate_arch_invocation_def get_pt_mapped_addr_def
transform_page_table_inv_def cap_object_simps is_cap_simps)
done
next
case (PageDirectoryCap pd_ptr asid)
thus ?case
(* abandon hope, all who enter here *)
apply (simp add: Decode_D.decode_invocation_def
decode_invocation_def arch_decode_invocation_def
get_page_directory_intent_def transform_intent_def
isPDFlushLabel_def
split del: if_split)
apply (clarsimp simp: get_page_directory_intent_def transform_intent_def
map_option_Some_eq2 throw_opt_def decode_page_directory_invocation_def
split: label_split_asm cdl_intent.splits
InvocationLabels_H.invocation_label.splits arch_invocation_label.splits)
apply (clarsimp simp: neq_Nil_conv valid_cap_simps obj_at_def
Let_unfold opt_object_page_directory invs_valid_idle label_to_flush_type_def isPDFlushLabel_def isPageFlushLabel_def
dest!: a_type_pdD)+
apply (safe)
apply (simp_all add: Let_unfold)
apply (rule corres_from_rdonly)
apply (wp valid_validE[OF whenE_inv] | clarsimp split: option.splits | safe)+
apply (rule validE_cases_valid, rule hoare_pre, wp)
apply (clarsimp split: option.splits, safe)
apply (wp)
apply (clarsimp simp: whenE_def)
apply (intro conjI impI)
apply (wp resolve_vaddr_inv | simp add: transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule_tac x="Inl undefined" in exI)
apply (wp resolve_vaddr_inv | simp add: flush_type_map_def transform_page_dir_inv_def
Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric]
split: option.splits | rule impI conjI)+
apply (rule validE_cases_valid, rule hoare_pre, wp)
apply (clarsimp split: option.splits, safe)
apply (wp)
apply (clarsimp simp: whenE_def)
apply (intro conjI impI)
apply (wp resolve_vaddr_inv
| simp add: transform_page_dir_inv_def Let_unfold arch_invocation_relation_def
translate_arch_invocation_def in_monad
conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule_tac x="Inl undefined" in exI)
apply (wp resolve_vaddr_inv | simp add: flush_type_map_def transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule_tac x="Inl undefined" in exI)
apply (wp resolve_vaddr_inv | simp add: transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule corres_from_rdonly)
apply (wp valid_validE[OF whenE_inv] | clarsimp split: option.splits | safe)+
apply (rule validE_cases_valid, rule hoare_pre, wp)
apply (clarsimp simp: whenE_def)
apply (wp resolve_vaddr_inv | simp add: transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule_tac x="Inl undefined" in exI)
apply (wp resolve_vaddr_inv | simp add: flush_type_map_def transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule corres_from_rdonly)
apply (wp valid_validE[OF whenE_inv] | clarsimp split: option.splits | safe)+
apply (rule validE_cases_valid, rule hoare_pre, wp)
apply (clarsimp simp: whenE_def)
apply (wp resolve_vaddr_inv | simp add: transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule_tac x="Inl undefined" in exI)
apply (wp resolve_vaddr_inv | simp add: flush_type_map_def transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+
apply (rule corres_from_rdonly)
apply (wp valid_validE[OF whenE_inv] | clarsimp split: option.splits | safe)+
apply (rule validE_cases_valid, rule hoare_pre, wp)
apply (clarsimp split: option.splits, safe)
apply (wp)
apply (clarsimp simp: whenE_def)
apply (intro conjI impI)
apply (wp resolve_vaddr_inv | simp add: transform_page_dir_inv_def Let_unfold arch_invocation_relation_def translate_arch_invocation_def
in_monad conj_disj_distribR[symmetric] split: option.splits | rule impI conjI)+