diff --git a/_posts/2024-10-14-13-08-10-rvlwn-112.md b/_posts/2024-10-14-13-08-10-rvlwn-112.md new file mode 100644 index 00000000..230c1039 --- /dev/null +++ b/_posts/2024-10-14-13-08-10-rvlwn-112.md @@ -0,0 +1,710 @@ +--- +layout: weekly +author: '呀呀呀' +title: 'RISC-V Linux 内核及周边技术动态第 112 期' +draft: false +group: 'news' +album: 'RISC-V Linux' +license: 'cc-by-nc-nd-4.0' +permalink: /rvlwn-112/ +description: 'RISC-V Linux 内核及周边技术动态第 112 期' +category: + - 开源项目 + - Risc-V +tags: + - Linux + - RISC-V + - SMARC + - C900 + - SDHCI + - PLIC + - xtheadvector +--- + +> 时间：20241006
+> 编辑：晓瑜
+> 仓库：[RISC-V Linux 内核技术调研活动](https://gitee.com/tinylab/riscv-linux)
+> 赞助：PLCT Lab, ISCAS + +## 内核动态 + +### RISC-V 架构支持 + +**[v1: pinctrl: th1520: Improve code quality](http://lore.kernel.org/linux-riscv/20241005-th1520-pinctrl-fixes-v1-0-5c65dffa0d00@tenstorrent.com/)** + +> Two code quality improvements for the new TH1520 pinctrl driver [1]. + +**[v5: Enable serial NOR flash on RZ/G2UL SMARC EVK](http://lore.kernel.org/linux-riscv/20241004173235.74307-1-biju.das.jz@bp.renesas.com/)** + +> This patch series aims to enable serial NOR flash on RZ/G2UL SMARC EVK. + +**[v1: riscv: insn: add RV_EXTRACT_FUNCT3()](http://lore.kernel.org/linux-riscv/20241004112027.2639252-1-ben.dooks@codethink.co.uk/)** + +> Add extraction for the func3 field of most instructions +> for use with anyone who needs it. + +**[v1: riscv: interrupt-controller: Add T-HEAD C900 ACLINT SSWI](http://lore.kernel.org/linux-riscv/20241004080557.2262872-1-inochiama@gmail.com/)** + +> Add full support for T-HEAD C900 SSWI device. + +**[v1: mmc: sdhci: Prevent stale command and data interrupt handling](http://lore.kernel.org/linux-riscv/20241003161007.3485810-1-m.wilczynski@samsung.com/)** + +> While working with the T-Head 1520 LicheePi4A SoC, certain conditions +> arose that allowed me to reproduce a race issue in the sdhci code. + +**[v2: irqchip/sifive-plic: Unmask interrupt in plic_irq_enable()](http://lore.kernel.org/linux-riscv/20241003084152.2422969-1-namcao@linutronix.de/)** + +> It is possible that an interrupt is disabled and masked at the same time. + +**[v1: Add some validation for vector, vector crypto and fp stuff](http://lore.kernel.org/linux-riscv/20241002-defeat-pavestone-73d712895f0b@spud/)** + +> Kinda RFC as I want to see what people think of this. + +**[v1: Redo PolarFire SoC's mailbox/clock devicestrees and related code](http://lore.kernel.org/linux-riscv/20241002-private-unequal-33cfa6101338@spud/)** + +> Here's something that I've been mulling over for a while, since I +> started to understand how devicetree stuff was "meant" to be done. + +**[v1: riscv control-flow integrity for usermode](http://lore.kernel.org/linux-riscv/20241001-v5_user_cfi_series-v1-0-3ba65b6e550f@rivosinc.com/)** + +> v5 for cpu assisted riscv user mode control flow integrity. +> zicfiss and zicfilp [1] are ratified riscv CPU extensions. + +**[v9: Tracepoints and static branch in Rust](http://lore.kernel.org/linux-riscv/20241001-tracepoint-v9-0-1ad3b7d78acb@google.com/)** + +> An important part of a production ready Linux kernel driver is +> tracepoints. So to write production ready Linux kernel drivers in Rust, +> we must be able to call tracepoints from Rust code. This patch series +> adds support for calling tracepoints declared in C from Rust. + +**[v1: RISC-V: disallow gcc + rust builds](http://lore.kernel.org/linux-riscv/20241001-playlist-deceiving-16ece2f440f5@spud/)** + +> During the discussion before supporting rust on riscv, it was decided +> not to support gcc yet, due to differences in extension handling +> compared to llvm (only the version of libclang matching the c compiler +> is supported). + +**[v3: Add the dwmac driver support for T-HEAD TH1520 SoC](http://lore.kernel.org/linux-riscv/20240930-th1520-dwmac-v3-0-ae3e03c225ab@tenstorrent.com/)** + +> This series is based on 6.12-rc1 and depends on this pinctrl series. + +**[v3: pinctrl: Add T-Head TH1520 SoC pin controllers](http://lore.kernel.org/linux-riscv/20240930-th1520-pinctrl-v3-0-32cea2bdbecb@tenstorrent.com/)** + +> This adds a pin control driver created by Emil for the T-Head TH1520 +> RISC-V SoC used on the Lichee Pi 4A and BeagleV Ahead boards and updates +> the device trees to make use of it. + +**[v1: riscv: traps: make insn fetch common in unknown instruction](http://lore.kernel.org/linux-riscv/20240930171510.576364-1-ben.dooks@codethink.co.uk/)** + +> Add the insn as the second argument to riscv_v_first_use_handler() form +> the trap handler so when we add more handlers we can do the fetch of the +> instruction just once. + +**[v10: riscv: Add support for xtheadvector](http://lore.kernel.org/linux-riscv/d9eaaf71-dfe7-4bf8-8aee-538ee8ad9f24@outlook.com/)** + +> The devicetree name shown in OpenSBI is +> the one packed with U-Boot SPL. + +**[v1: i2c: microchip-core: actually use repeated sends](http://lore.kernel.org/linux-riscv/20240930-uneasy-dorsal-1acda9227b0d@spud/)** + +> At present, where repeated sends are intended to be used, the +> i2c-microchip-core driver sends a stop followed by a start. + +**[v1: riscv: mm: check the SV39 rule](http://lore.kernel.org/linux-riscv/20240928155626.267348-1-cs.os.kernel@gmail.com/)** + +> SV39 rule: the address of bits[63..39] should be the same as bit[38], +> it is easy to violate if configure PAGE_OFFSET too small. + +### LoongArch 架构支持 + +**[v7: Consolidate IO memcpy functions](http://lore.kernel.org/loongarch/20240930132321.2785718-1-jvetter@kalrayinc.com/)** + +> I have +> also added the full history of the patchset, because it now targets +> additional architectures. + +**[v2: LoongArch: Set correct size for VDSO code mapping](http://lore.kernel.org/loongarch/20240930045452.3946322-1-chenhuacai@loongson.cn/)** + +> The current size of VDSO code mapping is hardcoded to PAGE_SIZE. + +### ARM 架构支持 + +**[v1: kselftest/arm64: Validate that GCS push and write permissions work](http://lore.kernel.org/linux-arm-kernel/20241005-arm64-gcs-test-flags-v1-1-03cb9786c5cd@kernel.org/)** + +> Add trivial assembly programs which give themselves the appropriate +> permissions and then execute GCSPUSHM and GCSSTR, they will report errors +> by generating signals on the non-permitted instructions. + +**[v1: ARM/dma-mapping: Disambiguate ops from iommu_ops in IOMMU core](http://lore.kernel.org/linux-arm-kernel/20241004172335.386904-1-eahariha@linux.microsoft.com/)** + +> The architecture dma ops collides with the struct iommu_ops {} defined in +> /include/linux/iommu.h. This isn't a major issue, just a nagging annoyance. + +**[v6: Add NSS clock controller support for IPQ9574](http://lore.kernel.org/linux-arm-kernel/20241004080332.853503-1-quic_mmanikan@quicinc.com/)** + +> Add bindings, driver and devicetree node for networking sub system clock +> controller on IPQ9574. + +**[v1: arm64: Subscribe Microsoft Azure Cobalt 100 to erratum 3194386](http://lore.kernel.org/linux-arm-kernel/20241003225239.321774-1-eahariha@linux.microsoft.com/)** + +> Add the Microsoft Azure Cobalt 100 CPU to the list of CPUs suffering +> from erratum 3194386 added in commit 75b3c43eab59 ("arm64: errata: +> Expand speculative SSBS workaround") + +**[v1: Add support for Zyxel EX3510-B](http://lore.kernel.org/linux-arm-kernel/20241003220820.1345048-1-CFSworks@gmail.com/)** + +> This pair of patches adds an initial DT for the Zyxel EX3510-B "series" based +> on BCM4906, encompassing the EX3510-B0 and EX3510-B1. + +**[v3: perf arm-spe: Refactor data source encoding](http://lore.kernel.org/linux-arm-kernel/20241003185322.192357-1-leo.yan@arm.com/)** + +> This patch series is dependent on the metadata version 2 series [1] for +> retrieving CPU MIDR. + +**[v4: perf arm-spe: Introduce metadata version 2](http://lore.kernel.org/linux-arm-kernel/20241003184302.190806-1-leo.yan@arm.com/)** + +> This patch series enhances Arm SPE metadata in the Perf file to a +> version 2 format and maintains backward compatibility for metadata v1. + +**[v12: TI K3 M4F support on AM62 and AM64 SoCs](http://lore.kernel.org/linux-arm-kernel/20241003170118.24932-1-afd@ti.com/)** + +> M4F driver[0] and DT bindings[1] are in, so last step is adding the +> nodes to the base AM64/AM62 DTSI files, plus a couple of our +> SK boards. + +**[v1: of/kexec: save pa of initial_boot_params for arm64 and use it at kexec](http://lore.kernel.org/linux-arm-kernel/20241003113840.2972416-1-usamaarif642@gmail.com/)** + +> __pa() is only intended to be used for linear map addresses and using +> it for initial_boot_params which is in fixmap for arm64 will give an +> incorrect value. + +**[v7: Add support for the LAN966x PCI device using a DT overlay](http://lore.kernel.org/linux-arm-kernel/20241003081647.642468-1-herve.codina@bootlin.com/)** + +> This series adds support for the LAN966x chip when used as a PCI +> device. + +**[v3: Add I2C mux devices for yosemite4](http://lore.kernel.org/linux-arm-kernel/20241003074251.3818101-1-Delphine_CC_Chiu@wiwynn.com/)** + +**[v1: irqchip/gic-v4: Don't allow a VMOVP on a dying VPE](http://lore.kernel.org/linux-arm-kernel/20241002204959.2051709-1-maz@kernel.org/)** + +> Kunkun Jiang reports that there is a small window of opportunity for +> userspace to force a change of affinity for a VPE while the VPE has +> already been unmapped, but the corresponding doorbell interrupt still +> visible in /proc/irq/. + +**[v1: perf/arm_pmuv3: Add PMUv3.9 per counter EL0 access control](http://lore.kernel.org/linux-arm-kernel/20241002184326.1105499-1-robh@kernel.org/)** + +> KVM also configures PMUSERENR_EL1 in order to trap to EL2. UEN does not +> need to be set for it since only PMUv3.5 is exposed to guests. + +### X86 架构支持 + +**[v11: RFT: fork: Support shadow stacks in clone3()](http://lore.kernel.org/lkml/20241005-clone3-shadow-stack-v11-0-2a6a2bd6d651@kernel.org/)** + +> The kernel has recently added support for shadow stacks, currently +> x86 only using their CET feature but both arm64 and RISC-V have +> equivalent features (GCS and Zicfiss respectively), I am actively +> working on GCS[1]. + +**[v2: KVM: x86/mmu: Repurpose MMU shrinker into page cache shrinker](http://lore.kernel.org/lkml/20241004195540.210396-1-vipinsh@google.com/)** + +> This series is extracted out from the NUMA aware page table series[1]. +> MMU shrinker changes were in patches 1 to 9 in the old series. + +**[v1: seal system mappings](http://lore.kernel.org/lkml/20241004163155.3493183-1-jeffxu@google.com/)** + +> Seal vdso, vvar, sigpage, uprobes and vsyscall. +> Those mappings are readonly or executable only, sealing can protect +> them from ever changing during the life time of the process. + +**[v1: KVM: x86: Introduce new ioctl KVM_HYPERV_SET_TLB_FLUSH_INHIBIT](http://lore.kernel.org/lkml/20241004140810.34231-1-nikwip@amazon.de/)** + +> This series introduces a new ioctl KVM_HYPERV_SET_TLB_FLUSH_INHIBIT. + +**[v1: media: cec: seco: add HAS_IOPORT dependency](http://lore.kernel.org/lkml/20241004100223.638190-1-arnd@kernel.org/)** + +> Add a Kconfig dependency again. + +**[v1: objtool: Detect non-relocated text references](http://lore.kernel.org/lkml/05fd690797ea4e1ee798b7fa497857519ae840d4.1728001850.git.jpoimboe@kernel.org/)** + +> When kernel IBT is enabled, objtool detects all text references in order +> to determine which functions can be indirectly branched to. + +**[v1: futex: Improve get_inode_sequence_number()](http://lore.kernel.org/lkml/20241003121921.922394-1-ubizjak@gmail.com/)** + +> Rewrite FOR loop to a DO-WHILE loop where returns are moved out of +> the loop. Use atomic64_inc_return() instead of atomic64_add_return(). + +### 进程调度 + +**[v2: sched+mm: Track lazy active mm existence with hazard pointers](http://lore.kernel.org/lkml/20241004182734.1761555-1-mathieu.desnoyers@efficios.com/)** + +> Hazard pointers appear to be a good fit for replacing refcount based lazy +> active mm tracking. + +**[v1: sched/fair: optimize the PLACE_LAG when se->vlag is zero](http://lore.kernel.org/lkml/20241001070021.10626-1-shijie@os.amperecomputing.com/)** + +> So if se->vlag is zero, there is no need to waste cycles to +> do the calculation. + +**[v2: sched: Improve cache locality of RSEQ concurrency IDs](http://lore.kernel.org/lkml/20240930185920.1149002-1-mathieu.desnoyers@efficios.com/)** + +> This series addresses this shortcoming. I observed speedups up to 16.7x +> compared to plain mm_cid indexing in benchmarks. + +### 内存管理 + +**[v1: mm, kmsan: instrument copy_from_kernel_nofault](http://lore.kernel.org/linux-mm/20241005092316.2471810-1-snovitoll@gmail.com/)** + +> syzbot reported that bpf_probe_read_kernel() kernel helper triggered +> KASAN report via kasan_check_range() which is not the expected behaviour +> as copy_from_kernel_nofault() is meant to be a non-faulting helper. + +**[v9: Generic `Allocator` support for Rust](http://lore.kernel.org/linux-mm/20241004154149.93856-1-dakr@kernel.org/)** + +> This patch series adds generic kernel allocator support for Rust, which so far +> is limited to `kmalloc` allocations. + +**[v1: preempt_rt: increase PERCPU_DYNAMIC_SIZE_SHIFT for slab randomization](http://lore.kernel.org/linux-mm/20241004095702.637528-1-arnd@kernel.org/)** + +> The problem is the additional size overhead from local_lock in +> struct kmem_cache_cpu. Avoid this by preallocating a larger area. + +**[v3: vdso: Use only headers from the vdso/ namespace](http://lore.kernel.org/linux-mm/20241003152910.3287259-1-vincenzo.frascino@arm.com/)** + +> The recent implementation of getrandom in the generic vdso library, +> includes headers from outside of the vdso/ namespace. + +**[v5: tmpfs: Add case-insensitive support for tmpfs](http://lore.kernel.org/linux-mm/20241002234444.398367-1-andrealmeid@igalia.com/)** + +> This patchset adds support for case-insensitive file names lookups in +> tmpfs. + +**[v3: mm: swap: Make some count_mthp_stat() call-sites be THP-agnostic.](http://lore.kernel.org/linux-mm/20241002225822.9006-1-kanchana.p.sridhar@intel.com/)** + +> This patch propagates the benefits of the above change to page_io.c and +> vmscan.c. + +**[v1: mm/truncate: reset xa_has_values flag on each iteration](http://lore.kernel.org/linux-mm/20241002225150.2334504-1-shakeel.butt@linux.dev/)** + +> Currently mapping_try_invalidate() and invalidate_inode_pages2_range() +> traverses the xarray in batches and then for each batch, maintains and +> set the flag named xa_has_values if the batch has a shadow entry to +> clear the entries at the end of the iteration. + +**[v10: timekeeping/fs: multigrain timestamp redux](http://lore.kernel.org/linux-mm/20241002-mgtime-v10-0-d1c4717f5284@kernel.org/)** + +> This is a replacement for the v6 series sitting in Christian's +> vfs.mgtime branch. + +**[v9: fs: multigrain timestamp redux](http://lore.kernel.org/linux-mm/20241002-mgtime-v9-0-77e2baad57ac@kernel.org/)** + +> This is a replacement for the v6 series sitting in Christian's +> vfs.mgtime branch. + +**[v4: bpf-next: bpf: Add kmem_cache iterator and kfunc](http://lore.kernel.org/linux-mm/20241002180956.1781008-1-namhyung@kernel.org/)** + +> I'm proposing a new iterator and a kfunc for the slab memory allocator +> to get information of each kmem_cache like in /proc/slabinfo or +> /sys/kernel/slab in more flexible way. + +**[v1: mm: zswap: zswap_store_page() will initialize entry after adding to xarray.](http://lore.kernel.org/linux-mm/20241002173329.213722-1-kanchana.p.sridhar@intel.com/)** + +> This incorporates Yosry's suggestions in [1] for further simplifying +> zswap_store_page(). + +**[v1: KSTATE: a mechanism to migrate some part of the kernel state across kexec](http://lore.kernel.org/linux-mm/20241002160722.20025-1-arbn@yandex-team.com/)** + +> This is a very early RFC with a lot of hacks and cut corners with +> the purpose to demonstrate the concept itself. + +**[v13: arm64/gcs: Provide support for GCS in userspace](http://lore.kernel.org/linux-mm/20241001-arm64-gcs-v13-0-222b78d87eee@kernel.org/)** + +> The arm64 Guarded Control Stack (GCS) feature provides support for +> hardware protected stacks of return addresses, intended to provide +> hardening against return oriented programming (ROP) attacks and to make +> it easier to gather call stacks for applications such as profiling. + +**[v2: tip/perf/core: uprobes,mm: speculative lockless VMA-to-uprobe lookup](http://lore.kernel.org/linux-mm/20241001225207.2215639-1-andrii@kernel.org/)** + +> Implement speculative (lockless) resolution of VMA to inode to uprobe, +> bypassing the need to take mmap_lock for reads, if possible. + +**[v3: SLUB: Add support for per object memory policies](http://lore.kernel.org/linux-mm/20241001-strict_numa-v3-1-ee31405056ee@gentwo.org/)** + +> The old SLAB allocator used to support memory policies on a per +> allocation bases. In SLUB the memory policies are applied on a +> per page frame / folio bases. Doing so avoids having to check memory +> policies in critical code paths for kmalloc and friends. + +### 文件系统 + +**[v1: fs: port files to rcuref_long_t](http://lore.kernel.org/linux-fsdevel/20241005-brauner-file-rcuref-v1-0-725d5e713c86@kernel.org/)** + +> As atomic_inc_not_zero() is implemented with a try_cmpxchg() loop it has +> O(N^2) behaviour under contention with N concurrent operations. The +> rcuref infrastructure uses atomic_add_negative_relaxed() for the fast +> path, which scales better under contention and we get overflow +> protection for free. + +**[v1: UFS: Final folio conversions](http://lore.kernel.org/linux-fsdevel/20241005180214.3181728-1-willy@infradead.org/)** + +> This is the last use of struct page I've been able to find in UFS. + +**[v1: btrfs reads through iomap](http://lore.kernel.org/linux-fsdevel/cover.1728071257.git.rgoldwyn@suse.com/)** + +> These patches incorporate btrfs buffered reads using iomap code. +> The final goal here is to give all folio handling to iomap. + +**[v1: netfs: In readahead, put the folio refs as soon extracted](http://lore.kernel.org/linux-fsdevel/3771538.1728052438@warthog.procyon.org.uk/)** + +> netfslib currently defers dropping the ref on the folios it obtains during +> readahead to after it has started I/O on the basis that we can do it whilst +> we wait for the I/O to complete, but this runs the risk of the I/O +> collection racing with this in future. + +**[v1: Stash overlay real upper file in backing_file](http://lore.kernel.org/linux-fsdevel/20241004102342.179434-1-amir73il@gmail.com/)** + +> Al Viro posted a proposal to cleanup overlayfs handling of temporary +> cloned real file references. + +**[v7: block atomic writes for xfs](http://lore.kernel.org/linux-fsdevel/20241004092254.3759210-1-john.g.garry@oracle.com/)** + +> This series expands atomic write support to filesystems, specifically +> XFS. + +**[v1: [PATCHES] struct fderr](http://lore.kernel.org/linux-fsdevel/20241003234534.GM4017910@ZenIV/)** + +> There we want not "file reference or nothing" - it's "file reference +> or an error". + +**[v2: fanotify: allow reporting errors on failure to open fd](http://lore.kernel.org/linux-fsdevel/20241003142922.111539-1-amir73il@gmail.com/)** + +> When working in "fd mode", fanotify_read() needs to open an fd +> from a dentry to report event->fd to userspace. + +**[v1: nilfs2: Finish folio conversion](http://lore.kernel.org/linux-fsdevel/20241002150036.1339475-1-willy@infradead.org/)** + +> After "nilfs2: Convert nilfs_copy_buffer() to use folios", there are +> only a few remaining users of struct page in all of nilfs2, and they're + +**[v5: rust: add PidNamespace](http://lore.kernel.org/linux-fsdevel/20241002-brauner-rust-pid_namespace-v5-1-a90e70d44fde@kernel.org/)** + +> The lifetime of `PidNamespace` is bound to `Task` and `struct pid`. + +### 网络设备 + +**[v1: net: sfp: change quirks for Alcatel Lucent G-010S-P](http://lore.kernel.org/netdev/TYCPR01MB843714CF627B46DFA06E471B98732@TYCPR01MB8437.jpnprd01.prod.outlook.com/)** + +> Seems Alcatel Lucent G-010S-P also have the same problem that it uses +> TX_FAULT pin for SOC uart. So apply sfp_fixup_ignore_tx_fault to it. + +**[v2: net-next: tg3: Link IRQs, NAPIs, and queues](http://lore.kernel.org/netdev/20241005145717.302575-1-jdamato@fastly.com/)** + +> This RFC v3 follows from a previous RFC [1] submission which I noticed +> had an issue in patch 2. + +**[v2: net-next: rust: Add IO polling](http://lore.kernel.org/netdev/20241005122531.20298-1-fujita.tomonori@gmail.com/)** + +> Add Rust version of read_poll_timeout (include/linux/iopoll.h), which +> polls periodically until a condition is met or a timeout is reached. +> By using the function, the 6th patch fixes QT2025 PHY driver to sleep +> until the hardware becomes ready. + +**[v2: net: rtnetlink: Handle error of rtnl_register_module().](http://lore.kernel.org/netdev/20241004222358.79129-1-kuniyu@amazon.com/)** + +> While converting phonet to per-netns RTNL, I found a weird comment + +**[v3: net-next: rtnetlink: Per-netns RTNL.](http://lore.kernel.org/netdev/20241004221031.77743-1-kuniyu@amazon.com/)** + +> rtnl_lock() is a "Big Kernel Lock" in the networking slow path and +> serialised all rtnetlink requests until 4.13. + +**[v1: net: phy: disable eee due to errata on various KSZ switches](http://lore.kernel.org/netdev/20241004213235.3353398-1-tharvey@gateworks.com/)** + +> The well-known errata regarding EEE not being functional on various KSZ +> switches has been refactored a few times. Recently the refactoring has +> excluded several switches that the errata should also apply to. + +**[v3: net-next: eth: fbnic: Add hardware monitoring support via HWMON interface](http://lore.kernel.org/netdev/20241004204953.2223536-1-sanman.p211993@gmail.com/)** + +> This patch adds support for hardware monitoring to the fbnic driver, +> allowing for temperature and voltage sensor data to be exposed to +> userspace via the HWMON interface. + +**[v2: net-next: ipv4: Namespacify IPv4 address hash table.](http://lore.kernel.org/netdev/20241004195958.64396-1-kuniyu@amazon.com/)** + +> This is a prep of per-net RTNL conversion for RTM_(NEW|DEL|SET)ADDR. + +**[v1: net-next: tcp: add skb->sk to more control packets](http://lore.kernel.org/netdev/20241004191644.1687638-1-edumazet@google.com/)** + +> Currently, TCP can set skb->sk for a variety of transmit packets. + +**[[net-next PATCH v2] net: phy: Validate PHY LED OPs presence before registering](http://lore.kernel.org/netdev/20241004183312.14829-1-ansuelsmth@gmail.com/)** + +> Validate PHY LED OPs presence before registering and parsing them. +> Defining LED nodes for a PHY driver that actually doesn't supports them +> is redundant and useless. + +**[v1: net-next: vmxnet3: support higher link speeds from vmxnet3 v9](http://lore.kernel.org/netdev/20241004174303.5370-1-ronak.doshi@broadcom.com/)** + +> This patch adds support for vmxnet3 to report higher link speeds and +> converts it to mbps as expected by Linux stack. + +**[v2: net-next: wireguard: Wire-up big tcp support](http://lore.kernel.org/netdev/20241004165518.120567-1-daniel@iogearbox.net/)** + +> Advertise GSO_MAX_SIZE as TSO max size in order support BIG TCP for wireguard. + +**[v1: net-next: net: Optimize IPv6 path in ip_neigh_for_gw()](http://lore.kernel.org/netdev/20241004162720.66649-1-leitao@debian.org/)** + +> This optimization aligns with the trend of IPv6 becoming the default IP +> version in many deployments, and should benefit modern network +> configurations. + +**[v2: net-next: Allow isolating PHY devices](http://lore.kernel.org/netdev/20241004161601.2932901-1-maxime.chevallier@bootlin.com/)** + +> This is the V2 of a series to add isolation support for PHY devices. + +**[v1: net-next: net: phy: mxl-gpy: add missing support for TRIGGER_NETDEV_LINK_10](http://lore.kernel.org/netdev/cc5da0a989af8b0d49d823656d88053c4de2ab98.1728057367.git.daniel@makrotopia.org/)** + +> The PHY also support 10MBit/s links as well as the corresponding link +> indication trigger to be offloaded. Add TRIGGER_NETDEV_LINK_10 to the +> supported triggers. + +**[v1: net-next: net: phy: realtek: make sure paged read is protected by mutex](http://lore.kernel.org/netdev/792b8c0d1fc194e2b53cb09d45a234bc668e34c6.1728057091.git.daniel@makrotopia.org/)** + +> As we cannot rely on phy_read_paged function before the PHY is +> identified, the paged read in rtlgen_supports_2_5gbps needs to be open +> coded as it is being called by the match_phy_device function, ie. before +> .read_page and .write_page have been populated. + +**[v1: net-next: net: phy: realtek: check validity of 10GbE link-partner advertisement](http://lore.kernel.org/netdev/fb736ae9a0af7616c20c36264aaec8702abc84ae.1728056939.git.daniel@makrotopia.org/)** + +> This prevents misinterpreting the stale 2500M link-partner advertisement +> bit in case a subsequent linkpartner doesn't do any NBase-T +> advertisement at all. + +**[v1: net-next: net: phy: always set polarity_modes if op is supported](http://lore.kernel.org/netdev/473d62f268f2a317fd81d0f38f15d2f2f98e2451.1728056697.git.daniel@makrotopia.org/)** + +> One way to achieve this without introducing an additional 'active-high' +> property would be to always call the led_polarity_set operation if it +> is supported by the phy driver. + +**[v1: net-next: net: skip offload for NETIF_F_IPV6_CSUM if ipv6 header contains extension](http://lore.kernel.org/netdev/0dc0c2af98e96b1df20bd36aeaed4eb4e27d507e.1728056028.git.benoit.monin@gmx.fr/)** + +> This fixes checksumming errors seen with ip6_tunnel and fou6 +> encapsulation, for example with GRE-in-UDP over IPv6: +> * fou6 adds a UDP header with a partial checksum if the inner packet +> does not contains a valid checksum. +> * ip6_tunnel adds an IPv6 header with a destination option extension +> header if encap_limit is non-zero (the default value is 4). + +**[v2: net-next: net: sparx5: prepare for lan969x switch driver](http://lore.kernel.org/netdev/20241004-b4-sparx5-lan969x-switch-driver-v2-0-d3290f581663@microchip.com/)** + +> This series is the first of a multi-part series, that prepares and adds +> support for the new lan969x switch driver. + +**[v4: net: dsa: lan9303: ensure chip reset and wait for READY status](http://lore.kernel.org/netdev/20241004113655.3436296-1-alexander.sverdlin@siemens.com/)** + +> Accessing device registers seems to be not reliable, the chip +> revision is sometimes detected wrongly (0 instead of expected 1). + +**[v1: treewide: Switch to __pm_runtime_put_autosuspend()](http://lore.kernel.org/netdev/20241004094101.113349-1-sakari.ailus@linux.intel.com/)** + +> This set will switch the users of pm_runtime_put_autosuspend() to +> __pm_runtime_put_autosuspend() while the former will soon be re-purposed +> to include a call to pm_runtime_mark_last_busy(). The two are almost +> always used together, apart from bugs which are likely common. Going +> forward, most new users should be using pm_runtime_put_autosuspend(). + +**[v1: iproute2-next: rt_names: read `rt_addrprotos.d` directory](http://lore.kernel.org/netdev/20241004091724.61344-1-equinox@diac24.net/)** + +> My magic 8-ball predicts we might be grabbing a value or two for use in +> FRRouting at some point in the future. Let's make it so we can ship +> those in a separate file when it's time. + +**[v1: net-next: Introduce VLAN support in HSR](http://lore.kernel.org/netdev/20241004074715.791191-1-danishanwar@ti.com/)** + +> This series adds VLAN support to HSR framework. +> This series also adds VLAN support to HSR mode of ICSSG Ethernet driver. + +**[v1: iwl-next: ice: Add in/out PTP pin delays](http://lore.kernel.org/netdev/20241004064733.1362850-2-karol.kolacinski@intel.com/)** + +> HW can have different input/output delays for each of the pins. +> Add a field in ice_ptp_pin_desc structure to reflect that. + +**[v1: net-next: mlxsw: spectrum_acl_flex_keys: Constify struct mlxsw_afk_element_inst](http://lore.kernel.org/netdev/8ccfc7bfb2365dcee5b03c81ebe061a927d6da2e.1727541677.git.christophe.jaillet@wanadoo.fr/)** + +> Constifying these structures moves some data to a read-only section, so +> increases overall security. + +### 安全增强 + +**[v4: block: partition table OF support](http://lore.kernel.org/linux-hardening/20240930113045.28616-1-ansuelsmth@gmail.com/)** + +> Some background on this. Many OEM on embedded device (modem, router...) +> are starting to migrate from NOR/NAND flash to eMMC. + +**[v1: coredump: Do not lock during 'comm' reporting](http://lore.kernel.org/linux-hardening/20240928210830.work.307-kees@kernel.org/)** + +> The 'comm' member will always be NUL terminated, and this is not +> fast-path, so we can just perform a direct memcpy during a coredump +> instead of potentially deadlocking while holding the task struct lock. + +**[v1: hardening: Adjust dependencies in selection of MODVERSIONS](http://lore.kernel.org/linux-hardening/20240928-fix-randstruct-modversions-kconfig-warning-v1-1-27d3edc8571e@kernel.org/)** + +> Add the !COMPILE_TEST dependency to the selections to clear up the +> warning. + +### 异步 IO + +**[v1: liburing: sanitize: add ifdef guard around sanitizer functions](http://lore.kernel.org/io-uring/20241003000209.1159551-1-dw@davidwei.uk/)** + +> Otherwise there are redefinition errors during compilation if +> CONFIG_USE_SANITIZER isn't set. + +**[v1: [PATCHES] xattr stuff and interactions with io_uring](http://lore.kernel.org/io-uring/20241002011011.GB4017910@ZenIV/)** + +> The series below is a small-scale attempt at sanitizing the +> interplay between io_uring and normal syscalls. + +**[v7: FDP and per-io hints](http://lore.kernel.org/io-uring/20240930181305.17286-1-joshi.k@samsung.com/)** + +> Another spin to incorporate the feedback from LPC and previous +> iterations. + +### Rust For Linux + +**[v1: implement `kernel::sync::Refcount` and convert users](http://lore.kernel.org/rust-for-linux/20241004155247.2210469-1-gary@garyguo.net/)** + +> This series consolidate them to have a single `Refcount` which wraps +> `refcount_t` and have it used by both. + +**[v3: rust: optimize error type to use nonzero](http://lore.kernel.org/rust-for-linux/BL0PR02MB491443BD775D5D63635C3F4FE9712@BL0PR02MB4914.namprd02.prod.outlook.com/)** + +> This reduces the space used by the `Result` type, as the `NonZero*` +> type enables the compiler to apply more efficient memory layout. + +**[v2: rust: device: change the from_raw() function](http://lore.kernel.org/rust-for-linux/20241001164355.104918-1-trintaeoitogc@gmail.com/)** + +> The new name of function should be "get_device" to be consistent with +> the function get_device() already exist in .c files. + +**[v1: net-next: add delay abstraction (sleep functions)](http://lore.kernel.org/rust-for-linux/20241001112512.4861-1-fujita.tomonori@gmail.com/)** + +> Add an abstraction for sleep functions in `include/linux/delay.h` for +> dealing with hardware delays. `delay.h` supports sleep and delay (busy +> wait). This adds support for sleep functions used by QT2025 PHY driver +> to sleep until a PHY becomes ready. + +**[v3: rust: device: rename "Device::from_raw()"](http://lore.kernel.org/rust-for-linux/20240930144328.51098-1-trintaeoitogc@gmail.com/)** + +> This function "Device::from_raw()" increments the refcount by this +> command "bindings::get_device(prt)". This can be confused because the +> function Arc::from_raw() from the standard library, doesn't increment +> the refcount. + +### BPF + +**[v4: dwarves: Emit global variables in BTF](http://lore.kernel.org/bpf/20241004172631.629870-1-stephen.s.brennan@oracle.com/)** + +> This is v4 of the series which adds global variables to pahole's generated BTF. + +**[v3: tracing: Allow system call tracepoints to handle page faults](http://lore.kernel.org/bpf/20241004145818.1726671-1-mathieu.desnoyers@efficios.com/)** + +> This series does the initial wire-up allowing tracers to handle page +> faults, but leaves out the actual handling of said page faults as future +> work. + +**[v4: bpf-next: Support eliding map lookup nullness](http://lore.kernel.org/bpf/cover.1727914243.git.dxu@dxuuu.xyz/)** + +> This patch allows progs to elide a null check on statically known map +> lookup keys. In other words, if the verifier can statically prove that +> the lookup will be in-bounds, allow the prog to drop the null check. + +**[v1: net: sfc: Don't invoke xdp_do_flush() from netpoll.](http://lore.kernel.org/bpf/20241002125837.utOcRo6Y@linutronix.de/)** + +> Yury reported a crash in the sfc driver originated from +> netpoll_send_udp(). + +**[v3: HID: HID: bpf: add a new hook to control hid-generic](http://lore.kernel.org/bpf/20241001-hid-bpf-hid-generic-v3-0-2ef1019468df@kernel.org/)** + +> This is a slight change from the fundamentals of HID-BPF. +> In theory, HID-BPF is abstract to the kernel itself, and makes +> only changes at the HID level (through report descriptors or +> events emitted to/from the device). + +**[[PATCH RESEND tip/perf/core] uprobes: switch to RCU Tasks Trace flavor for better performance](http://lore.kernel.org/bpf/20240930212246.1829395-1-andrii@kernel.org/)** + +> This patch switches uprobes SRCU usage to RCU Tasks Trace flavor, which +> is optimized for more lightweight and quick readers (at the expense of +> slower writers, which for uprobes is a fine trade-off) and has better +> performance and scalability with number of CPUs. + +**[v2: PCI: add enabe(disable)_device() hook for bridge](http://lore.kernel.org/bpf/20240930-imx95_lut-v2-0-3b6467ba539a@nxp.com/)** + +> Some system's IOMMU stream(master) ID bits(such as 6bits) less than +> pci_device_id (16bit). It needs add hardware configuration to enable +> pci_device_id to stream ID convert. + +**[v1: resend: tracing: Allow system call tracepoints to handle page faults](http://lore.kernel.org/bpf/20240930192357.1154417-1-mathieu.desnoyers@efficios.com/)** + +> This series does the initial wire-up allowing tracers to handle page +> faults, but leaves out the actual handling of said page faults as future +> work. + +**[答复: v2: Add BPF Kernel Function bpf_ptrace_vprintk](http://lore.kernel.org/bpf/TY0PR02MB5408EE044112DE9640CB06FFF0762@TY0PR02MB5408.apcprd02.prod.outlook.com/)** + +> This patch is mainly considered based on the Android Perfetto (A powerful trace collection and analysis tool, support ftrace data source). + +**[v1: bpf: Prevent infinite loops with bpf_redirect_peer](http://lore.kernel.org/bpf/20240929170219.1881536-1-jrife@google.com/)** + +> It is possible to create cycles using bpf_redirect_peer which lead to an +> an infinite loop inside __netif_receive_skb_core. + +## 周边技术动态 + +### Qemu + +**[v9: riscv: QEMU RISC-V IOMMU Support](http://lore.kernel.org/qemu-devel/20241004155721.2154626-1-dbarboza@ventanamicro.com/)** + +> In this new version we fixed the IOVA == GPA MSI early check in patch 3, +> in riscv_iommu_spa_fetch(), after discussions with Tomasz and Drew on +> v8. + +**[v15: riscv support for control flow integrity extensions](http://lore.kernel.org/qemu-devel/20241003183342.679249-1-debug@rivosinc.com/)** + +> I've rebased again on https://github.com/alistair23/qemu/blob/riscv-to-apply.next +> (tag: pull-riscv-to-apply-20241002) + +**[v3: riscv-to-apply queue](http://lore.kernel.org/qemu-devel/20241002055048.556083-1-alistair.francis@wdc.com/)** + +**[v1: target/riscv: Set vtype.vill on CPU reset](http://lore.kernel.org/qemu-devel/20240930165258.72258-1-rbradford@rivosinc.com/)** + +> This change now makes QEMU consistent with Spike which sets vtype.vill +> on reset. + +**[v1: hw/riscv/spike: Replace tswap64() by ldq_endian_p()](http://lore.kernel.org/qemu-devel/20240930124831.54232-1-philmd@linaro.org/)** + +> Hold the target endianness in HTIFState::target_is_bigendian. +> Pass the target endianness as argument to htif_mm_init(). +> Replace tswap64() calls by ldq_endian_p() ones. + +### Buildroot + +**[arch/arm: add support for FDPIC](http://lore.kernel.org/buildroot/20241002203511.8E66A84701@busybox.osuosl.org/)** + +> Linux on ARM supports FDPIC binaries intended for use on no-MMU +> systems. This patch enables support for building a toolchain that +> produces FDPIC binaries, only for ARMv7-M platforms, for which FDPIC +> binaries are relevant. + +### U-Boot + +**[v1: Support OF_UPSTREAM for StarFive JH7110](http://lore.kernel.org/u-boot/20240930155919.111738-1-hal.feng@starfivetech.com/)** + +> This patchset add OF_STREAM support for StarFive JH7110 based boards. +> All the JH7110 based boards can use the DT from upstreaming linux kernel. +> The v1.3b board device tree is set as the default device tree. + +