Week7.md

Week 7: Getting into the real world

• Clock domain crossing

• Common digital design patterns

• Running through a complete design flow

  • Directory Structure
  • Simulation
  • Synthesis
  • Place and Route/Bitgen
  • Testing

• IDE's

  • Emacs: verilog mode
  • Sublime
  • Visual Studio

• Using IP blocks in your design

  • Introduction to FuseSOC
    • Initialize with fusesoc library add fusesoc_cores https://github.com/fusesoc/fusesoc-cores
    • Add a processor, SPI and I2C core to a design
    • Simulations
    • Implementation
  • LiteX
    • Example of LiteX with the UPduino

Material

• Module 7 Slide Deck

• Shawn Hymel Video

• EE Times article on Clock Domain Crossing

• FuseSoC

• Further Reading:

Challenge:

Advanced Challenges/Thought experiments: