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reload1.c
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/* Reload pseudo regs into hard regs for insns that require hard regs.
Copyright (C) 1987-2020 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "target.h"
#include "rtl.h"
#include "tree.h"
#include "predict.h"
#include "df.h"
#include "memmodel.h"
#include "tm_p.h"
#include "optabs.h"
#include "regs.h"
#include "ira.h"
#include "recog.h"
#include "rtl-error.h"
#include "expr.h"
#include "addresses.h"
#include "cfgrtl.h"
#include "cfgbuild.h"
#include "reload.h"
#include "except.h"
#include "dumpfile.h"
#include "rtl-iter.h"
#include "function-abi.h"
/* This file contains the reload pass of the compiler, which is
run after register allocation has been done. It checks that
each insn is valid (operands required to be in registers really
are in registers of the proper class) and fixes up invalid ones
by copying values temporarily into registers for the insns
that need them.
The results of register allocation are described by the vector
reg_renumber; the insns still contain pseudo regs, but reg_renumber
can be used to find which hard reg, if any, a pseudo reg is in.
The technique we always use is to free up a few hard regs that are
called ``reload regs'', and for each place where a pseudo reg
must be in a hard reg, copy it temporarily into one of the reload regs.
Reload regs are allocated locally for every instruction that needs
reloads. When there are pseudos which are allocated to a register that
has been chosen as a reload reg, such pseudos must be ``spilled''.
This means that they go to other hard regs, or to stack slots if no other
available hard regs can be found. Spilling can invalidate more
insns, requiring additional need for reloads, so we must keep checking
until the process stabilizes.
For machines with different classes of registers, we must keep track
of the register class needed for each reload, and make sure that
we allocate enough reload registers of each class.
The file reload.c contains the code that checks one insn for
validity and reports the reloads that it needs. This file
is in charge of scanning the entire rtl code, accumulating the
reload needs, spilling, assigning reload registers to use for
fixing up each insn, and generating the new insns to copy values
into the reload registers. */
struct target_reload default_target_reload;
#if SWITCHABLE_TARGET
struct target_reload *this_target_reload = &default_target_reload;
#endif
#define spill_indirect_levels \
(this_target_reload->x_spill_indirect_levels)
/* During reload_as_needed, element N contains a REG rtx for the hard reg
into which reg N has been reloaded (perhaps for a previous insn). */
static rtx *reg_last_reload_reg;
/* Elt N nonzero if reg_last_reload_reg[N] has been set in this insn
for an output reload that stores into reg N. */
static regset_head reg_has_output_reload;
/* Indicates which hard regs are reload-registers for an output reload
in the current insn. */
static HARD_REG_SET reg_is_output_reload;
/* Widest mode in which each pseudo reg is referred to (via subreg). */
static machine_mode *reg_max_ref_mode;
/* Vector to remember old contents of reg_renumber before spilling. */
static short *reg_old_renumber;
/* During reload_as_needed, element N contains the last pseudo regno reloaded
into hard register N. If that pseudo reg occupied more than one register,
reg_reloaded_contents points to that pseudo for each spill register in
use; all of these must remain set for an inheritance to occur. */
static int reg_reloaded_contents[FIRST_PSEUDO_REGISTER];
/* During reload_as_needed, element N contains the insn for which
hard register N was last used. Its contents are significant only
when reg_reloaded_valid is set for this register. */
static rtx_insn *reg_reloaded_insn[FIRST_PSEUDO_REGISTER];
/* Indicate if reg_reloaded_insn / reg_reloaded_contents is valid. */
static HARD_REG_SET reg_reloaded_valid;
/* Indicate if the register was dead at the end of the reload.
This is only valid if reg_reloaded_contents is set and valid. */
static HARD_REG_SET reg_reloaded_dead;
/* Number of spill-regs so far; number of valid elements of spill_regs. */
static int n_spills;
/* In parallel with spill_regs, contains REG rtx's for those regs.
Holds the last rtx used for any given reg, or 0 if it has never
been used for spilling yet. This rtx is reused, provided it has
the proper mode. */
static rtx spill_reg_rtx[FIRST_PSEUDO_REGISTER];
/* In parallel with spill_regs, contains nonzero for a spill reg
that was stored after the last time it was used.
The precise value is the insn generated to do the store. */
static rtx_insn *spill_reg_store[FIRST_PSEUDO_REGISTER];
/* This is the register that was stored with spill_reg_store. This is a
copy of reload_out / reload_out_reg when the value was stored; if
reload_out is a MEM, spill_reg_stored_to will be set to reload_out_reg. */
static rtx spill_reg_stored_to[FIRST_PSEUDO_REGISTER];
/* This table is the inverse mapping of spill_regs:
indexed by hard reg number,
it contains the position of that reg in spill_regs,
or -1 for something that is not in spill_regs.
?!? This is no longer accurate. */
static short spill_reg_order[FIRST_PSEUDO_REGISTER];
/* This reg set indicates registers that can't be used as spill registers for
the currently processed insn. These are the hard registers which are live
during the insn, but not allocated to pseudos, as well as fixed
registers. */
static HARD_REG_SET bad_spill_regs;
/* These are the hard registers that can't be used as spill register for any
insn. This includes registers used for user variables and registers that
we can't eliminate. A register that appears in this set also can't be used
to retry register allocation. */
static HARD_REG_SET bad_spill_regs_global;
/* Describes order of use of registers for reloading
of spilled pseudo-registers. `n_spills' is the number of
elements that are actually valid; new ones are added at the end.
Both spill_regs and spill_reg_order are used on two occasions:
once during find_reload_regs, where they keep track of the spill registers
for a single insn, but also during reload_as_needed where they show all
the registers ever used by reload. For the latter case, the information
is calculated during finish_spills. */
static short spill_regs[FIRST_PSEUDO_REGISTER];
/* This vector of reg sets indicates, for each pseudo, which hard registers
may not be used for retrying global allocation because the register was
formerly spilled from one of them. If we allowed reallocating a pseudo to
a register that it was already allocated to, reload might not
terminate. */
static HARD_REG_SET *pseudo_previous_regs;
/* This vector of reg sets indicates, for each pseudo, which hard
registers may not be used for retrying global allocation because they
are used as spill registers during one of the insns in which the
pseudo is live. */
static HARD_REG_SET *pseudo_forbidden_regs;
/* All hard regs that have been used as spill registers for any insn are
marked in this set. */
static HARD_REG_SET used_spill_regs;
/* Index of last register assigned as a spill register. We allocate in
a round-robin fashion. */
static int last_spill_reg;
/* Record the stack slot for each spilled hard register. */
static rtx spill_stack_slot[FIRST_PSEUDO_REGISTER];
/* Width allocated so far for that stack slot. */
static poly_uint64_pod spill_stack_slot_width[FIRST_PSEUDO_REGISTER];
/* Record which pseudos needed to be spilled. */
static regset_head spilled_pseudos;
/* Record which pseudos changed their allocation in finish_spills. */
static regset_head changed_allocation_pseudos;
/* Used for communication between order_regs_for_reload and count_pseudo.
Used to avoid counting one pseudo twice. */
static regset_head pseudos_counted;
/* First uid used by insns created by reload in this function.
Used in find_equiv_reg. */
int reload_first_uid;
/* Flag set by local-alloc or global-alloc if anything is live in
a call-clobbered reg across calls. */
int caller_save_needed;
/* Set to 1 while reload_as_needed is operating.
Required by some machines to handle any generated moves differently. */
int reload_in_progress = 0;
/* This obstack is used for allocation of rtl during register elimination.
The allocated storage can be freed once find_reloads has processed the
insn. */
static struct obstack reload_obstack;
/* Points to the beginning of the reload_obstack. All insn_chain structures
are allocated first. */
static char *reload_startobj;
/* The point after all insn_chain structures. Used to quickly deallocate
memory allocated in copy_reloads during calculate_needs_all_insns. */
static char *reload_firstobj;
/* This points before all local rtl generated by register elimination.
Used to quickly free all memory after processing one insn. */
static char *reload_insn_firstobj;
/* List of insn_chain instructions, one for every insn that reload needs to
examine. */
class insn_chain *reload_insn_chain;
/* TRUE if we potentially left dead insns in the insn stream and want to
run DCE immediately after reload, FALSE otherwise. */
static bool need_dce;
/* List of all insns needing reloads. */
static class insn_chain *insns_need_reload;
/* This structure is used to record information about register eliminations.
Each array entry describes one possible way of eliminating a register
in favor of another. If there is more than one way of eliminating a
particular register, the most preferred should be specified first. */
struct elim_table
{
int from; /* Register number to be eliminated. */
int to; /* Register number used as replacement. */
poly_int64_pod initial_offset; /* Initial difference between values. */
int can_eliminate; /* Nonzero if this elimination can be done. */
int can_eliminate_previous; /* Value returned by TARGET_CAN_ELIMINATE
target hook in previous scan over insns
made by reload. */
poly_int64_pod offset; /* Current offset between the two regs. */
poly_int64_pod previous_offset; /* Offset at end of previous insn. */
int ref_outside_mem; /* "to" has been referenced outside a MEM. */
rtx from_rtx; /* REG rtx for the register to be eliminated.
We cannot simply compare the number since
we might then spuriously replace a hard
register corresponding to a pseudo
assigned to the reg to be eliminated. */
rtx to_rtx; /* REG rtx for the replacement. */
};
static struct elim_table *reg_eliminate = 0;
/* This is an intermediate structure to initialize the table. It has
exactly the members provided by ELIMINABLE_REGS. */
static const struct elim_table_1
{
const int from;
const int to;
} reg_eliminate_1[] =
ELIMINABLE_REGS;
#define NUM_ELIMINABLE_REGS ARRAY_SIZE (reg_eliminate_1)
/* Record the number of pending eliminations that have an offset not equal
to their initial offset. If nonzero, we use a new copy of each
replacement result in any insns encountered. */
int num_not_at_initial_offset;
/* Count the number of registers that we may be able to eliminate. */
static int num_eliminable;
/* And the number of registers that are equivalent to a constant that
can be eliminated to frame_pointer / arg_pointer + constant. */
static int num_eliminable_invariants;
/* For each label, we record the offset of each elimination. If we reach
a label by more than one path and an offset differs, we cannot do the
elimination. This information is indexed by the difference of the
number of the label and the first label number. We can't offset the
pointer itself as this can cause problems on machines with segmented
memory. The first table is an array of flags that records whether we
have yet encountered a label and the second table is an array of arrays,
one entry in the latter array for each elimination. */
static int first_label_num;
static char *offsets_known_at;
static poly_int64_pod (*offsets_at)[NUM_ELIMINABLE_REGS];
vec<reg_equivs_t, va_gc> *reg_equivs;
/* Stack of addresses where an rtx has been changed. We can undo the
changes by popping items off the stack and restoring the original
value at each location.
We use this simplistic undo capability rather than copy_rtx as copy_rtx
will not make a deep copy of a normally sharable rtx, such as
(const (plus (symbol_ref) (const_int))). If such an expression appears
as R1 in gen_reload_chain_without_interm_reg_p, then a shared
rtx expression would be changed. See PR 42431. */
typedef rtx *rtx_p;
static vec<rtx_p> substitute_stack;
/* Number of labels in the current function. */
static int num_labels;
static void replace_pseudos_in (rtx *, machine_mode, rtx);
static void maybe_fix_stack_asms (void);
static void copy_reloads (class insn_chain *);
static void calculate_needs_all_insns (int);
static int find_reg (class insn_chain *, int);
static void find_reload_regs (class insn_chain *);
static void select_reload_regs (void);
static void delete_caller_save_insns (void);
static void spill_failure (rtx_insn *, enum reg_class);
static void count_spilled_pseudo (int, int, int);
static void delete_dead_insn (rtx_insn *);
static void alter_reg (int, int, bool);
static void set_label_offsets (rtx, rtx_insn *, int);
static void check_eliminable_occurrences (rtx);
static void elimination_effects (rtx, machine_mode);
static rtx eliminate_regs_1 (rtx, machine_mode, rtx, bool, bool);
static int eliminate_regs_in_insn (rtx_insn *, int);
static void update_eliminable_offsets (void);
static void mark_not_eliminable (rtx, const_rtx, void *);
static void set_initial_elim_offsets (void);
static bool verify_initial_elim_offsets (void);
static void set_initial_label_offsets (void);
static void set_offsets_for_label (rtx_insn *);
static void init_eliminable_invariants (rtx_insn *, bool);
static void init_elim_table (void);
static void free_reg_equiv (void);
static void update_eliminables (HARD_REG_SET *);
static bool update_eliminables_and_spill (void);
static void elimination_costs_in_insn (rtx_insn *);
static void spill_hard_reg (unsigned int, int);
static int finish_spills (int);
static void scan_paradoxical_subregs (rtx);
static void count_pseudo (int);
static void order_regs_for_reload (class insn_chain *);
static void reload_as_needed (int);
static void forget_old_reloads_1 (rtx, const_rtx, void *);
static void forget_marked_reloads (regset);
static int reload_reg_class_lower (const void *, const void *);
static void mark_reload_reg_in_use (unsigned int, int, enum reload_type,
machine_mode);
static void clear_reload_reg_in_use (unsigned int, int, enum reload_type,
machine_mode);
static int reload_reg_free_p (unsigned int, int, enum reload_type);
static int reload_reg_free_for_value_p (int, int, int, enum reload_type,
rtx, rtx, int, int);
static int free_for_value_p (int, machine_mode, int, enum reload_type,
rtx, rtx, int, int);
static int allocate_reload_reg (class insn_chain *, int, int);
static int conflicts_with_override (rtx);
static void failed_reload (rtx_insn *, int);
static int set_reload_reg (int, int);
static void choose_reload_regs_init (class insn_chain *, rtx *);
static void choose_reload_regs (class insn_chain *);
static void emit_input_reload_insns (class insn_chain *, struct reload *,
rtx, int);
static void emit_output_reload_insns (class insn_chain *, struct reload *,
int);
static void do_input_reload (class insn_chain *, struct reload *, int);
static void do_output_reload (class insn_chain *, struct reload *, int);
static void emit_reload_insns (class insn_chain *);
static void delete_output_reload (rtx_insn *, int, int, rtx);
static void delete_address_reloads (rtx_insn *, rtx_insn *);
static void delete_address_reloads_1 (rtx_insn *, rtx, rtx_insn *);
static void inc_for_reload (rtx, rtx, rtx, poly_int64);
static void add_auto_inc_notes (rtx_insn *, rtx);
static void substitute (rtx *, const_rtx, rtx);
static bool gen_reload_chain_without_interm_reg_p (int, int);
static int reloads_conflict (int, int);
static rtx_insn *gen_reload (rtx, rtx, int, enum reload_type);
static rtx_insn *emit_insn_if_valid_for_reload (rtx);
/* Initialize the reload pass. This is called at the beginning of compilation
and may be called again if the target is reinitialized. */
void
init_reload (void)
{
int i;
/* Often (MEM (REG n)) is still valid even if (REG n) is put on the stack.
Set spill_indirect_levels to the number of levels such addressing is
permitted, zero if it is not permitted at all. */
rtx tem
= gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode,
LAST_VIRTUAL_REGISTER + 1),
gen_int_mode (4, Pmode)));
spill_indirect_levels = 0;
while (memory_address_p (QImode, tem))
{
spill_indirect_levels++;
tem = gen_rtx_MEM (Pmode, tem);
}
/* See if indirect addressing is valid for (MEM (SYMBOL_REF ...)). */
tem = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (Pmode, "foo"));
indirect_symref_ok = memory_address_p (QImode, tem);
/* See if reg+reg is a valid (and offsettable) address. */
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
{
tem = gen_rtx_PLUS (Pmode,
gen_rtx_REG (Pmode, HARD_FRAME_POINTER_REGNUM),
gen_rtx_REG (Pmode, i));
/* This way, we make sure that reg+reg is an offsettable address. */
tem = plus_constant (Pmode, tem, 4);
for (int mode = 0; mode < MAX_MACHINE_MODE; mode++)
if (!double_reg_address_ok[mode]
&& memory_address_p ((enum machine_mode)mode, tem))
double_reg_address_ok[mode] = 1;
}
/* Initialize obstack for our rtl allocation. */
if (reload_startobj == NULL)
{
gcc_obstack_init (&reload_obstack);
reload_startobj = XOBNEWVAR (&reload_obstack, char, 0);
}
INIT_REG_SET (&spilled_pseudos);
INIT_REG_SET (&changed_allocation_pseudos);
INIT_REG_SET (&pseudos_counted);
}
/* List of insn chains that are currently unused. */
static class insn_chain *unused_insn_chains = 0;
/* Allocate an empty insn_chain structure. */
class insn_chain *
new_insn_chain (void)
{
class insn_chain *c;
if (unused_insn_chains == 0)
{
c = XOBNEW (&reload_obstack, class insn_chain);
INIT_REG_SET (&c->live_throughout);
INIT_REG_SET (&c->dead_or_set);
}
else
{
c = unused_insn_chains;
unused_insn_chains = c->next;
}
c->is_caller_save_insn = 0;
c->need_operand_change = 0;
c->need_reload = 0;
c->need_elim = 0;
return c;
}
/* Small utility function to set all regs in hard reg set TO which are
allocated to pseudos in regset FROM. */
void
compute_use_by_pseudos (HARD_REG_SET *to, regset from)
{
unsigned int regno;
reg_set_iterator rsi;
EXECUTE_IF_SET_IN_REG_SET (from, FIRST_PSEUDO_REGISTER, regno, rsi)
{
int r = reg_renumber[regno];
if (r < 0)
{
/* reload_combine uses the information from DF_LIVE_IN,
which might still contain registers that have not
actually been allocated since they have an
equivalence. */
gcc_assert (ira_conflicts_p || reload_completed);
}
else
add_to_hard_reg_set (to, PSEUDO_REGNO_MODE (regno), r);
}
}
/* Replace all pseudos found in LOC with their corresponding
equivalences. */
static void
replace_pseudos_in (rtx *loc, machine_mode mem_mode, rtx usage)
{
rtx x = *loc;
enum rtx_code code;
const char *fmt;
int i, j;
if (! x)
return;
code = GET_CODE (x);
if (code == REG)
{
unsigned int regno = REGNO (x);
if (regno < FIRST_PSEUDO_REGISTER)
return;
x = eliminate_regs_1 (x, mem_mode, usage, true, false);
if (x != *loc)
{
*loc = x;
replace_pseudos_in (loc, mem_mode, usage);
return;
}
if (reg_equiv_constant (regno))
*loc = reg_equiv_constant (regno);
else if (reg_equiv_invariant (regno))
*loc = reg_equiv_invariant (regno);
else if (reg_equiv_mem (regno))
*loc = reg_equiv_mem (regno);
else if (reg_equiv_address (regno))
*loc = gen_rtx_MEM (GET_MODE (x), reg_equiv_address (regno));
else
{
gcc_assert (!REG_P (regno_reg_rtx[regno])
|| REGNO (regno_reg_rtx[regno]) != regno);
*loc = regno_reg_rtx[regno];
}
return;
}
else if (code == MEM)
{
replace_pseudos_in (& XEXP (x, 0), GET_MODE (x), usage);
return;
}
/* Process each of our operands recursively. */
fmt = GET_RTX_FORMAT (code);
for (i = 0; i < GET_RTX_LENGTH (code); i++, fmt++)
if (*fmt == 'e')
replace_pseudos_in (&XEXP (x, i), mem_mode, usage);
else if (*fmt == 'E')
for (j = 0; j < XVECLEN (x, i); j++)
replace_pseudos_in (& XVECEXP (x, i, j), mem_mode, usage);
}
/* Determine if the current function has an exception receiver block
that reaches the exit block via non-exceptional edges */
static bool
has_nonexceptional_receiver (void)
{
edge e;
edge_iterator ei;
basic_block *tos, *worklist, bb;
/* If we're not optimizing, then just err on the safe side. */
if (!optimize)
return true;
/* First determine which blocks can reach exit via normal paths. */
tos = worklist = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun) + 1);
FOR_EACH_BB_FN (bb, cfun)
bb->flags &= ~BB_REACHABLE;
/* Place the exit block on our worklist. */
EXIT_BLOCK_PTR_FOR_FN (cfun)->flags |= BB_REACHABLE;
*tos++ = EXIT_BLOCK_PTR_FOR_FN (cfun);
/* Iterate: find everything reachable from what we've already seen. */
while (tos != worklist)
{
bb = *--tos;
FOR_EACH_EDGE (e, ei, bb->preds)
if (!(e->flags & EDGE_ABNORMAL))
{
basic_block src = e->src;
if (!(src->flags & BB_REACHABLE))
{
src->flags |= BB_REACHABLE;
*tos++ = src;
}
}
}
free (worklist);
/* Now see if there's a reachable block with an exceptional incoming
edge. */
FOR_EACH_BB_FN (bb, cfun)
if (bb->flags & BB_REACHABLE && bb_has_abnormal_pred (bb))
return true;
/* No exceptional block reached exit unexceptionally. */
return false;
}
/* Grow (or allocate) the REG_EQUIVS array from its current size (which may be
zero elements) to MAX_REG_NUM elements.
Initialize all new fields to NULL and update REG_EQUIVS_SIZE. */
void
grow_reg_equivs (void)
{
int old_size = vec_safe_length (reg_equivs);
int max_regno = max_reg_num ();
int i;
reg_equivs_t ze;
memset (&ze, 0, sizeof (reg_equivs_t));
vec_safe_reserve (reg_equivs, max_regno);
for (i = old_size; i < max_regno; i++)
reg_equivs->quick_insert (i, ze);
}
/* Global variables used by reload and its subroutines. */
/* The current basic block while in calculate_elim_costs_all_insns. */
static basic_block elim_bb;
/* Set during calculate_needs if an insn needs register elimination. */
static int something_needs_elimination;
/* Set during calculate_needs if an insn needs an operand changed. */
static int something_needs_operands_changed;
/* Set by alter_regs if we spilled a register to the stack. */
static bool something_was_spilled;
/* Nonzero means we couldn't get enough spill regs. */
static int failure;
/* Temporary array of pseudo-register number. */
static int *temp_pseudo_reg_arr;
/* If a pseudo has no hard reg, delete the insns that made the equivalence.
If that insn didn't set the register (i.e., it copied the register to
memory), just delete that insn instead of the equivalencing insn plus
anything now dead. If we call delete_dead_insn on that insn, we may
delete the insn that actually sets the register if the register dies
there and that is incorrect. */
static void
remove_init_insns ()
{
for (int i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
{
if (reg_renumber[i] < 0 && reg_equiv_init (i) != 0)
{
rtx list;
for (list = reg_equiv_init (i); list; list = XEXP (list, 1))
{
rtx_insn *equiv_insn = as_a <rtx_insn *> (XEXP (list, 0));
/* If we already deleted the insn or if it may trap, we can't
delete it. The latter case shouldn't happen, but can
if an insn has a variable address, gets a REG_EH_REGION
note added to it, and then gets converted into a load
from a constant address. */
if (NOTE_P (equiv_insn)
|| can_throw_internal (equiv_insn))
;
else if (reg_set_p (regno_reg_rtx[i], PATTERN (equiv_insn)))
delete_dead_insn (equiv_insn);
else
SET_INSN_DELETED (equiv_insn);
}
}
}
}
/* Return true if remove_init_insns will delete INSN. */
static bool
will_delete_init_insn_p (rtx_insn *insn)
{
rtx set = single_set (insn);
if (!set || !REG_P (SET_DEST (set)))
return false;
unsigned regno = REGNO (SET_DEST (set));
if (can_throw_internal (insn))
return false;
if (regno < FIRST_PSEUDO_REGISTER || reg_renumber[regno] >= 0)
return false;
for (rtx list = reg_equiv_init (regno); list; list = XEXP (list, 1))
{
rtx equiv_insn = XEXP (list, 0);
if (equiv_insn == insn)
return true;
}
return false;
}
/* Main entry point for the reload pass.
FIRST is the first insn of the function being compiled.
GLOBAL nonzero means we were called from global_alloc
and should attempt to reallocate any pseudoregs that we
displace from hard regs we will use for reloads.
If GLOBAL is zero, we do not have enough information to do that,
so any pseudo reg that is spilled must go to the stack.
Return value is TRUE if reload likely left dead insns in the
stream and a DCE pass should be run to elimiante them. Else the
return value is FALSE. */
bool
reload (rtx_insn *first, int global)
{
int i, n;
rtx_insn *insn;
struct elim_table *ep;
basic_block bb;
bool inserted;
/* Make sure even insns with volatile mem refs are recognizable. */
init_recog ();
failure = 0;
reload_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
/* Make sure that the last insn in the chain
is not something that needs reloading. */
emit_note (NOTE_INSN_DELETED);
/* Enable find_equiv_reg to distinguish insns made by reload. */
reload_first_uid = get_max_uid ();
/* Initialize the secondary memory table. */
clear_secondary_mem ();
/* We don't have a stack slot for any spill reg yet. */
memset (spill_stack_slot, 0, sizeof spill_stack_slot);
memset (spill_stack_slot_width, 0, sizeof spill_stack_slot_width);
/* Initialize the save area information for caller-save, in case some
are needed. */
init_save_areas ();
/* Compute which hard registers are now in use
as homes for pseudo registers.
This is done here rather than (eg) in global_alloc
because this point is reached even if not optimizing. */
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
mark_home_live (i);
/* A function that has a nonlocal label that can reach the exit
block via non-exceptional paths must save all call-saved
registers. */
if (cfun->has_nonlocal_label
&& has_nonexceptional_receiver ())
crtl->saves_all_registers = 1;
if (crtl->saves_all_registers)
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if (! crtl->abi->clobbers_full_reg_p (i)
&& ! fixed_regs[i]
&& ! LOCAL_REGNO (i))
df_set_regs_ever_live (i, true);
/* Find all the pseudo registers that didn't get hard regs
but do have known equivalent constants or memory slots.
These include parameters (known equivalent to parameter slots)
and cse'd or loop-moved constant memory addresses.
Record constant equivalents in reg_equiv_constant
so they will be substituted by find_reloads.
Record memory equivalents in reg_mem_equiv so they can
be substituted eventually by altering the REG-rtx's. */
grow_reg_equivs ();
reg_old_renumber = XCNEWVEC (short, max_regno);
memcpy (reg_old_renumber, reg_renumber, max_regno * sizeof (short));
pseudo_forbidden_regs = XNEWVEC (HARD_REG_SET, max_regno);
pseudo_previous_regs = XCNEWVEC (HARD_REG_SET, max_regno);
CLEAR_HARD_REG_SET (bad_spill_regs_global);
init_eliminable_invariants (first, true);
init_elim_table ();
/* Alter each pseudo-reg rtx to contain its hard reg number. Assign
stack slots to the pseudos that lack hard regs or equivalents.
Do not touch virtual registers. */
temp_pseudo_reg_arr = XNEWVEC (int, max_regno - LAST_VIRTUAL_REGISTER - 1);
for (n = 0, i = LAST_VIRTUAL_REGISTER + 1; i < max_regno; i++)
temp_pseudo_reg_arr[n++] = i;
if (ira_conflicts_p)
/* Ask IRA to order pseudo-registers for better stack slot
sharing. */
ira_sort_regnos_for_alter_reg (temp_pseudo_reg_arr, n, reg_max_ref_mode);
for (i = 0; i < n; i++)
alter_reg (temp_pseudo_reg_arr[i], -1, false);
/* If we have some registers we think can be eliminated, scan all insns to
see if there is an insn that sets one of these registers to something
other than itself plus a constant. If so, the register cannot be
eliminated. Doing this scan here eliminates an extra pass through the
main reload loop in the most common case where register elimination
cannot be done. */
for (insn = first; insn && num_eliminable; insn = NEXT_INSN (insn))
if (INSN_P (insn))
note_pattern_stores (PATTERN (insn), mark_not_eliminable, NULL);
maybe_fix_stack_asms ();
insns_need_reload = 0;
something_needs_elimination = 0;
/* Initialize to -1, which means take the first spill register. */
last_spill_reg = -1;
/* Spill any hard regs that we know we can't eliminate. */
CLEAR_HARD_REG_SET (used_spill_regs);
/* There can be multiple ways to eliminate a register;
they should be listed adjacently.
Elimination for any register fails only if all possible ways fail. */
for (ep = reg_eliminate; ep < ®_eliminate[NUM_ELIMINABLE_REGS]; )
{
int from = ep->from;
int can_eliminate = 0;
do
{
can_eliminate |= ep->can_eliminate;
ep++;
}
while (ep < ®_eliminate[NUM_ELIMINABLE_REGS] && ep->from == from);
if (! can_eliminate)
spill_hard_reg (from, 1);
}
if (!HARD_FRAME_POINTER_IS_FRAME_POINTER && frame_pointer_needed)
spill_hard_reg (HARD_FRAME_POINTER_REGNUM, 1);
finish_spills (global);
/* From now on, we may need to generate moves differently. We may also
allow modifications of insns which cause them to not be recognized.
Any such modifications will be cleaned up during reload itself. */
reload_in_progress = 1;
/* This loop scans the entire function each go-round
and repeats until one repetition spills no additional hard regs. */
for (;;)
{
int something_changed;
poly_int64 starting_frame_size;
starting_frame_size = get_frame_size ();
something_was_spilled = false;
set_initial_elim_offsets ();
set_initial_label_offsets ();
/* For each pseudo register that has an equivalent location defined,
try to eliminate any eliminable registers (such as the frame pointer)
assuming initial offsets for the replacement register, which
is the normal case.
If the resulting location is directly addressable, substitute
the MEM we just got directly for the old REG.
If it is not addressable but is a constant or the sum of a hard reg
and constant, it is probably not addressable because the constant is
out of range, in that case record the address; we will generate
hairy code to compute the address in a register each time it is
needed. Similarly if it is a hard register, but one that is not
valid as an address register.
If the location is not addressable, but does not have one of the
above forms, assign a stack slot. We have to do this to avoid the
potential of producing lots of reloads if, e.g., a location involves
a pseudo that didn't get a hard register and has an equivalent memory
location that also involves a pseudo that didn't get a hard register.
Perhaps at some point we will improve reload_when_needed handling
so this problem goes away. But that's very hairy. */
for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
if (reg_renumber[i] < 0 && reg_equiv_memory_loc (i))
{
rtx x = eliminate_regs (reg_equiv_memory_loc (i), VOIDmode,
NULL_RTX);
if (strict_memory_address_addr_space_p
(GET_MODE (regno_reg_rtx[i]), XEXP (x, 0),
MEM_ADDR_SPACE (x)))
reg_equiv_mem (i) = x, reg_equiv_address (i) = 0;
else if (CONSTANT_P (XEXP (x, 0))
|| (REG_P (XEXP (x, 0))
&& REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
|| (GET_CODE (XEXP (x, 0)) == PLUS
&& REG_P (XEXP (XEXP (x, 0), 0))
&& (REGNO (XEXP (XEXP (x, 0), 0))
< FIRST_PSEUDO_REGISTER)
&& CONSTANT_P (XEXP (XEXP (x, 0), 1))))
reg_equiv_address (i) = XEXP (x, 0), reg_equiv_mem (i) = 0;
else
{
/* Make a new stack slot. Then indicate that something
changed so we go back and recompute offsets for
eliminable registers because the allocation of memory
below might change some offset. reg_equiv_{mem,address}
will be set up for this pseudo on the next pass around
the loop. */
reg_equiv_memory_loc (i) = 0;
reg_equiv_init (i) = 0;
alter_reg (i, -1, true);
}
}
if (caller_save_needed)
setup_save_areas ();
if (maybe_ne (starting_frame_size, 0) && crtl->stack_alignment_needed)
{
/* If we have a stack frame, we must align it now. The
stack size may be a part of the offset computation for
register elimination. So if this changes the stack size,
then repeat the elimination bookkeeping. We don't
realign when there is no stack, as that will cause a
stack frame when none is needed should
TARGET_STARTING_FRAME_OFFSET not be already aligned to
STACK_BOUNDARY. */
assign_stack_local (BLKmode, 0, crtl->stack_alignment_needed);
}
/* If we allocated another stack slot, redo elimination bookkeeping. */
if (something_was_spilled
|| maybe_ne (starting_frame_size, get_frame_size ()))
{
if (update_eliminables_and_spill ())
finish_spills (0);
continue;
}
if (caller_save_needed)
{
save_call_clobbered_regs ();
/* That might have allocated new insn_chain structures. */
reload_firstobj = XOBNEWVAR (&reload_obstack, char, 0);
}
calculate_needs_all_insns (global);
if (! ira_conflicts_p)
/* Don't do it for IRA. We need this info because we don't
change live_throughout and dead_or_set for chains when IRA
is used. */
CLEAR_REG_SET (&spilled_pseudos);
something_changed = 0;
/* If we allocated any new memory locations, make another pass
since it might have changed elimination offsets. */
if (something_was_spilled
|| maybe_ne (starting_frame_size, get_frame_size ()))
something_changed = 1;
/* Even if the frame size remained the same, we might still have