From 447d06bf97d66c3dccef3e7c6de08d27849a75e4 Mon Sep 17 00:00:00 2001
From: qcorradi <q.corradi22@imperial.ac.uk>
Date: Mon, 27 May 2024 18:06:30 +0100
Subject: [PATCH] Removed unused stub

---
 src/Verismith/Verilog2005.hs          |  2 --
 src/Verismith/Verilog2005/Mutation.hs | 52 ---------------------------
 verismith.cabal                       |  1 -
 3 files changed, 55 deletions(-)
 delete mode 100644 src/Verismith/Verilog2005/Mutation.hs

diff --git a/src/Verismith/Verilog2005.hs b/src/Verismith/Verilog2005.hs
index 86eeef3..f454f69 100644
--- a/src/Verismith/Verilog2005.hs
+++ b/src/Verismith/Verilog2005.hs
@@ -13,13 +13,11 @@ module Verismith.Verilog2005
     NumberProbability,
     CategoricalProbability,
     Verilog2005 (..),
-    renameTopItems,
   )
 where
 
 import Verismith.Config (CategoricalProbability (..), NumberProbability (..))
 import Verismith.Verilog2005.AST
 import Verismith.Verilog2005.Generator
-import Verismith.Verilog2005.Mutation
 import Verismith.Verilog2005.Parser
 import Verismith.Verilog2005.PrettyPrinter
diff --git a/src/Verismith/Verilog2005/Mutation.hs b/src/Verismith/Verilog2005/Mutation.hs
deleted file mode 100644
index cc0028b..0000000
--- a/src/Verismith/Verilog2005/Mutation.hs
+++ /dev/null
@@ -1,52 +0,0 @@
--- Module      : Verismith.Verilog2005.Mutation
--- Description : Mutating a Verilog AST.
--- Copyright   : (c) 2023-2024 Quentin Corradi
--- License     : GPL-3
--- Maintainer  : q [dot] corradi22 [at] imperial [dot] ac [dot] uk
--- Stability   : experimental
--- Portability : POSIX
-
-module Verismith.Verilog2005.Mutation
-  ( renameTopItems,
-  )
-where
-
-import Control.Lens
-import Data.ByteString (ByteString)
-import Data.Data.Lens
-import qualified Data.HashMap.Strict as HashMap
-import Data.List.NonEmpty (NonEmpty (..))
-import Verismith.Verilog2005.AST
-import Verismith.Verilog2005.Utils
-
--- | Rename all top-level scopes and everything depending on their name
-renameTopItems :: (ByteString -> ByteString) -> Verilog2005 -> Verilog2005
-renameTopItems fb (Verilog2005 m p c) =
-  Verilog2005
-    ( map
-        ( (mbIdent %~ f)
-            . ( transformOn biplate $ \mgi -> case mgi of
-                  MGIUDPInst t s d l -> MGIUDPInst (nmap t) s d l
-                  MGIModInst t p l -> MGIModInst (nmap t) p l
-                  MGIUnknownInst t p l -> MGIUnknownInst (nmap t) p l
-                  _ -> mgi :: ModGenBlockedItem
-              )
-            . (biplate . hiPath . _head . _1 %~ nmap)
-        )
-        m
-    )
-    (p & each . pbIdent %~ f)
-    ( map
-        ( (cbIdent %~ f)
-            . (biplate %~ \(Dot1Ident l c) -> Dot1Ident l $ nmap c)
-            . (cbBody . each . ciCell_inst . _CIInst %~ \(h :| t) -> nmap h :| t)
-        )
-        c
-    )
-  where
-    f (Identifier b) = Identifier $ fb b
-    nmap (Identifier x) = Identifier $ HashMap.findWithDefault x x mapmap
-    mapmap =
-      HashMap.fromList $
-        map (\(Identifier x) -> (x, fb x)) $
-          m ^.. each . mbIdent ++ p ^.. each . pbIdent ++ c ^.. each . cbIdent
diff --git a/verismith.cabal b/verismith.cabal
index be83797..75fce4f 100644
--- a/verismith.cabal
+++ b/verismith.cabal
@@ -85,7 +85,6 @@ library
                  , Verismith.Verilog2005.Parser
                  , Verismith.Verilog2005.Randomness
                  , Verismith.Verilog2005.Generator
-                 , Verismith.Verilog2005.Mutation
   build-depends: array >=0.5 && <0.6
                , base >=4.7 && <5
                , binary >= 0.8.5.1 && <0.9