Add SVE support for Graviton4

[gswirski]

Graviton4 CPU reduced SVE register size from 256 to 128 bit. This PR adds support for this configuration by essentially duplicating the code. I tried doing some macro magic with variadic arguments but it ended up being more confusing than simply having 128 and 256 bit versions.

[sonarqubecloud]

Quality Gate failed

Failed conditions
13.5% Duplication on New Code (required ≤ 3%)

See analysis details on SonarQube Cloud

[bobbinth]

Looks good! Thank you!

[bobbinth]

I updated the benchmarks in 6da2a62 and it seems like there is a modest improvement over Graviton 3, but I guess since they reduces the register size to 128 bits, that's the best we can hope for?

Also, to run tests I did the following on a Graviton 4 machine:

RUSTFLAGS="-C target-feature=+sve -C debug-assertions -C overflow-checks -C debuginfo=2" cargo nextest run --profile default --release

Would you do anything differently?

[gswirski]

Thank you for updating benchmark info, I missed it. I was using only RUSTFLAGS="-C target-feature=+sve for testing because I didn't know any better. This was enough to trigger SVE code.

As for further Graviton4 improvements, I'm not very optimistic. SVE2 added multiply-add with overflow opcodes that would be very helpful, except for the fact that then SVE registers become a single value (result + carry). I can try multiply-add without overflow in the coming days to collapse some of the instructions, but this PR was the easiest and fastest way to at least get Graviton4 on par with Graviton3.