Add certificate check to identify Python models, and fix SPI device s…

…elect behavior on non-Python models
CE-Programming · Sep 4, 2023 · 88536ab · 88536ab
1 parent 9101b67
commit 88536ab
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Showing 3 changed files with 13 additions and 2 deletions.
diff --git a/core/asic.c b/core/asic.c
@@ -19,6 +19,7 @@
 #include "backlight.h"
 #include "realclock.h"
 #include "defines.h"
+#include "cert.h"
 
 #include <stddef.h>
 #include <stdio.h>
@@ -138,6 +139,9 @@ void asic_free(void) {
 }
 
 void asic_reset(void) {
+    /* Update the Python state first, so it can be read by the reset handler if needed */
+    static const uint16_t path[] = { 0x0330, 0x0430 };
+    asic.python = !cert_field_find_path(mem.flash.block + 0x3B0001, SIZE_FLASH_SECTOR_64K, path, 2, NULL, NULL);
     asic.revision = report_reset(ASIC_REV_AUTO);
     set_features();
 
@@ -158,6 +162,10 @@ asic_rev_t EMSCRIPTEN_KEEPALIVE get_asic_revision(void) {
     return asic.revision;
 }
 
+bool EMSCRIPTEN_KEEPALIVE get_asic_python(void) {
+    return asic.python;
+}
+
 void set_cpu_clock(uint32_t new_rate) {
    sched_set_clock(CLOCK_CPU, new_rate);
 }

diff --git a/core/asic.h b/core/asic.h
@@ -23,7 +23,9 @@ typedef enum {
 
 typedef struct asic_state {
     ti_device_t device;
-    asic_rev_t revision; /* Only updated on reset */
+    /* Only updated on reset */
+    asic_rev_t revision;
+    bool python;
     /* Populated based on revision */
     bool im2;
     bool serFlash;
@@ -40,6 +42,7 @@ void set_cpu_clock(uint32_t new_rate);
 void set_device_type(ti_device_t device);
 ti_device_t get_device_type(void);
 asic_rev_t get_asic_revision(void);
+bool get_asic_python(void);
 
 #ifdef __cplusplus
 }

diff --git a/core/control.c b/core/control.c
@@ -145,7 +145,7 @@ static void control_write(const uint16_t pio, const uint8_t byte, bool poke) {
                     control.readBatteryStatus = control.setBatteryStatus == BATTERY_DISCHARGED ? 0 : byte & 0x80 ? 0 : 3;
                     break;
             }
-            if (asic.serFlash && (control.ports[index] ^ byte) >> 4 & 1) {
+            if (asic.python && (control.ports[index] ^ byte) >> 4 & 1) {
                 spi_device_select(byte >> 4 & 1);
             }
             control.ports[index] = byte;