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change AXI4RAM sim size to 512MB to sync with sim device tree; avoid …
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…alias problem
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Gwins7 committed Jan 26, 2024
1 parent e6d9ae2 commit e6b9eae
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion src/main/scala/sim/NutShellSim.scala
Original file line number Diff line number Diff line change
Expand Up @@ -38,7 +38,7 @@ class SimTop extends Module {

lazy val config = NutCoreConfig(FPGAPlatform = false)
val soc = Module(new NutShell()(config))
val mem = Module(new AXI4RAM(memByte = 128 * 1024 * 1024, useBlackBox = true))
val mem = Module(new AXI4RAM(memByte = 512 * 1024 * 1024, useBlackBox = true))
// Be careful with the commit checking of emu.
// A large delay will make emu incorrectly report getting stuck.
val memdelay = Module(new AXI4Delayer(0))
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