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Increase pre-loadable ROM size limit by 64KB
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@RocketRobz
RocketRobz committed Dec 21, 2024
1 parent 53288e4 commit 13c3991
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Showing 10 changed files with 111 additions and 49 deletions.
2 changes: 1 addition & 1 deletion retail/bootloaderi/include/ips.h
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
#ifndef IPS_H
#define IPS_H

bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only, const bool isESdk2, const bool isSdk5, const bool ROMinRAM, const u32 cacheBlockSize);
bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only, const bool laterSdk, const bool isSdk5, const bool ROMinRAM, const u32 cacheBlockSize);
bool ipsHasOverlayPatch(const tNDSHeader* ndsHeader, u8* ipsbyte);

#endif // IPS_H
4 changes: 2 additions & 2 deletions retail/bootloaderi/source/arm7/hook_arm7.c
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Original file line number Diff line number Diff line change
Expand Up @@ -464,10 +464,10 @@ int hookNdsRetailArm7(
}

extern u32 romMapLines;
extern u32 romMap[5][3];
extern u32 romMap[6][3];

ce7->romMapLines = romMapLines;
for (int i = 0; i < 5; i++) {
for (int i = 0; i < 6; i++) {
for (int i2 = 0; i2 < 3; i2++) {
ce7->romMap[i][i2] = romMap[i][i2];
}
Expand Down
36 changes: 28 additions & 8 deletions retail/bootloaderi/source/arm7/hook_arm9.c
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Original file line number Diff line number Diff line change
Expand Up @@ -176,10 +176,10 @@ void configureRomMap(cardengineArm9* ce9, const tNDSHeader* ndsHeader, const u32
}

extern u32 romMapLines;
extern u32 romMap[5][3];
extern u32 romMap[6][3];

ce9->romMapLines = romMapLines;
for (int i = 0; i < 5; i++) {
for (int i = 0; i < 6; i++) {
for (int i2 = 0; i2 < 3; i2++) {
ce9->romMap[i][i2] = romMap[i][i2];
}
Expand Down Expand Up @@ -344,13 +344,19 @@ int hookNdsRetailArm9(
ce9->cacheAddress += cacheBlockSize;
if (isSdk5(moduleParams) || ((ce9->valueBits & b_dsiBios) && laterSdk)) {
if (ce9->cacheAddress == 0x0C7C0000+cacheBlockSize) {
ce9->cacheAddress += (ndsHeader->unitCode > 0 ? 0x20000 : 0x40000)-cacheBlockSize;
ce9->cacheAddress += (laterSdk ? 0x8000 : 0x28000)-cacheBlockSize;
} else if (ndsHeader->unitCode == 0) {
if (ce9->cacheAddress == 0x0D000000-cacheBlockSize) {
ce9->cacheAddress += cacheBlockSize;
} else if (ce9->cacheAddress == 0x0C7D8000 && laterSdk) {
ce9->cacheAddress += 0x28000;
} else if (ce9->cacheAddress == 0x0C7F8000 && !laterSdk) {
ce9->cacheAddress += 0x8000;
}
} else {
if (ce9->cacheAddress == 0x0C800000-cacheBlockSize) {
if (ce9->cacheAddress == 0x0C7D8000) {
ce9->cacheAddress += 0x8000;
} else if (ce9->cacheAddress == 0x0C800000-cacheBlockSize) {
ce9->cacheAddress += cacheBlockSize;
} else if (ce9->cacheAddress == 0x0CFE0000) {
ce9->cacheAddress += 0x20000;
Expand All @@ -359,7 +365,11 @@ int hookNdsRetailArm9(
} else if ((ce9->cacheAddress == 0x0D000000-cacheBlockSize) && (ce9->valueBits & b_dsiBios)) {
ce9->cacheAddress += cacheBlockSize;
} else if (ce9->cacheAddress == 0x0C7C0000) {
ce9->cacheAddress += 0x40000;
ce9->cacheAddress += (laterSdk ? 0x8000 : 0x28000);
} else if (ce9->cacheAddress == 0x0C7D8000 && laterSdk) {
ce9->cacheAddress += 0x28000;
} else if (ce9->cacheAddress == 0x0C7F8000 && !laterSdk) {
ce9->cacheAddress += 0x8000;
}
dataToPreloadSizeAligned += cacheBlockSize;
}
Expand Down Expand Up @@ -407,13 +417,19 @@ int hookNdsRetailArm9(
for (int slot = 0; slot < ce9->cacheSlots; slot++) {
if (isSdk5(moduleParams) || ((ce9->valueBits & b_dsiBios) && laterSdk)) {
if (addr == 0x0C7C0000+cacheBlockSize) {
addr += (ndsHeader->unitCode > 0 ? 0x20000 : 0x40000)-cacheBlockSize;
addr += (laterSdk ? 0x8000 : 0x28000)-cacheBlockSize;
} else if (ndsHeader->unitCode == 0) {
if (addr == 0x0D000000-cacheBlockSize) {
addr += cacheBlockSize;
} else if (addr == 0x0C7D8000 && laterSdk) {
addr += 0x28000;
} else if (addr == 0x0C7F8000 && !laterSdk) {
addr += 0x8000;
}
} else {
if (addr == 0x0C800000-cacheBlockSize) {
if (addr == 0x0C7D8000) {
addr += 0x8000;
} else if (addr == 0x0C800000-cacheBlockSize) {
addr += cacheBlockSize;
} else if (addr == 0x0CFE0000) {
addr += 0x20000;
Expand All @@ -422,7 +438,11 @@ int hookNdsRetailArm9(
} else if ((addr == 0x0D000000-cacheBlockSize) && (ce9->valueBits & b_dsiBios)) {
addr += cacheBlockSize;
} else if (addr == 0x0C7C0000) {
addr += 0x40000;
addr += (laterSdk ? 0x8000 : 0x28000);
} else if (addr == 0x0C7D8000 && laterSdk) {
addr += 0x28000;
} else if (addr == 0x0C7F8000 && !laterSdk) {
addr += 0x8000;
}
cacheAddressTable[slot] = addr;
addr += cacheBlockSize;
Expand Down
38 changes: 29 additions & 9 deletions retail/bootloaderi/source/arm7/ips.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,7 @@ extern bool overlaysInRam;

extern bool scfgBios9i(void);

bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only, const bool isESdk2, const bool isSdk5, const bool ROMinRAM, const u32 cacheBlockSize) {
bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only, const bool laterSdk, const bool isSdk5, const bool ROMinRAM, const u32 cacheBlockSize) {
if (ipsbyte[0] != 'P' && ipsbyte[1] != 'A' && ipsbyte[2] != 'T' && ipsbyte[3] != 'C' && ipsbyte[4] != 'H' && ipsbyte[5] != 0) {
return false;
}
Expand Down Expand Up @@ -76,15 +76,21 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
*rombyteOffset = repeatbyte[i];
rombyteOffset++;
if (ROMinRAM && (ndsHeader->unitCode == 0 || !dsiModeConfirmed)) {
if (isSdk5 || (dsiBios && !isESdk2)) {
if (isSdk5 || (dsiBios && laterSdk)) {
if ((u32)rombyteOffset == 0x0C7C4000) {
rombyteOffset += (ndsHeader->unitCode > 0 ? 0x1C000 : 0x3C000);
rombyteOffset += (laterSdk ? 0x4000 : 0x24000);
} else if (ndsHeader->unitCode == 0) {
if ((u32)rombyteOffset == 0x0CFFC000) {
rombyteOffset += 0x4000;
} else if ((u32)rombyteOffset == 0x0C7D8000 && laterSdk) {
rombyteOffset += 0x28000;
} else if ((u32)rombyteOffset == 0x0C7F8000 && !laterSdk) {
rombyteOffset += 0x8000;
}
} else {
if ((u32)rombyteOffset == 0x0C7FC000) {
if ((u32)rombyteOffset == 0x0C7D8000) {
rombyteOffset += 0x8000;
} else if ((u32)rombyteOffset == 0x0C7FC000) {
rombyteOffset += 0x4000;
} else if ((u32)rombyteOffset == 0x0CFE0000) {
rombyteOffset += 0x20000;
Expand All @@ -93,7 +99,11 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
} else if ((u32)rombyteOffset == 0x0CFFC000 && dsiBios) {
rombyteOffset += 0x4000;
} else if ((u32)rombyteOffset == 0x0C7C0000) {
rombyteOffset += 0x40000;
rombyteOffset += (laterSdk ? 0x8000 : 0x28000);
} else if ((u32)rombyteOffset == 0x0C7D8000 && laterSdk) {
rombyteOffset += 0x28000;
} else if ((u32)rombyteOffset == 0x0C7F8000 && !laterSdk) {
rombyteOffset += 0x8000;
}
if ((u32)rombyteOffset == (consoleModel > 0 ? 0x0E000000 : 0x0D000000)) {
rombyteOffset = (u8*)wramLocation;
Expand All @@ -110,15 +120,21 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
*rombyteOffset = ipsbyte[ipson+i];
rombyteOffset++;
if (ROMinRAM && (ndsHeader->unitCode == 0 || !dsiModeConfirmed)) {
if (isSdk5 || (dsiBios && !isESdk2)) {
if (isSdk5 || (dsiBios && laterSdk)) {
if ((u32)rombyteOffset == 0x0C7C4000) {
rombyteOffset += (ndsHeader->unitCode > 0 ? 0x1C000 : 0x3C000);
rombyteOffset += (laterSdk ? 0x4000 : 0x24000);
} else if (ndsHeader->unitCode == 0) {
if ((u32)rombyteOffset == 0x0CFFC000) {
rombyteOffset += 0x4000;
} else if ((u32)rombyteOffset == 0x0C7D8000 && laterSdk) {
rombyteOffset += 0x28000;
} else if ((u32)rombyteOffset == 0x0C7F8000 && !laterSdk) {
rombyteOffset += 0x8000;
}
} else {
if ((u32)rombyteOffset == 0x0C7FC000) {
if ((u32)rombyteOffset == 0x0C7D8000) {
rombyteOffset += 0x8000;
} else if ((u32)rombyteOffset == 0x0C7FC000) {
rombyteOffset += 0x4000;
} else if ((u32)rombyteOffset == 0x0CFE0000) {
rombyteOffset += 0x20000;
Expand All @@ -127,7 +143,11 @@ bool applyIpsPatch(const tNDSHeader* ndsHeader, u8* ipsbyte, const bool arm9Only
} else if ((u32)rombyteOffset == 0x0CFFC000 && dsiBios) {
rombyteOffset += 0x4000;
} else if ((u32)rombyteOffset == 0x0C7C0000) {
rombyteOffset += 0x40000;
rombyteOffset += (laterSdk ? 0x8000 : 0x28000);
} else if ((u32)rombyteOffset == 0x0C7D8000 && laterSdk) {
rombyteOffset += 0x28000;
} else if ((u32)rombyteOffset == 0x0C7F8000 && !laterSdk) {
rombyteOffset += 0x8000;
}
if ((u32)rombyteOffset == (consoleModel > 0 ? 0x0E000000 : 0x0D000000)) {
rombyteOffset = (u8*)wramLocation;
Expand Down
62 changes: 38 additions & 24 deletions retail/bootloaderi/source/arm7/main.arm7.c
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Original file line number Diff line number Diff line change
Expand Up @@ -175,7 +175,8 @@ u32 oldArm7mbk = 0;

u32 romMapLines = 0;
// 0: ROM part start, 1: ROM part start in RAM, 2: ROM part end in RAM
u32 romMap[5][3] = {
u32 romMap[6][3] = {
{0, 0, 0},
{0, 0, 0},
{0, 0, 0},
{0, 0, 0},
Expand Down Expand Up @@ -807,7 +808,7 @@ u32 getRomLocation(const tNDSHeader* ndsHeader, const bool isESdk2, const bool i
if (ndsHeader->unitCode > 0 && dsiModeConfirmed) {
return ROM_LOCATION_TWLSDK;
}
return (dsiModeConfirmed || strncmp(getRomTid(ndsHeader), "B6X", 3) == 0) ? ROM_LOCATION_DSIMODE : (ROM_LOCATION - ((isESdk2 && dsiBios) ? 0x4000 : 0));
return dsiModeConfirmed ? ROM_LOCATION_DSIMODE : (ROM_LOCATION - ((isESdk2 && dsiBios) ? 0x4000 : 0));
}

static bool isROMLoadableInRAM(const tDSiHeader* dsiHeader, const tNDSHeader* ndsHeader, const char* romTid, const module_params_t* moduleParams, const bool usesCloneboot) {
Expand All @@ -827,13 +828,12 @@ static bool isROMLoadableInRAM(const tDSiHeader* dsiHeader, const tNDSHeader* nd
) {
const bool twlType = (ROMsupportsDsiMode(ndsHeader) && dsiModeConfirmed);
const bool cheatsEnabled = (cheatSizeTotal > 4 && cheatSizeTotal <= 0x8000);
const bool _8MBarea = (dsiModeConfirmed || strncmp(romTid, "B6X", 3) == 0);
u32 wramSize = 0x80000;
if (ce7Location == CARDENGINEI_ARM7_LOCATION) {
wramSize += 0x8000; // Shared 32KB of WRAM is available for ARM9 to use
sharedWramEnabled = true;
}
u32 romSizeLimit = (_8MBarea ? 0x00800000 : 0x00BC0000);
u32 romSizeLimit = (dsiModeConfirmed ? 0x00800000 : 0x00BC0000);
if (consoleModel > 0) {
romSizeLimit += 0x01000000;
}
Expand Down Expand Up @@ -1142,15 +1142,24 @@ static void buildRomMap(const tNDSHeader* ndsHeader, const module_params_t* modu
readRom = true;
} else if (isSdk5(moduleParams) || (dsiBios && laterSdk)) {
if (romLocationChangePrep == 0x0C7C4000) {
romLocationChangePrep += (ndsHeader->unitCode > 0 ? 0x1C000 : 0x3C000);
romLocationChangePrep += (laterSdk ? 0x4000 : 0x24000);
readRom = true;
} else if (ndsHeader->unitCode == 0) {
if (romLocationChangePrep == 0x0CFFC000) {
romLocationChangePrep += 0x4000;
readRom = true;
} else if (romLocationChangePrep == 0x0C7D8000 && laterSdk) {
romLocationChangePrep += 0x28000;
readRom = true;
} else if (romLocationChangePrep == 0x0C7F8000 && !laterSdk) {
romLocationChangePrep += 0x8000;
readRom = true;
}
} else {
if (romLocationChangePrep == 0x0C7FC000) {
if (romLocationChangePrep == 0x0C7D8000) {
romLocationChangePrep += 0x8000;
readRom = true;
} else if (romLocationChangePrep == 0x0C7FC000) {
romLocationChangePrep += 0x4000;
readRom = true;
} else if (romLocationChangePrep == 0x0CFE0000) {
Expand All @@ -1162,7 +1171,13 @@ static void buildRomMap(const tNDSHeader* ndsHeader, const module_params_t* modu
romLocationChangePrep += 0x4000;
readRom = true;
} else if (romLocationChangePrep == 0x0C7C0000) {
romLocationChangePrep += 0x40000;
romLocationChangePrep += (laterSdk ? 0x8000 : 0x28000);
readRom = true;
} else if (romLocationChangePrep == 0x0C7D8000 && laterSdk) {
romLocationChangePrep += 0x28000;
readRom = true;
} else if (romLocationChangePrep == 0x0C7F8000 && !laterSdk) {
romLocationChangePrep += 0x8000;
readRom = true;
}
if (romLocationChangePrep == (consoleModel > 0 ? 0x0E000000 : 0x0D000000)) {
Expand Down Expand Up @@ -1593,18 +1608,16 @@ int arm7_main(void) {
const char* romTid = getRomTid(&dsiHeaderTemp.ndshdr);
if (!isDSiWare || !scfgSdmmcEnabled || (REG_SCFG_ROM & BIT(9))) {
extern u32 clusterCacheSize;
clusterCacheSize = 0x10000;
if (dsiModeConfirmed && ROMsupportsDsiMode(&dsiHeaderTemp.ndshdr)) {
clusterCacheSize = 0x7B0;
}
clusterCacheSize = (ROMsupportsDsiMode(&dsiHeaderTemp.ndshdr) && dsiModeConfirmed) ? 0x7B0 : 0x600;

if ((memcmp(romTid, "IPG", 3) == 0) || ((memcmp(romTid, "IPK", 3) == 0))) {
buildFatTableCache(romFile); // Build uncompressed table for HGSS
if (!(romFile->fatTableSettings & fatCached)) {
buildFatTableCacheCompressed(romFile);
}
} else {
buildFatTableCacheCompressed(romFile);
buildFatTableCacheCompressed(romFile);
if (!(romFile->fatTableSettings & fatCached)) {
dbg_printf("\n");
dbg_printf("Cluster cache is above 0x");
dbg_printf((clusterCacheSize == 0x7B0) ? "7B0" : "600");
dbg_printf(" bytes!\n");
dbg_printf("Please back up and restore the SD card contents to defragment it\n");
errorOutput();
}
buildFatTableCacheCompressed(savFile);
}
Expand Down Expand Up @@ -1677,7 +1690,7 @@ int arm7_main(void) {
savFile->fatTableCache = (u32*)((u32)savFile->fatTableCache+add);
lastClusterCacheUsed = (u32*)((u32)lastClusterCacheUsed+add);
clusterCache += add;
toncset((char*)0x02700000, 0, 0x10000);
toncset((char*)0x02700000, 0, 0x7B0);
// }
}

Expand All @@ -1702,16 +1715,17 @@ int arm7_main(void) {
extern u32* lastClusterCacheUsed;
extern u32 clusterCache;

u32 add = laterSdk ? 0xC8000 : 0xE8000; // 0x027C8000 : 0x027E8000
/* u32 add = laterSdk ? 0xC8000 : 0xE8000; // 0x027C8000 : 0x027E8000
if (memcmp(romTid, "HND", 3) == 0) {
add = 0x108000; // 0x02808000
}
tonccpy((char*)0x02700000+add, (char*)0x02700000, 0x10000); // Move FAT table cache elsewhere
} */
const u32 add = 0xFF200; // 0x027FF200
tonccpy((char*)0x02700000+add, (char*)0x02700000, 0x600); // Move FAT table cache elsewhere
romFile->fatTableCache = (u32*)((u32)romFile->fatTableCache+add);
savFile->fatTableCache = (u32*)((u32)savFile->fatTableCache+add);
lastClusterCacheUsed = (u32*)((u32)lastClusterCacheUsed+add);
clusterCache += add;
toncset((char*)0x02700000, 0, 0x10000);
toncset((char*)0x02700000, 0, 0x600);
}

//if (gameOnFlashcard || !isDSiWare || !dsiWramAccess) {
Expand Down Expand Up @@ -2281,7 +2295,7 @@ int arm7_main(void) {
}

if (useApPatch) {
if (applyIpsPatch(ndsHeader, (u8*)IPS_LOCATION, (*(u8*)(IPS_LOCATION+apPatchSize-1) == 0xA9), !laterSdk, isSdk5(moduleParams), ROMinRAM, cacheBlockSize)) {
if (applyIpsPatch(ndsHeader, (u8*)IPS_LOCATION, (*(u8*)(IPS_LOCATION+apPatchSize-1) == 0xA9), laterSdk, isSdk5(moduleParams), ROMinRAM, cacheBlockSize)) {
dbg_printf("AP-fix applied\n");
} else {
dbg_printf("Failed to apply AP-fix\n");
Expand Down
4 changes: 4 additions & 0 deletions retail/cardenginei/arm7/source/card_engine_header.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -127,6 +127,10 @@ romMap:
.word 0x00000000
.word 0x00000000
.word 0x00000000

.word 0x00000000
.word 0x00000000
.word 0x00000000
.align 4

@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Expand Down
4 changes: 4 additions & 0 deletions retail/cardenginei/arm9/source/card_engine_header.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -89,6 +89,10 @@ romMap:
.word 0x00000000
.word 0x00000000
.word 0x00000000

.word 0x00000000
.word 0x00000000
.word 0x00000000
#endif

@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
Expand Down
2 changes: 1 addition & 1 deletion retail/common/include/cardengine_header_arm7.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,7 @@ typedef struct cardengineArm7 {
u32 romPartSize;
u32 romPartFrame;
u32 romMapLines;
u32 romMap[5][3]; // 0: ROM part start, 1: ROM part start in RAM, 2: ROM part end in RAM
u32 romMap[6][3]; // 0: ROM part start, 1: ROM part start in RAM, 2: ROM part end in RAM
} cardengineArm7;

//
Expand Down
2 changes: 1 addition & 1 deletion retail/common/include/cardengine_header_arm9.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,7 @@ typedef struct cardengineArm9 {
u32 romPartSrc;
u32 romPartSize;
u32 romMapLines;
u32 romMap[5][3]; // 0: ROM part start, 1: ROM part start in RAM, 2: ROM part end in RAM
u32 romMap[6][3]; // 0: ROM part start, 1: ROM part start in RAM, 2: ROM part end in RAM
} cardengineArm9;

#else
Expand Down
6 changes: 3 additions & 3 deletions retail/common/include/locations.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -133,9 +133,9 @@
#define retail_CACHE_ADRESS_START_TWLSDK_LARGE 0x02D00000
#define retail_CACHE_ADRESS_START_TWLSDK_LARGE_CHEAT 0x02D08400

#define retail_CACHE_ADRESS_SIZE 0xBC0000
#define retail_CACHE_ADRESS_SIZE 0xBD0000
#define retail_CACHE_ADRESS_SIZE_DSIMODE 0x7FF000
#define retail_CACHE_ADRESS_SIZE_BROWSER 0x3C0000
#define retail_CACHE_ADRESS_SIZE_BROWSER 0x3D0000
#define retail_CACHE_ADRESS_SIZE_TWLSDK_SMALL 0x20000
#define retail_CACHE_ADRESS_SIZE_TWLSDK_SMALL_CHEAT 0x17C00
#define retail_CACHE_ADRESS_SIZE_TWLSDK 0x80000
Expand All @@ -145,7 +145,7 @@

#define dev_CACHE_ADRESS_START_TWLSDK 0x0D000000

#define dev_CACHE_ADRESS_SIZE 0x1BC0000
#define dev_CACHE_ADRESS_SIZE 0x1BD0000
#define dev_CACHE_ADRESS_SIZE_DSIMODE 0x17FF000
#define dev_CACHE_ADRESS_SIZE_TWLSDK 0x1000000
#define dev_CACHE_ADRESS_SIZE_TWLSDK_CHEAT 0xFF7C00
Expand Down

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