qbench

Algorithms analysis

Note: in the OPENQASM source files there are six algorithms using rotations along the z axis in any degree (QFT, Ising and Ground State Estimation). Those are not translated for now.

Algorithm	No. qubits	No. gates	Source	Expected Behaviour
0410184_169	14	211	RevLib	A form of integer adder
3_17_13	3	36	RevLib	worst case scenario for the approach presented in cite:Miller_2003
4_49_16	5	217	RevLib	worst case scenario for the approach presented in cite:Miller_2003
4gt10-v1_81	5	148	RevLib	Checks, if input is greater than 10. (Note: Embedding with constant 1)
4gt11_82	5	27	RevLib	Checks, if input is greater than 11. (Note: Embedding with constant 1)
4gt11_83	5	23	RevLib	Checks, if input is greater than 11. (Note: Embedding with constant 1)
4gt11_84	5	18	RevLib	Checks, if input is greater than 11. (Note: Embedding with constant 1)
4gt12-v0_86	6	251	RevLib	Checks, if input is greater than 12. (Note: Embedding with constant 1)
4gt12-v0_87	6	247	RevLib	Checks, if input is greater than 12. (Note: Embedding with constant 1)
4gt12-v0_88	6	194	RevLib	Checks, if input is greater than 12. (Note: Embedding with constant 1)
4gt12-v1_89	6	228	RevLib	Checks, if input is greater than 12. (Note: Embedding with constant 1)
4gt13-v1_93	5	68	RevLib	Checks, if input is greater than 13. (Note: Embedding with constant 1)
4gt13_90	5	107	RevLib	Checks, if input is greater than 13. (Note: Embedding with constant 1)
4gt13_91	5	103	RevLib	Checks, if input is greater than 13. (Note: Embedding with constant 1)
4gt13_92	5	66	RevLib	Checks, if input is greater than 13. (Note: Embedding with constant 1)
4gt4-v0_72	6	258	RevLib	Checks, if input is greater than 4. (Note: Embedding with constant 1)
4gt4-v0_73	6	395	RevLib	Checks, if input is greater than 4. (Note: Embedding with constant 1)
4gt4-v0_78	6	235	RevLib	Checks, if input is greater than 4. (Note: Embedding with constant 1)
4gt4-v0_79	6	231	RevLib	Checks, if input is greater than 4. (Note: Embedding with constant 1)
4gt4-v0_80	6	179	RevLib	Checks, if input is greater than 4. (Note: Embedding with constant 1)
4gt4-v1_74	6	273	RevLib	Checks, if input is greater than 4. (Note: Embedding with constant 1)
4gt5_75	5	83	RevLib	Checks, if input is greater than 5. (Note: Embedding with constant 1)
4gt5_76	5	91	RevLib	Checks, if input is greater than 5. (Note: Embedding with constant 1)
4gt5_77	5	131	RevLib	Checks, if input is greater than 5. (Note: Embedding with constant 1)
4mod5-bdd_287	7	70	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod5-v0_18	5	69	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod5-v0_19	5	35	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod5-v0_20	5	20	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod5-v1_22	5	21	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod5-v1_23	5	69	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod5-v1_24	5	36	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 5
4mod7-v0_94	5	162	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 7
4mod7-v1_96	5	164	RevLib	Performs a modulo operation of the binary encoding of the input and the constant 7
9symml_195	11	34881	RevLib
C17_204	7	467	RevLib
adr4_197	13	3439	RevLib
aj-e11_165	5	151	RevLib
alu-bdd_288	7	84	RevLib	BDD-based synthesis of reversible logic for large functions based on cite:Wille_2009
alu-v0_26	5	84	RevLib	Arithmetic Logic Unit (ALU)
alu-v0_27	5	36	RevLib	Arithmetic Logic Unit (ALU)
alu-v1_28	5	37	RevLib	Arithmetic Logic Unit (ALU)
alu-v1_29	5	37	RevLib	Arithmetic Logic Unit (ALU)
alu-v2_30	6	504	RevLib	Arithmetic Logic Unit (ALU)
alu-v2_31	5	451	RevLib	Arithmetic Logic Unit (ALU)
alu-v2_32	5	163	RevLib	Arithmetic Logic Unit (ALU)
alu-v2_33	5	37	RevLib	Arithmetic Logic Unit (ALU)
alu-v3_34	5	52	RevLib	Arithmetic Logic Unit (ALU)
alu-v3_35	5	37	RevLib	Arithmetic Logic Unit (ALU)
alu-v4_36	5	115	RevLib	Arithmetic Logic Unit (ALU)
alu-v4_37	5	37	RevLib	Arithmetic Logic Unit (ALU)
clip_206	14	33827	RevLib
cm152a_212	12	1221	RevLib
cm42a_207	14	1776	RevLib
cm82a_208	8	650	RevLib
cm85a_209	14	11414	RevLib
cnt3-5_179	16	175	RevLib	A reversible ternary counter with bit-width 5
cnt3-5_180	16	485	RevLib	A reversible ternary counter with bit-width 5
co14_215	15	17936	RevLib
con1_216	9	954	RevLib
cycle10_2_110	12	6050	RevLib
dc1_220	11	1914	RevLib
dc2_222	15	9462	RevLib
decod24-bdd_294	6	73	RevLib	BDD-based synthesis of reversible logic for large functions based on cite:Wille_2009
decod24-enable_126	6	338	RevLib	2 to 4 binary decoder with enable
decod24-v0_38	4	51	RevLib	2 to 4 binary decoder
decod24-v1_41	5	85	RevLib	2 to 4 binary decoder
decod24-v2_43	4	52	RevLib	2 to 4 binary decoder
decod24-v3_45	5	150	RevLib	2 to 4 binary decoder
dist_223	13	38046	RevLib
ex-1_166	3	19	RevLib
ex1_226	6	7	RevLib
ex2_227	7	631	RevLib
ex3_229	6	403	RevLib
f2_232	8	1206	RevLib
graycode6_47	6	5	RevLib	The Graycode function transforms the number $x$ (with $0 ≤ x<26-1$) into the graycode.
ham15_107	15	8763	RevLib	This function realizes the hamming code of a 15 variables input.
ham3_102	3	20	RevLib	This function realizes the hamming code of a 3 variables input.
ham7_104	7	320	RevLib	This function realizes the hamming code of a 7 variables input.
hwb4_49	5	233	RevLib	This function describes the hidden weighted bit function (HWB) over 4 variables. HWB seems to be the simplest function with exponential OBDD size cite:Bollig_1999
hwb5_53	6	1336	RevLib	This function describes the hidden weighted bit function (HWB) over 5 variables. HWB seems to be the simplest function with exponential OBDD size cite:Bollig_1999
hwb6_56	7	6723	RevLib	This function describes the hidden weighted bit function (HWB) over 6 variables. HWB seems to be the simplest function with exponential OBDD size cite:Bollig_1999
hwb7_59	8	24379	RevLib	This function describes the hidden weighted bit function (HWB) over 7 variables. HWB seems to be the simplest function with exponential OBDD size cite:Bollig_1999
hwb8_113	9	69380	RevLib	This function describes the hidden weighted bit function (HWB) over 8 variables. HWB seems to be the simplest function with exponential OBDD size cite:Bollig_1999
hwb9_119	10	207775	RevLib	This function describes the hidden weighted bit function (HWB) over 9 variables. HWB seems to be the simplest function with exponential OBDD size cite:Bollig_1999
inc_237	16	10619	RevLib
life_238	11	22445	RevLib	Identical to “life_min” function
majority_239	7	612	RevLib
max46_240	10	27126	RevLib
miller_11	3	50	RevLib	This function describes the Toffoli gate (Miller gate)
mini-alu_167	5	288	RevLib	Simple ALU
mini_alu_305	10	173	RevLib
mini_alu_305	10	173	RevLib	Simple ALU
misex1_241	15	4813	RevLib
mlp4_245	16	18852	RevLib	A single digit BCD modulo-10 counter
mod10_171	5	244	RevLib	A single digit BCD modulo-10 counter
mod10_176	5	178	RevLib	This function realizes addition modulo 5
mod5adder_127	6	555	RevLib
mod5d1_63	5	22	RevLib
mod5d2_64	5	53	RevLib
mod5mils_65	5	35	RevLib
mod8-10_177	6	440	RevLib	A single digit BCD counter that counts modulo 8 if e=0 and modulo 10 if e=1
mod8-10_178	6	342	RevLib	A single digit BCD counter that counts modulo 8 if e=0 and modulo 10 if e=1
one-two-three-v0_97	5	290	RevLib	This function has 3 inputs and three outputs. The first output is assigned to 1 if in total 1 input is assigned to 1. The second output is assigned to 1 if in total 2 inputs are assigned to 1. The third output is assigned to 1 if in total all 3 inputs are assigned to 1.
one-two-three-v0_98	5	146	RevLib	This function has 3 inputs and three outputs. The first output is assigned to 1 if in total 1 input is assigned to 1. The second output is assigned to 1 if in total 2 inputs are assigned to 1. The third output is assigned to 1 if in total all 3 inputs are assigned to 1.
one-two-three-v1_99	5	132	RevLib	This function has 3 inputs and three outputs. The first output is assigned to 1 if in total 1 input is assigned to 1. The second output is assigned to 1 if in total 2 inputs are assigned to 1. The third output is assigned to 1 if in total all 3 inputs are assigned to 1.
one-two-three-v2_100	5	69	RevLib	This function has 3 inputs and three outputs. The first output is assigned to 1 if in total 1 input is assigned to 1. The second output is assigned to 1 if in total 2 inputs are assigned to 1. The third output is assigned to 1 if in total all 3 inputs are assigned to 1.
one-two-three-v3_101	5	70	RevLib	This function has 3 inputs and three outputs. The first output is assigned to 1 if in total 1 input is assigned to 1. The second output is assigned to 1 if in total 2 inputs are assigned to 1. The third output is assigned to 1 if in total all 3 inputs are assigned to 1.
plus63mod4096_163	13	128744	RevLib	Add 63 to the input modulo 4096
plus63mod8192_164	14	187112	RevLib	Add 63 to the input modulo 8192
pm1_249	14	1776	RevLib
radd_250	13	3213	RevLib
rd32-v0_66	4	34	RevLib	Counts the number of ones in the input.
rd32-v1_68	4	36	RevLib	Counts the number of ones in the input.
rd32_270	5	84	RevLib	Counts the number of ones in the input.
rd53_130	7	1043	RevLib	Counts the number of ones in the input.
rd53_131	7	469	RevLib	Counts the number of ones in the input.
rd53_133	7	580	RevLib	Counts the number of ones in the input.
rd53_135	7	296	RevLib	Counts the number of ones in the input.
rd53_138	8	132	RevLib	Counts the number of ones in the input.
rd53_251	8	1291	RevLib	Counts the number of ones in the input.
rd53_311	13	275	RevLib	Counts the number of ones in the input.
rd73_140	10	230	RevLib	Counts the number of ones in the input.
rd73_252	10	5321	RevLib	Counts the number of ones in the input.
rd84_142	15	343	RevLib	Counts the number of ones in the input.
rd84_253	12	13658	RevLib	Counts the number of ones in the input.
root_255	13	17159	RevLib
sao2_257	14	38577	RevLib
sf_274	6	781	RevLib	Sample function generated using ESOPSolver v.0 to demonstrate the use of ordering product terms and modifying variable polarity indices.
sf_276	6	778	RevLib	Sample function generated using ESOPSolver v.0 to demonstrate the use of ordering product terms and modifying variable polarity indices.
sqn_258	10	10223	RevLib
sqrt8_260	12	3009	RevLib
squar5_261	13	1993	RevLib
square_root_7	15	7630
sym10_262	12	64283	RevLib	Symmetric function. This is a 10 inputs and 1 output function
sym6_145	7	3888	RevLib	Symmetric function. This is a 6 inputs and 1 output function. The output is assigned to one iff the number of ones in the input is 2, 3, or 4
sym6_316	14	270	RevLib	Symmetric function. This is a 6 inputs and 1 output function. The output is assigned to one iff the number of ones in the input is 2, 3, or 4
sym9_146	12	328	RevLib	Symmetric function. This is a 9 inputs and 1 output function. The output is assigned to one iff the number of ones in the input is 3, 4, 5 or 6
sym9_148	10	21504	RevLib	Symmetric function. This is a 9 inputs and 1 output function. The output is assigned to one iff the number of ones in the input is 3, 4, 5 or 6
sym9_193	11	34881	RevLib	Symmetric function. This is a 9 inputs and 1 output function. The output is assigned to one iff the number of ones in the input is 3, 4, 5 or 6
sys6-v0_111	10	215	RevLib	sym6
urf1_149	9	184864	RevLib	Unstructured Reversible Function 1
urf1_278	9	54766	RevLib	Unstructured Reversible Function 1
urf2_152	8	80480	RevLib	Unstructured Reversible Function 2
urf2_277	8	20112	RevLib	Unstructured Reversible Function 2
urf3_155	10	423488	RevLib	Unstructured Reversible Function 3
urf3_279	10	125362	RevLib	Unstructured Reversible Function 3
urf4_187	11	512064	RevLib	Unstructured Reversible Function 4
urf5_158	9	164416	RevLib	Unstructured Reversible Function 5
urf5_280	9	49829	RevLib	Unstructured Reversible Function 5
urf6_160	15	171840	RevLib	Unstructured Reversible Function 6
wim_266	11	986	RevLib
xor5_254	6	7	RevLib
z4_268	11	3073	RevLib

Classification

Based on the RevLib algorithm classification

Quantum gates

• Miller Gate

Encoding Functions

• Decod24
• Decod24 with enable
• Graycode
• Hamming Code

Arithmetic Functions

• ALUs
• 0410184
• 1-bit Adder / rd32
• 4 greater than 10
• 4 greater than 11
• 4 greater than 12
• 4 greater than 13
• 4 greater than 4
• 4 greater than 5
• 4 modulo 7
• Check 4 modulo 5
• dist
• majority
• max46
• mlp4
• mod5adder
• mod5d1
• mod5d2
• mod5mils
• Modulo 8/10 Counter
• One-Two-Three Counter
• plus127mod8192
• plus63mod4096
• plus63mod8192
• radd
• rd32
• rd53
• rd73
• rd84
• root
• sqn
• sqrt8
• squar5
• xor5
• z4

Miscellaneous

• 9symml
• adr4
• aj-e11
• C17
• clip
• cm152a
• cm42a
• cm82a
• cm85a
• co14
• con1
• cycle10_2
• dc1
• dc2
• ex-1
• ex1
• ex2
• ex3
• f2
• inc
• life
• misex1
• pm1
• sao2
• Unstructured Reversible Functions. The urf benchmarks include six functions with various sizes that have no regular structure in their specifications. These functions are introduced to evaluate the behavior of a synthesis algorithm in synthesizing completely unstructured functions. The urf functions were originally proposed by M. Saeedi.
• 3_17
• 4_49
• Hidden Weighted Bit
• sym10
• sym6
• sym9

Statistics

• Highest amount of gates: urf has a maximum of 512064 gates followed by the hwb9_119 with 207775 gates
• Number of different algorithms: 83
• More details in Benchmarks Profile

OPENQASM to OpenQL translation

TODO…

OpenQL compilation

The configuration file used to compile the OpenQL algorithms is hardware_config_cc_light.json