First commit

.gitignore

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+C8051F040_defs.h
+*#1
+*#2
+*#3
+*.adb
+*.asm
+*.lst
+*.rel
+*.rst
+*.sym
+*.cdb
+*.hex
+*.lk
+*.map
+*.mem
+*.omf
+*.out

README.md

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+# C8051 SPI RAM module 
+
+Firmware writes to a 8192-byte RAM module via SPI and prints them to the terminal. Writes a sequential value (0 to 255) to every address, read it back and prints it using `printf_fast_f` to virtual terminal using UART.

config.c

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+/////////////////////////////////////
+//  Generated Initialization File  //
+/////////////////////////////////////
+
+#include "compiler_defs.h"
+#include "C8051F040_defs.h"
+
+// Peripheral specific initialization functions,
+// Called from the Init_Device() function
+void Reset_Sources_Init()
+{
+    WDTCN     = 0xDE;
+    WDTCN     = 0xAD;
+}
+
+void Timer_Init()
+{
+    SFRPAGE   = TIMER01_PAGE;
+    TCON      = 0x41;
+    TMOD      = 0x21;
+    CKCON     = 0x18;
+    TH1       = 0xAF;
+    SFRPAGE   = TMR3_PAGE;
+    TMR3CN    = 0x04;
+    TMR3CF    = 0x1A;
+    RCAP3L    = 0xDC;
+    RCAP3H    = 0x0B;
+}
+
+void UART_Init()
+{
+    SFRPAGE   = UART0_PAGE;
+    SCON0     = 0x70;
+}
+
+void SPI_Init()
+{
+    SFRPAGE   = SPI0_PAGE;
+    SPI0CFG   = 0x40;
+    SPI0CN    = 0x01;
+    SPI0CKR   = 0x7C;
+}
+
+void Port_IO_Init()
+{
+    // P0.0  -  TX0 (UART0), Push-Pull,  Digital
+    // P0.1  -  RX0 (UART0), Open-Drain, Digital
+    // P0.2  -  SCK  (SPI0), Push-Pull,  Digital
+    // P0.3  -  MISO (SPI0), Open-Drain, Digital
+    // P0.4  -  MOSI (SPI0), Push-Pull,  Digital
+    // P0.5  -  Unassigned,  Open-Drain, Digital
+    // P0.6  -  Unassigned,  Open-Drain, Digital
+    // P0.7  -  Unassigned,  Open-Drain, Digital
+
+    // P1.0  -  Unassigned,  Open-Drain, Digital
+    // P1.1  -  Unassigned,  Open-Drain, Digital
+    // P1.2  -  Unassigned,  Open-Drain, Digital
+    // P1.3  -  Unassigned,  Open-Drain, Digital
+    // P1.4  -  Unassigned,  Open-Drain, Digital
+    // P1.5  -  Unassigned,  Open-Drain, Digital
+    // P1.6  -  Unassigned,  Open-Drain, Digital
+    // P1.7  -  Unassigned,  Open-Drain, Digital
+
+    // P2.0  -  Unassigned,  Open-Drain, Digital
+    // P2.1  -  Unassigned,  Open-Drain, Digital
+    // P2.2  -  Unassigned,  Open-Drain, Digital
+    // P2.3  -  Unassigned,  Push-Pull,  Digital
+    // P2.4  -  Unassigned,  Open-Drain, Digital
+    // P2.5  -  Unassigned,  Open-Drain, Digital
+    // P2.6  -  Unassigned,  Open-Drain, Digital
+    // P2.7  -  Unassigned,  Open-Drain, Digital
+
+    // P3.0  -  Unassigned,  Open-Drain, Digital
+    // P3.1  -  Unassigned,  Open-Drain, Digital
+    // P3.2  -  Unassigned,  Open-Drain, Digital
+    // P3.3  -  Unassigned,  Open-Drain, Digital
+    // P3.4  -  Unassigned,  Open-Drain, Digital
+    // P3.5  -  Unassigned,  Open-Drain, Digital
+    // P3.6  -  Unassigned,  Open-Drain, Digital
+    // P3.7  -  Unassigned,  Open-Drain, Digital
+
+    SFRPAGE   = CONFIG_PAGE;
+    P0MDOUT   = 0x15;
+    P2MDOUT   = 0x08;
+    XBR0      = 0x06;
+    XBR2      = 0x40;
+}
+
+void Oscillator_Init()
+{
+    int i = 0;
+    SFRPAGE   = CONFIG_PAGE;
+    OSCXCN    = 0x67;
+    for (i = 0; i < 3000; i++);  // Wait 1ms for initialization
+    while ((OSCXCN & 0x80) == 0);
+    CLKSEL    = 0x01;
+    OSCICN    = 0x00;
+}
+
+void Interrupts_Init()
+{
+    IE        = 0x91;
+    IP        = 0xC1;
+    EIE2      = 0x01;
+}
+
+// Initialization function for device,
+// Call Init_Device() from your main program
+void Init_Device(void)
+{
+    Reset_Sources_Init();
+    Timer_Init();
+    UART_Init();
+    SPI_Init();
+    Port_IO_Init();
+    Oscillator_Init();
+    Interrupts_Init();
+}

def_pinos.h

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+/*  P0  0x80 */
+__sbit __at 0x80 P0_0    ;
+__sbit __at 0x81 P0_1    ;
+__sbit __at 0x82 P0_2    ;
+__sbit __at 0x83 P0_3    ;
+__sbit __at 0x84 P0_4    ;
+__sbit __at 0x85 P0_5    ;
+__sbit __at 0x86 P0_6    ;
+__sbit __at 0x87 P0_7    ;
+
+/*  P1  0x90 */
+__sbit __at 0x90 P1_0    ;
+__sbit __at 0x91 P1_1    ;
+__sbit __at 0x92 P1_2    ;
+__sbit __at 0x93 P1_3    ;
+__sbit __at 0x94 P1_4    ;
+__sbit __at 0x95 P1_5    ;
+__sbit __at 0x96 P1_6    ;
+__sbit __at 0x97 P1_7    ;
+
+/*  P2  0xA0 */
+__sbit __at 0xA0 P2_0    ;
+__sbit __at 0xA1 P2_1    ;
+__sbit __at 0xA2 P2_2    ;
+__sbit __at 0xA3 P2_3    ;
+__sbit __at 0xA4 P2_4    ;
+__sbit __at 0xA5 P2_5    ;
+__sbit __at 0xA6 P2_6    ;
+__sbit __at 0xA7 P2_7    ;
+
+/*  P3  0xB0 */
+__sbit __at 0xB0 P3_0    ;
+__sbit __at 0xB1 P3_1    ;
+__sbit __at 0xB2 P3_2    ;
+__sbit __at 0xB3 P3_3    ;
+__sbit __at 0xB4 P3_4    ;
+__sbit __at 0xB5 P3_5    ;
+__sbit __at 0xB6 P3_6    ;
+__sbit __at 0xB7 P3_7    ;
+
+/*  P4  0xC8 */
+__sbit __at 0xC8 P4_0    ;
+__sbit __at 0xC9 P4_1    ;
+__sbit __at 0xCA P4_2    ;
+__sbit __at 0xCB P4_3    ;
+__sbit __at 0xCC P4_4    ;
+__sbit __at 0xCD P4_5    ;
+__sbit __at 0xCE P4_6    ;
+__sbit __at 0xCF P4_7    ;
+
+/*  P5  0xD8 */
+__sbit __at 0xD8 P5_0    ;
+__sbit __at 0xD9 P5_1    ;
+__sbit __at 0xDA P5_2    ;
+__sbit __at 0xDB P5_3    ;
+__sbit __at 0xDC P5_4    ;
+__sbit __at 0xDD P5_5    ;
+__sbit __at 0xDE P5_6    ;
+__sbit __at 0xDF P5_7    ;
+
+/*  P6  0xE8 */
+__sbit __at 0xE8 P6_0    ;
+__sbit __at 0xE9 P6_1    ;
+__sbit __at 0xEA P6_2    ;
+__sbit __at 0xEB P6_3    ;
+__sbit __at 0xEC P6_4    ;
+__sbit __at 0xED P6_5    ;
+__sbit __at 0xEE P6_6    ;
+__sbit __at 0xEF P6_7    ;
+
+/*  P7  0xF8 */
+__sbit __at 0xF8 P7_0    ;
+__sbit __at 0xF9 P7_1    ;
+__sbit __at 0xFA P7_2    ;
+__sbit __at 0xFB P7_3    ;
+__sbit __at 0xFC P7_4    ;
+__sbit __at 0xFD P7_5    ;
+__sbit __at 0xFE P7_6    ;
+__sbit __at 0xFF P7_7    ;

main.c

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+#include <stdio.h>
+#include "config.c"
+#include "def_pinos.h"
+
+// RAM module chip-select
+#define CS P2_3
+
+// RAM addresses
+#define RAM_SIZE 1<<13
+#define RAM_WRITE_INSTRUCTION 0x02
+#define RAM_READ_INSTRUCTION 0x03
+
+unsigned char read_ram(unsigned short address) {
+    unsigned char address_low = address;
+    unsigned char address_high = address >> 8;
+
+    // execute byte read sequence (specified in the datasheet)
+    CS = 0; // enable RAM
+    SPI0DAT = RAM_READ_INSTRUCTION; // send read instruction
+    while (!TXBMT); // wait SPI0 buffer to get empty
+    SPI0DAT = address_high;
+    while (!TXBMT);
+    SPI0DAT = address_low;
+    while (!TXBMT);
+    SPI0DAT = 0x00; // write 8 bits (either 1s or 0s) during which data will be received
+    while (!TXBMT);
+    SPIF = 0; // reset SPI0 interrupt flag
+    while (!SPIF); // wait for end of transmission interrupt
+    SPIF = 0; // reset it again
+    CS = 1; // disable ram
+
+    return SPI0DAT; // return the data sent by the RAM
+}
+
+void write_ram(unsigned int address, unsigned short data) {
+    unsigned char address_low = address;
+    unsigned char address_high = address >> 8;
+
+    // execute byte write sequence (specified in the datasheet)
+    CS = 0; // enable RAM
+    SPI0DAT = RAM_WRITE_INSTRUCTION; // send write instruction
+    while (!TXBMT); // wait SPI0 buffer to get empty
+    SPI0DAT = address_high;
+    while (!TXBMT);
+    SPI0DAT = address_low;
+    while (!TXBMT);
+    SPI0DAT = data;
+    while (!TXBMT);
+    SPIF = 0; // reset SPI0 interrupt flag
+    while (!SPIF); // wait for end of transmission interrupt
+    SPIF = 0; // reset it again
+    CS = 1; // disable ram
+}
+
+// handles printf
+void putchar (unsigned char c) {
+    SBUF0 = c;
+    while (TI0 == 0);
+    TI0 = 0;
+}
+
+void main (void) {
+    unsigned int i = 0;
+
+    Init_Device();
+    SFRPAGE = LEGACY_PAGE;
+
+    for (i = 0; i < RAM_SIZE; ++i)
+    {
+        write_ram(i, (unsigned char) i);
+        printf_fast_f("[%d] = %d\n", i, read_ram(i));
+    }
+}