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Updates to the PCIe interface to allow for shared control signals #234

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This updates the pcie bundle definitions and adds a new set of helper functions for creating pcie-based bundles. The user will likely want to use pcie-std() instead of pcie() to make pcie bundles. All control pins are not optional to allow for the user to share control pin functionality across multiple pin-assigned ports. This is likely going to be a common pattern in other connectors I would guess.

This also adds a new PCIe example that uses a shared wake pin with fanout to multiple connectors.

@Johnsel - FYI - here is the example I mentioned in discord. Still rats nest issues but this should work and not require additional jumper resistor components.

This updates the pcie bundle definitions and adds a new set of helper
functions for creating pcie-based bundles. The user will likely want
to use `pcie-std()` instead of `pcie()` to make pcie bundles.
@callendorph callendorph requested a review from bhusang January 23, 2025 22:14
]

for btype in bundle-types do:
connect_lanes(btype)
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Oh, neat way to reduce typing.

@@ -168,29 +168,58 @@ public pcb-module module :
bd-4x-prsnt.control.PRSNT# => sw.GPIO[12]
bd-4x-prsnt.control.CLKREQ# => sw.GPIO[1]

; For the PCIe-2X, I'm going to demonstrate
; how to use a shared port WAKE pin across
; the different. This is common situation where
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the different. => the different endpoints.

PCIe-PRSNT# : make-port(`PRSNT#) ; hot plug detection
PCIe-WAKE# : make-port(`PEWAKE#)
PCIe-PERST# : make-port(`PERST#) ; PCI-E Reset signal
PCIe-CLKREQ# : ,make-port(`CLKREQ#) ; clock request
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extraneous comma?


inst dut1 : jsl/examples/protocols/pcie/pcie-src/module
inst dut2 : jsl/examples/protocols/pcie/pcie-conn/module
inst dut3 : jsl/examples/protocols/pcie/pcie-conn/module
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dut3 not used? likely intended to be inst dut2 : jsl/examples/protocols/pcie/pcie-conn/module[2]

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Good catch 👍

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3 participants