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Add Aarch64 CSINV instruction semantics #1367

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Oct 21, 2024
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6 changes: 3 additions & 3 deletions Dockerfile
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
FROM --platform=linux/amd64 ubuntu:20.04
FROM --platform=linux/amd64 ubuntu:22.04
ARG DEBIAN_FRONTEND=noninteractive

COPY . /Triton
Expand Down Expand Up @@ -30,11 +30,11 @@ RUN cd /tmp && \
# libz3 >= 4.6.0
RUN pip3 install z3-solver==4.8.14

RUN PYV=`python3 -c "import platform;print(platform.python_version()[:3])"` && \
RUN PYV=`python3 -c "import platform;print(f'3.{platform.python_version_tuple()[1]}')"` && \
# Triton (LLVM for lifting; z3 or bitwuzla as SMT solver)
cd /Triton && mkdir /tmp/triton-build && cd /tmp/triton-build && cmake -DLLVM_INTERFACE=ON -DCMAKE_PREFIX_PATH=$(/usr/lib/llvm-12/bin/llvm-config --prefix) -DZ3_INTERFACE=ON -DZ3_INCLUDE_DIRS=/usr/local/lib/python$PYV/dist-packages/z3/include/ -DZ3_LIBRARIES=/usr/local/lib/python$PYV/dist-packages/z3/lib/libz3.so -DBITWUZLA_INTERFACE=ON -DBITWUZLA_INCLUDE_DIRS=/usr/local/include -DBITWUZLA_LIBRARIES=/usr/local/lib/x86_64-linux-gnu/libbitwuzla.so /Triton && make -j$(nproc) && make install

RUN PYV=`python3 -c "import platform;print(platform.python_version()[:3])"` && \
RUN PYV=`python3 -c "import platform;print(f'3.{platform.python_version_tuple()[1]}')"` && \
PYP="/usr/lib/python$PYV/site-packages" && \
echo export PYTHONPATH="$PYP:\$PYTHONPATH" >> /etc/bash.bashrc && \
python3 -c "import z3; print('Z3 version:', z3.get_version_string())" && \
Expand Down
25 changes: 25 additions & 0 deletions src/libtriton/arch/arm/aarch64/aarch64Semantics.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -60,6 +60,7 @@ CNEG | Conditional Negate returns: an alias of CSNEG
CSEL | Conditional Select
CSET | Conditional Set: an alias of CSINC
CSINC | Conditional Select Increment
CSINV | Conditional Select Inversion
CSNEG | Conditional Select Negation
EON (shifted register) | Bitwise Exclusive OR NOT (shifted register)
EOR (immediate) | Bitwise Exclusive OR (immediate)
Expand Down Expand Up @@ -257,6 +258,7 @@ namespace triton {
case ID_INS_CSET: this->cset_s(inst); break;
case ID_INS_CSINC: this->csinc_s(inst); break;
case ID_INS_CSNEG: this->csneg_s(inst); break;
case ID_INS_CSINV: this->csinv_s(inst); break;
case ID_INS_EON: this->eon_s(inst); break;
case ID_INS_EOR: this->eor_s(inst); break;
case ID_INS_EXTR: this->extr_s(inst); break;
Expand Down Expand Up @@ -1780,6 +1782,29 @@ namespace triton {
this->controlFlow_s(inst);
}

void AArch64Semantics::csinv_s(triton::arch::Instruction& inst) {
auto& dst = inst.operands[0];
auto& src1 = inst.operands[1];
auto& src2 = inst.operands[2];

/* Create symbolic operands */
auto op1 = this->symbolicEngine->getOperandAst(inst, src1);
auto op2 = this->astCtxt->bvnot(this->symbolicEngine->getOperandAst(inst, src2));

/* Create the semantics */
auto node = this->getCodeConditionAst(inst, op1, op2);

/* Create symbolic expression */
auto expr = this->symbolicEngine->createSymbolicExpression(inst, node, dst, "CSINV operation");

/* Spread taint */
expr->isTainted = this->taintEngine->setTaint(dst, this->taintEngine->isTainted(src1) | this->taintEngine->isTainted(src2));

/* Update the symbolic control flow */
this->controlFlow_s(inst);
}



void AArch64Semantics::eon_s(triton::arch::Instruction& inst) {
auto& dst = inst.operands[0];
Expand Down
3 changes: 3 additions & 0 deletions src/libtriton/includes/triton/aarch64Semantics.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -246,6 +246,9 @@ namespace triton {
//! The CSNEG semantics
void csneg_s(triton::arch::Instruction& inst);

//! The CSINV semantics
void csinv_s(triton::arch::Instruction& inst);

//! The EON semantics.
void eon_s(triton::arch::Instruction& inst);

Expand Down
3 changes: 3 additions & 0 deletions src/testers/aarch64/unicorn_test_aarch64.py
Original file line number Diff line number Diff line change
Expand Up @@ -916,6 +916,9 @@
(b"\x20\x14\x82\xda", "csneg x0, x1, x2, ne"),
(b"\x40\x14\x81\xda", "csneg x0, x2, x1, ne"),

(b"\x00\xA1\x9F\xDA", "csinv x0, x8, xzr, ge"),
(b"\x20\x01\x9F\xDA", "csinv x0, x9, xzr, eq"),

(b"\x41\x14\x82\xda", "cneg x1, x2, eq"),
(b"\x22\x14\x81\xda", "cneg x2, x1, eq"),
(b"\x41\x04\x82\xda", "cneg x1, x2, ne"),
Expand Down
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