Digital Systems Design and Test Plan Capture Wizard, VHDL/Verilog Model and Testbench Generator, EDA Project Generator/Launcher
- RSP2023 Workshop Presentation, 21st Sept 2023 "HDLGen-ChatGPT Case Study: RISC-V Processor VHDL and Verilog Model, Testbench and EDA Project Generation", 34th International Workshop on Rapid System Prototyping (RSP), Sept 2023
- Tutorials and project downloads
- User experiences
- Kanban project management
- HDLGen-ChatGPT / ChatGPT / EDA toolsuite process diagram:
- License: GNU Affero General Public License 3.0 - https://opensource.org/license/agpl-v3