regtests: add SCRIPMPI switch to all switches containing both "SCRIP …

…MPI"
MatthewMasarik-NOAA · Jan 8, 2025 · e26573e · e26573e
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diff --git a/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP_T38 b/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP_T38
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP_T38 b/regtests/mww3_test_02/input/switch_PR3_UNO_MPI_SCRIP_T38
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP_T38 b/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP_T38
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP_T38 b/regtests/mww3_test_02/input/switch_PR3_UQ_MPI_SCRIP_T38
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_03/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_03/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_04/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_04/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST1_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST1_PR3_UNO_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST1_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST1_PR3_UNO_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST1_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST1_PR3_UQ_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST1_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST1_PR3_UQ_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_05/input/switch_ST2_PR3_UNO_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_05/input/switch_ST2_PR3_UQ_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPIBDI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UNO_MPIBDI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI MPIBDI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI MPIBDI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPIBDI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UNO_MPIBDI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI MPIBDI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP b/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP_T38 b/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP_T38
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP_T38 b/regtests/mww3_test_06/input/switch_PR3_UNO_MPI_SCRIP_T38
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPIBDI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UQ_MPIBDI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI MPIBDI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI MPIBDI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPIBDI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UQ_MPIBDI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI MPIBDI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP b/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -1 +1 @@
-NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIPNC b/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIPNC
@@ -0,0 +1 @@
+NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP_T38 b/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP_T38
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP_T38 b/regtests/mww3_test_06/input/switch_PR3_UQ_MPI_SCRIP_T38
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11 T38
diff --git a/regtests/mww3_test_07/input/switch_MPI b/regtests/mww3_test_07/input/switch_MPI
@@ -1 +1 @@
-NOGRB SCRIP DIST MPI PR3 UQ FLX1 LN0 ST0 NL0 BT0 DB1 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
+NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX1 LN0 ST0 NL0 BT0 DB1 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/mww3_test_07/input/switch_MPI b/regtests/mww3_test_07/input/switch_MPI
@@ -0,0 +1 @@
+NOGRB SCRIP DIST MPI PR3 UQ FLX1 LN0 ST0 NL0 BT0 DB1 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
diff --git a/regtests/ww3_tp2.17/input/switch_NO_PDLIB b/regtests/ww3_tp2.17/input/switch_NO_PDLIB
@@ -1 +1 @@
-NOGRB TRKNC DIST MPI SCRIP MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT4 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7
+NOGRB TRKNC DIST MPI SCRIP SCRIPMPI MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT4 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7
diff --git a/regtests/ww3_tp2.17/input/switch_NO_PDLIB b/regtests/ww3_tp2.17/input/switch_NO_PDLIB
@@ -0,0 +1 @@
+NOGRB TRKNC DIST MPI SCRIP MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT4 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7
diff --git a/regtests/ww3_tp2.17/input/switch_PDLIB b/regtests/ww3_tp2.17/input/switch_PDLIB
@@ -1 +1 @@
-NOGRB TRKNC DIST MPI SCRIP MLIM PR3 UQ FLX0 PDLIB SCOTCH LN1 ST4 STAB0 NL1 BT4 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7
+NOGRB TRKNC DIST MPI SCRIP SCRIPMPI MLIM PR3 UQ FLX0 PDLIB SCOTCH LN1 ST4 STAB0 NL1 BT4 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7
diff --git a/regtests/ww3_tp2.17/input/switch_PDLIB b/regtests/ww3_tp2.17/input/switch_PDLIB
@@ -0,0 +1 @@
+NOGRB TRKNC DIST MPI SCRIP MLIM PR3 UQ FLX0 PDLIB SCOTCH LN1 ST4 STAB0 NL1 BT4 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7
diff --git a/regtests/ww3_tp2.21/input/switch_NO_PDLIB b/regtests/ww3_tp2.21/input/switch_NO_PDLIB
@@ -1 +1 @@
-NOGRB TRKNC DIST MPI SCRIP SCRIPNC MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
+NOGRB TRKNC DIST MPI SCRIP SCRIPMPI SCRIPNC MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
diff --git a/regtests/ww3_tp2.21/input/switch_NO_PDLIB b/regtests/ww3_tp2.21/input/switch_NO_PDLIB
@@ -0,0 +1 @@
+NOGRB TRKNC DIST MPI SCRIP SCRIPNC MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
diff --git a/regtests/ww3_tp2.21/input/switch_PDLIB b/regtests/ww3_tp2.21/input/switch_PDLIB
@@ -1 +1 @@
-NOGRB TRKNC DIST MPI SCRIP SCRIPNC PDLIB SCOTCH MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
+NOGRB TRKNC DIST MPI SCRIP SCRIPMPI SCRIPNC PDLIB SCOTCH MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
diff --git a/regtests/ww3_tp2.21/input/switch_PDLIB b/regtests/ww3_tp2.21/input/switch_PDLIB
@@ -0,0 +1 @@
+NOGRB TRKNC DIST MPI SCRIP SCRIPNC PDLIB SCOTCH MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
diff --git a/regtests/ww3_tp2.21/input/switch_PDLIB_METIS b/regtests/ww3_tp2.21/input/switch_PDLIB_METIS
@@ -1 +1 @@
-NOGRB TRKNC DIST MPI SCRIP SCRIPNC PDLIB METIS MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
+NOGRB TRKNC DIST MPI SCRIP SCRIPMPI SCRIPNC PDLIB METIS MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
diff --git a/regtests/ww3_tp2.21/input/switch_PDLIB_METIS b/regtests/ww3_tp2.21/input/switch_PDLIB_METIS
@@ -0,0 +1 @@
+NOGRB TRKNC DIST MPI SCRIP SCRIPNC PDLIB METIS MLIM PR3 UQ FLX0 LN1 ST4 STAB0 NL1 BT1 DB1 TR0 BS0 IS0 IC0 REF0 WNT2 WNX1 RWND CRT1 CRX1 O0 O1 O2 O2a O2b O2c O3 O4 O5 O6 O7 UOST
diff --git a/regtests/ww3_ufs1.1/input/switch_MPI b/regtests/ww3_ufs1.1/input/switch_MPI
@@ -1 +1 @@
-NCO NOGRB DIST MPI SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
+NCO NOGRB DIST MPI SCRIP SCRIPMPI SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.1/input/switch_MPI b/regtests/ww3_ufs1.1/input/switch_MPI
@@ -0,0 +1 @@
+NCO NOGRB DIST MPI SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.1/input/switch_MPI_OMPH b/regtests/ww3_ufs1.1/input/switch_MPI_OMPH
@@ -1 +1 @@
-NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
+NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPMPI SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.1/input/switch_MPI_OMPH b/regtests/ww3_ufs1.1/input/switch_MPI_OMPH
@@ -0,0 +1 @@
+NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.2/input/switch_MPI_OMPH b/regtests/ww3_ufs1.2/input/switch_MPI_OMPH
@@ -1 +1 @@
-NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
+NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPMPI SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.2/input/switch_MPI_OMPH b/regtests/ww3_ufs1.2/input/switch_MPI_OMPH
@@ -0,0 +1 @@
+NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.3/input/switch_MPI_OMPH b/regtests/ww3_ufs1.3/input/switch_MPI_OMPH
@@ -1 +1 @@
-NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
+NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPMPI SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
diff --git a/regtests/ww3_ufs1.3/input/switch_MPI_OMPH b/regtests/ww3_ufs1.3/input/switch_MPI_OMPH
@@ -0,0 +1 @@
+NCO NOGRB DIST MPI OMPG OMPH SCRIP SCRIPNC WRST PR3 UQ FLX0 SEED ST4 STAB0 NL1 BT1 DB1 MLIM FLD2 TR0 BS0 RWND WNX1 WNT1 CRX1 CRT1 O0 O1 O2 O3 O4 O5 O6 O7 O14 O15 IC0 IS0 REF0
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI PR3 UQ FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP DIST MPI PR3 UNO FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP DIST MPI PR3 UQ FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX1 LN1 ST1 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI DIST MPI PR3 UNO FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI DIST MPI PR3 UQ FLX2 LN1 ST2 NL1 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 RWND CRT1 CRX1 MGW MGP MGG O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		NOGRB SCRIP SCRIPNC DIST MPI MPIBDI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11
		NOGRB SCRIP SCRIPMPI SCRIPNC DIST MPI MPIBDI PR3 UNO FLX2 LN0 ST0 NL0 BT0 DB0 TR0 BS0 IC0 IS0 REF0 WNT1 WNX1 CRT1 CRX1 O0 O1 O2 O3 O4 O5 O6 O7 O10 O11