NMSIS/DSP: Synchronize NMSIS/DSP to CMSIS-DSP-1.16.2

Signed-off-by: sunjiuling <[email protected]>
Nuclei-Software · Sep 23, 2024 · a004c2d · a004c2d
1 parent d6b63d5
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diff --git a/NMSIS/DSP/Examples/RISCV/riscv_bayes_example/riscv_bayes_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_bayes_example/riscv_bayes_example_f32.c
@@ -40,10 +40,9 @@
 * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples Examples
+ * @{
+ *
  * @defgroup BayesExample Bayes Example
  *
  * \par Description:
@@ -52,11 +51,9 @@
  * about classical ML with CMSIS-DSP and python scikit-learn:
  * https://developer.arm.com/solutions/machine-learning-on-arm/developer-material/how-to-guides/implement-classical-ml-with-arm-cmsis-dsp-libraries
  *
- */
-
-
-/** \example riscv_bayes_example_f32.c
-  */
+ * \example riscv_bayes_example_f32.c
+ *
+ * @} */
 
 #include <math.h>
 #include <stdio.h>

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_class_marks_example/riscv_class_marks_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_class_marks_example/riscv_class_marks_example_f32.c
@@ -41,10 +41,9 @@
 * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup ClassMarks Class Marks Example
  *
  * \par Description:
@@ -77,11 +76,10 @@
  * <b> Refer  </b>
  * \link riscv_class_marks_example_f32.c \endlink
  *
- */
-
+ * \example riscv_class_marks_example_f32.c
+ *
+ * @} */
 
-/** \example riscv_class_marks_example_f32.c
-  */
 #include "riscv_math.h"
 #include <stdio.h>
 #include <math.h>

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_convolution_example/riscv_convolution_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_convolution_example/riscv_convolution_example_f32.c
@@ -40,10 +40,9 @@
 * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup ConvolutionExample Convolution Example
  *
  * \par Description:
@@ -97,11 +96,9 @@
  * <b> Refer  </b>
  * \link riscv_convolution_example_f32.c \endlink
  *
- */
-
-
-/** \example riscv_convolution_example_f32.c
-  */
+ * \example riscv_convolution_example_f32.c
+ *
+ * @} */
 
 #include "riscv_math.h"
 #include "math_helper.h"

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_dotproduct_example/riscv_dotproduct_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_dotproduct_example/riscv_dotproduct_example_f32.c
@@ -40,10 +40,9 @@
  * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup DotproductExample Dot Product Example
  *
  * \par Description:
@@ -78,11 +77,9 @@
  * <b> Refer  </b>
  * \link riscv_dotproduct_example_f32.c \endlink
  *
- */
-
-
-/** \example riscv_dotproduct_example_f32.c
-  */
+ * \example riscv_dotproduct_example_f32.c
+ *
+ * @} */
 
 #include <math.h>
 #include "riscv_math.h"

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_fft_bin_example/riscv_fft_bin_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_fft_bin_example/riscv_fft_bin_example_f32.c
@@ -41,10 +41,9 @@
  * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup FrequencyBin Frequency Bin Example
  *
  * \par Description
@@ -88,12 +87,9 @@
  * <b> Refer  </b>
  * \link riscv_fft_bin_example_f32.c \endlink
  *
- */
-
-
-/** \example riscv_fft_bin_example_f32.c
-  */
-
+ * \example riscv_fft_bin_example_f32.c
+ *
+ * @}*/
 
 #include "riscv_math.h"
 #include "riscv_const_structs.h"

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_fir_example/riscv_fir_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_fir_example/riscv_fir_example_f32.c
@@ -41,10 +41,9 @@
  * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup FIRLPF FIR Lowpass Filter Example
  *
  * \par Description:
@@ -113,11 +112,9 @@
  * <b> Refer  </b>
  * \link riscv_fir_example_f32.c \endlink
  *
- */
-
-
-/** \example riscv_fir_example_f32.c
- */
+ * \example riscv_fir_example_f32.c
+ *
+ * @} */
 
 /* ----------------------------------------------------------------------
 ** Include Files
@@ -132,7 +129,7 @@
 ** ------------------------------------------------------------------- */
 
 #define TEST_LENGTH_SAMPLES  320
-#define SNR_THRESHOLD_F32    140.0f
+#define SNR_THRESHOLD_F32    75.0f
 #define BLOCK_SIZE            32
 #define NUM_TAPS              29
 

diff --git a/.../DSP/Examples/RISCV/riscv_graphic_equalizer_example/riscv_graphic_equalizer_example_q31.c b/.../DSP/Examples/RISCV/riscv_graphic_equalizer_example/riscv_graphic_equalizer_example_q31.c
@@ -41,10 +41,9 @@
  * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup GEQ5Band Graphic Audio Equalizer Example
  *
  * \par Description:
@@ -120,12 +119,9 @@
  * <b> Refer  </b>
  * \link riscv_graphic_equalizer_example_q31.c \endlink
  *
- */
-
-
-/** \example riscv_graphic_equalizer_example_q31.c
- */
-
+ * \example riscv_graphic_equalizer_example_q31.c
+ *
+ * @} */
 
 #include "riscv_math.h"
 #include "math_helper.h"

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_linear_interp_example/riscv_linear_interp_data.c b/NMSIS/DSP/Examples/RISCV/riscv_linear_interp_example/riscv_linear_interp_data.c
diff --git a/NMSIS/DSP/Examples/RISCV/riscv_linear_interp_example/riscv_linear_interp_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_linear_interp_example/riscv_linear_interp_example_f32.c
@@ -1,9 +1,9 @@
 /* ----------------------------------------------------------------------
-* Copyright (C) 2010-2012 ARM Limited. All rights reserved.
-* Copyright (c) 2019 Nuclei Limited. All rights reserved.
+* Copyright (C) 2010-2020 ARM Limited. All rights reserved.
+* Copyright (c) 2010-2020 Nuclei Limited. All rights reserved.
 *
-* $Date:         17. January 2013
-* $Revision:     V1.4.0
+* $Date:         23. March 2020
+* $Revision:     V1.7.0
 *
 * Project:       NMSIS DSP Library
 * Title:         riscv_linear_interp_example_f32.c
@@ -42,10 +42,9 @@
 
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup LinearInterpExample Linear Interpolate Example
  *
  * <b> NMSIS DSP Software Library -- Linear Interpolate Example  </b>
@@ -79,19 +78,17 @@
  * <b> Refer  </b>
  * \link riscv_linear_interp_example_f32.c \endlink
  *
- */
-
-
-/** \example riscv_linear_interp_example_f32.c
-  */
+ * \example riscv_linear_interp_example_f32.c
+ *
+ * @} */
 
 #include "riscv_math.h"
 #include "math_helper.h"
 #include <stdio.h>
 
 #define SNR_THRESHOLD           90
 #define TEST_LENGTH_SAMPLES     10
-#define XSPACING               (0.00005f)
+#define XSPACING               (0.005f)
 
 /* ----------------------------------------------------------------------
 * Test input data for F32 SIN function
@@ -134,7 +131,7 @@ float32_t testLinIntOutput[TEST_LENGTH_SAMPLES];
 /*------------------------------------------------------------------------------
 *  External table used for linear interpolation
 *------------------------------------------------------------------------------*/
-extern float riscv_linear_interep_table[188495];
+extern const float riscv_linear_interep_table[1884];
 
 /* ----------------------------------------------------------------------
 * Global Variables for caluclating SNR's for Method1 & Method 2
@@ -155,7 +152,7 @@ int32_t main(void)
   uint32_t i;
   riscv_status status;
 
-  riscv_linear_interp_instance_f32 S = {188495, -3.141592653589793238, XSPACING, &riscv_linear_interep_table[0]};
+  riscv_linear_interp_instance_f32 S = {1884, -3.141592653589793238, XSPACING, (float*)&riscv_linear_interep_table[0]};
 
   /*------------------------------------------------------------------------------
   *  Method 1: Test out Calculated from Cubic Interpolation
@@ -187,19 +184,17 @@ int32_t main(void)
   /*------------------------------------------------------------------------------
   *            Initialise status depending on SNR calculations
   *------------------------------------------------------------------------------*/
-  if ( snr2 > snr1)
+  status = (snr2 <= snr1) ? RISCV_MATH_TEST_FAILURE : RISCV_MATH_SUCCESS;
+
+  if (status != RISCV_MATH_SUCCESS)
   {
-    status = RISCV_MATH_SUCCESS;
+    status = RISCV_MATH_TEST_FAILURE;
   }
   else
   {
-    status = RISCV_MATH_TEST_FAILURE;
+    status = RISCV_MATH_SUCCESS;
   }
 
-  /* ----------------------------------------------------------------------
-  ** Loop here if the signals fail the PASS check.
-  ** This denotes a test failure
-  ** ------------------------------------------------------------------- */
   if ( status != RISCV_MATH_SUCCESS)
   {
   	printf("failed\n");

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_matrix_example/riscv_matrix_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_matrix_example/riscv_matrix_example_f32.c
@@ -41,10 +41,9 @@
  * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup MatrixExample Matrix Example
  *
  * \par Description:
@@ -67,7 +66,6 @@
  *
  * \par Block Diagram:
  * \par
- * \image html MatrixExample.png
  *
  * \par Variables Description:
  * \par
@@ -85,11 +83,9 @@
  * <b> Refer  </b>
  * \link riscv_matrix_example_f32.c \endlink
  *
- */
-
-
-/** \example riscv_matrix_example_f32.c
-  */
+ * \example riscv_matrix_example_f32.c
+ *
+ * @} */
 
 #include "riscv_math.h"
 #include "math_helper.h"

diff --git a/NMSIS/DSP/Examples/RISCV/riscv_signal_converge_example/riscv_signal_converge_example_f32.c b/NMSIS/DSP/Examples/RISCV/riscv_signal_converge_example/riscv_signal_converge_example_f32.c
@@ -41,10 +41,9 @@
  * -------------------------------------------------------------------- */
 
 /**
- * @ingroup groupExamples
- */
-
-/**
+ * @addtogroup groupExamples
+ * @{
+ *
  * @defgroup SignalConvergence Signal Convergence Example
  *
  * \par Description:
@@ -101,11 +100,10 @@
  * <b> Refer  </b>
  * \link riscv_signal_converge_example_f32.c \endlink
  *
- */
-
+ * \example riscv_signal_converge_example_f32.c
+ *
+ * @} */
 
-/** \example riscv_signal_converge_example_f32.c
-  */
 
 #include <stdio.h>
 #include "riscv_math.h"
@@ -118,7 +116,7 @@
 #define TEST_LENGTH_SAMPLES 1536
 #define NUMTAPS               32
 #define BLOCKSIZE             32
-#define DELTA_ERROR         0.000001f
+#define DELTA_ERROR         0.00009f
 #define DELTA_COEFF         0.0001f
 #define MU                  0.5f