Merge remote-tracking branch 'origin/dev' into bug/tagnumber

.github/workflows/build_windows.bat

@@ -18,5 +18,10 @@ IF "%VS_VER%"=="2017_build_tools" (
 
 for /f "tokens=* usebackq" %%f in (`dir /b "C:\Program Files (x86)\Intel\oneAPI\compiler\" ^| findstr /V latest ^| sort`) do @set "LATEST_VERSION=%%f"
 @call "C:\Program Files (x86)\Intel\oneAPI\compiler\%LATEST_VERSION%\env\vars.bat"
-cmake -S . -B build -GNinja -DCMAKE_BUILD_TYPE=Release -DSEMBA_FDTD_ENABLE_MPI=NO FC=ifx CC=icx
+cmake -S . -B build -GNinja ^
+    -DCMAKE_BUILD_TYPE=Release ^
+    -DSEMBA_FDTD_ENABLE_MPI=NO ^
+    -DCMAKE_C_COMPILER=icx ^
+    -DCMAKE_CXX_COMPILER=icx 
 cmake --build build -j
+

.github/workflows/ubuntu-intelLLVM.yml

@@ -53,4 +53,6 @@ jobs:
     - name: Run wrapper tests
       timeout-minutes: 60
       run: |
-        python -m pytest test    
+        python -m pytest test    
+
+

.github/workflows/windows-intel.yml

@@ -52,7 +52,7 @@ jobs:
 
     - name: Run all wrapper tests
       if: matrix.mtln=='Yes'
-      run: python -m pytest test/
+      run: python -m pytest 'not codemodel' test/
 
     - name: Run non-mtln wrapper tests
       if: matrix.mtln=='No'

.github/workflows/windows-intelLLVM.yml

@@ -52,7 +52,7 @@ jobs:
 
     - name: Run all wrapper tests
       if: matrix.mtln=='Yes'
-      run: python -m pytest test/
+      run: python -m pytest 'not codemodel' test/
 
     - name: Run non-mtln wrapper tests
       if: matrix.mtln=='No'

CMakeLists.txt

@@ -1,7 +1,8 @@
 cmake_minimum_required (VERSION 3.15)
 
 project(semba-fdtd Fortran)
-enable_language (CXX C Fortran)
+enable_language (Fortran)
+
 
 set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib)
 set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib)
@@ -48,6 +49,21 @@ if(CMAKE_Fortran_COMPILER_ID MATCHES "^Intel")
 	if (CMAKE_SYSTEM_NAME MATCHES "Linux")
 		set(CMAKE_Fortran_FLAGS "${CMAKE_Fortran_FLAGS} -qopenmp")
 		set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -qopenmp")
+	elseif(CMAKE_SYSTEM_NAME MATCHES "Windows")
+
+		if(CMAKE_Fortran_COMPILER_ID MATCHES "IntelLLVM")
+			set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /Qiopenmp")
+		else()
+			if(CMAKE_BUILD_TYPE MATCHES "Debug")
+				set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /Qiopenmp /Wno-debug-option-simd")
+			else()
+				set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} /Qiopenmp")
+			endif()
+		endif()
+
+
+	else()
+		message(FATAL_ERROR "Unrecognized system name")
 	endif()
 	if(CMAKE_BUILD_TYPE MATCHES "Debug")
 		set(CMAKE_Fortran_FLAGS "${CMAKE_Fortran_FLAGS} -check all,nouninit -debug full -traceback")
@@ -69,6 +85,7 @@ if(SEMBA_FDTD_ENABLE_SMBJSON)
 	set(SMBJSON_LIBRARIES smbjson)
 endif()
 if (SEMBA_FDTD_ENABLE_MTLN)
+	set(NGSPICE_LIB ngspice)
 	add_definitions(-DCompileWithMTLN)
 	add_subdirectory(src_mtln)
 	set(MTLN_LIBRARIES mtlnsolver ngspice_interface)

doc/smbjson.md

@@ -345,6 +345,22 @@ Materials of this type must contain:
 }
 ```
 
+A single wire might be surrounded by a dielectric material. In that case, the radius and the relative permittivity of the material are needed. 
+
+**Example:**
+
+```json
+{
+    "name": "WireWithDielectric",
+    "id": 2,
+    "type": "wire",
+    "radius": 0.0001,
+    "resistancePerMeter": 22.9e-3,
+    "dielectric" : {"radius": 0.001, "relativePermittivity" : 3}
+}
+```
+If the `dielectric` field is present but any of `radius` or `relativePermittivity` is absent, the parsing of the dielectric will fail.
+
 #### `multiwire`
 
 A `multiwire`, models $N+1$ electrical wires inside a bundled. The voltages and currents on these wires are solved by a multiconductor transmission lines (MTLN) solver described in:
@@ -443,19 +459,22 @@ As with the rest of terminations, SPICE terminations have to be equivalents to 2
 
 #### `connector`
 
-The `connector` assigns properties to the initial or last segment of a `wire` or a $N+1$ conductors `multiwire` as explained in the [material associations](#materialassociations) section. The following entries can be present:
+The `connector` represents the physical connection of a bundle to a structure. `connector` assigns properties to the initial or last segment of a `wire` or a `multiwire`. 
+This `wire` can be either a single wire or the outermost conductor of a `cable` bundle. The `conector`  can have the following properties:
 
-+ `[resistances]`, an array of $N$ real numbers which will be converted to resistances per unit length and will replace the `resistancePerMeter` of that segment of the `multiwire`.
++ `[resistances]`, an array of $N$ real numbers which will be converted to resistances per unit length and will replace the resistancePerMeter of that segment of the multiwire
 + `[transferImpedancePerMeter]`, described in the same way as explained in the [multiwire](#multiwire) section. Only valid in a `connector` associated with `multiwire`.
 
+
+
 **Example:**
 
 ```json
 {
     "name": "SegmentConnector1",
     "id": 204,
     "type": "connector",
-    "resistances": [100e-3],
+    "resistance": 100e-3,
     "transferImpedancePerMeter" : {
         "resistiveTerm" : 3.33,
         "inductiveTerm" : 2.6e-9,
@@ -748,3 +767,18 @@ A `generator` source must be located on a single `node` whose `coordinateId` is
     "elementIds": [1]
 }
 ```
+
+In case the generator is located at the junction (connection point) of two of more lines, the  `node` shared by the lines will share the same  `coordinateId`. If more than two lines are connected together, it is necessary to know to which of the lines the generator is connected to. The entry `[attachedToLineId]` is an integer which refers to the `elemId` of the `polyline` the source is connected to. 
+
+**Example:**
+
+```json
+{
+    "name": "voltage_source",
+    "type": "generator",
+    "field": "voltage",
+    "magnitudeFile": "gauss.exc", 
+    "elementIds": [1], 
+    "attachedToLineId" : 2
+}
+```

external/CMakeLists.txt

@@ -16,3 +16,8 @@ if (SEMBA_FDTD_ENABLE_MTLN OR SEMBA_FDTD_ENABLE_SMBJSON)
 		${FHASH_SOURCES_FOLDER}/fhash_key/int64_1d.f90
 	)
 endif()
+
+if (SEMBA_FDTD_ENABLE_MTLN)
+	add_subdirectory("ngspice/")
+	# set(NGSPICE_LIB ngspice)
+endif()