Windows Build 16.0.0
Changes:
- 89d5468 *** USE llvm/llvm-project ***
- 9b52b6c Clean up and improve Zen CPU detection
- bc7b2ed Quick hack for Zen 4, more Zen 3 detection
- e8f2aa0 add raptorlake target
- 5521155 Fix register clobbering on aarch64 GHC when mixing tail/non-tail calls
- c725f49 X86: Avoid converting EVEX to VEX when disp8 would be beneficial
- eb7a5e5 Fix tail call guarantee setting for GHC on arm64 backend
- 509d31a Force ELF on macOS
- 1c0ca19 Relax volatile stores (always return)
- a670c45 Enable LLVM_USE_PERF
See More
- 318b8fe X86: fixup matchPMADDWD_3
- 1cc7bdd X86: improve (V)PMADDWD detection (2)
- 610c27a X86: disable AVX512 truncate with saturation instructions
- 747fc0e lib/Support: Detect AVX-512 on Alderlake CPUs
- 18f153b lib/Support: Add Tigerlake and Alderlake detection
- 6382230 test: Remove test files
- 05332b7 TypeSize.h: add integral constructor to ElementCount
- 902970b IRBuilder.h: remove deprecations
- c9fceef X86: fixup (V)PMADDWD detection
- f7d625e X86: improve (V)PMADDWD detection
- c36b21c X86: modify PreserveAll CC to save full AVX-512 state
- 2e65b3a Fix possible compilation issue with gcc-11
- 548daf0 X86: avoid vector-scalar shifts if splat amount is directly a vector ADD/SUB/AND op.
- d5bc359 X86: add patterns for X86ISD::VSHLV and X86ISD::VSRLV
- bed7001 X86: add pattern for X86ISD::VSRAV
- 2ffa822 X86: expand detectAVGPattern()
- 5ff8f41 X86: optimize VSELECT for v16i8 with shl + sign bit test
- 4743d02 X86: LowerShift: new algorithm for vector-vector shifts
- d5b5885 Disable GDBRegistrationListener
- 6516f56 MCJIT: don't finalize modules on symbol lookup (workaround)
- d18817d X86: Fix/workaround Small Code Model for JIT
- 8edd96e Set up CI with Azure Pipelines
- 39c406a [AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)z
- be1489a [debuginfo-test][cross-project-tests] Release note for new project name
- aed4e74 [X86] combineX86ShuffleChain - ensure we only peek through bitcasts to vectors (PR51858)
- 47e63cb [openmp] Apply code change from D109500
- fca6438 [VPlan] Fix crash caused by not updating all users properly.
- 7b93a88 Revert "[AArch64][GlobalISel] Legalize bswap <2 x i16>"
- b6614b2 Revert [MC][ELF] Emit separate unique sections for different flags
- a967752 [X86] Don't clobber EBX in stackprobes
- 7d56483 [IR] Handle constant expressions in containsUndefinedElement()
- bedf13b [SimplifyCFG] performBranchToCommonDestFolding(): require block-closed SSA form for bonus instructions (PR51125)
- 5e5115b [MemCpyOpt] Fix a variety of scalable-type crashes
- 28d7691 Workaround incorrect types when lowering fixed length gather/scatter
- b37f5f2 Inform pass manager when child loops are deleted
- 601c2dd Fine grain control over some symbol visibility
- 5f6ef6f [AArch64][SME] Fix imm bug in mov vector to tile aliases
- 921995a Revert "[HardwareLoops] Change order of SCEV expression construction for InitLoopCount."
- d21237c [SelectionDAGBuilder] Bugfix in visitInlineAsm()
- 64f4a52 [llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations
- 09c230e Add llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)
- e0d7c39 [AArch64][sve] Prevent incorrect function call on fixed width vector
- 3c59cf5 [SCEV] Fix applyLoopGuards() with range check idiom (PR51760)
- 8830999 [DAGCombine] Prevent the transform of combine for multi-use operand
- 6d085fa [tests] precommit tests for D107692
- bf02d31 [docs] Update release notes with items related to Flang
- 12537ac [libomptarget][amdcgn] Only add opt/llvm-link dependency if TARGET is available [ org/D107156#2969862 ]
- 4b60833 [libomptarget][amdcgn] Add build dependency for llvm-link and opt
- ba85498 [RISCV] Fix reporting of incorrect commutable operand indices
- bf7908c [Orc] Enable debug object tests only on x86_64 hosts
- 683bdb0 [Linker] Support weak symbols in nodeduplicate COMDAT group
- e415eb6 [docs] Mention that the legacy PM is deprecated and will be removed after 14
- fda0edf [NewPM] Add missing LTO ArgPromotion pass
- 72d2352 [AlignFromAssume] Bailout w/non-constant alignments (pr51680)
- 6d1749e [SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero
- 4ddceef [WebAssembly] Fix FastISel of condition in different block (PR51651)
- 8fbe4dd [M68k] Update pointer data layout
- de85b17 [M68k][NFC] Rename M68kOperand::Kind to KindTy
- ab550c7 [CMake] Change -DENABLE_EXPERIMENTAL_NEW_PASS_MANAGER=off to -DLLVM_ENABLE_NEW_PASS_MANAGER=off
- 79ff6e4 [LoopIdiom] Don't transform loop into memmove when load from body has more than one use
- b61f809 [NFC][LoopIdiom] Add reproducer of wrong memmove transformation
- 5aea8f0 Revert "[RISCV] Fix reporting of incorrect commutable operand indices"
- 8a19c7f ThinLTO: Fix inline assembly references to static functions with CFI
- 2424302 [RISCV] Fix reporting of incorrect commutable operand indices
- 13fbbff [Coverage][llvm-cov] Correctly export branch coverage in LCOV format
- fa3a9f0 Revert sharing subprograms across CUs
- e4e6f3e [AArch64] Fix comparison peephole opt with non-0/1 immediate (PR51476)
- 45d26b8 [X86][AVX] Extract SUBV_BROADCAST constant bits from just the lower subvector range (PR51281)
- 4d78ad4 [ARM][atomicrmw] Fix CMP_SWAP_32 expand assert
- 8202608 [PowerPC] Disable CTR Loop generate for fma with the PPC double double type.
- 22b0c02 [DAGCombiner] Stop visitEXTRACT_SUBVECTOR creating illegal BITCASTs post legalisation.
- 0bbcb19 [Attributor][FIX] Guard constant casts with type size checks
- 4345e14 [InstCombine] avoid infinite loops from min/max canonicalization
- 5a14ea1 [InstSimplify] fold min/max with limit constant
- de802b8 [InstSimplify] add tests for min/max idioms; NFC
- 9740b5c [LoopVectorize] Improve vectorisation of some intrinsics by treating them as uniform
- 0020382 [NFC] Clean up tests in test/Transforms/LoopVectorize/assume.ll
- 3a88dc8 Add release notes for things relating to MinGW in the release
- 4a38ef8 [ELF] Don't emit SHF_GNU_RETAIN on Solaris
- fd411b2 [profile] Fix profile merging with binary IDs
- 681b643 [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).
- fb132cb [MCA][NFC] Add tests for PR51318 and PR51322.
- db94372 [MCA] Simplify the rounding logic used in TimelineView::printWaitTimeEntry.
- 64a6596 [Attributor][NFC] Try to make the windows build bots happy
- d2cc939 [Attributor][FIX] Handle recurrences (PHIs) in AAPointerInfo explicitly
- e9a9a80 [Attributor][FIX] Only avoid visiting PHI uses multiple times (PR51249)
- 5cf4e36 [Attributor][NFC] Precommit reproducer for PR51249
- 0c8a79e [RISCV] Add scheduling resources for V
- 11c22c9 Drop LLVM_VERSION_SUFFIX
- 13e216d [llvm] [cmake] Export LLVM_ENABLE_NEW_PASS_MANAGER into LLVMConfig.cmake
- ee15bdb [AArch64][SVE] Fix assertion failure when lowering fixed length gather/scatter
- 7d89a50 [llvm] [lit] Fix inconsistent test order in shtest-keyword-parse-errors
- f6a86e4 BPF: avoid NE/EQ loop exit condition
- a558de3 [InstCombine] Fixed select + masked load fold failure
- 7563d8d [llvm-rc] Allow specifying language with a leading 0x prefix
- 910de61 [DebugInfo][LSR] Avoid crashes on large integer inputs
- 46ad88f Follow-up to D105207, only salvage affine SCEVs to avoid a crash
- ff86d9e [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR
- a75903d [ConstantFold] Get rid of special cases for sizeof etc.
- f9a2d3e [test] Fix tools/gold/X86/comdat-nodeduplicate.ll on non-X86 hosts
- 8be74d2 Fixing an infinite loop problem in InstCombine
- 3851813 [PredicateInfo] Use Intrinsic::getDeclaration now that it handles unnamed types. [ #2875179 ]
- e20914d Revert "Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types."
- 2b94ecb [SROA] prevent crash on large memset length (PR50910)
- 30f0ebb [Attributor] Don't test internalization in the CGSCC pass.
- 4f1fd1c [Attributor] Change function internalization to not replace uses in internalized callers
- 710ae2b [ReleaseNotes] Add scalable matrix extension support to AArch64 changes
- bafc7f3 [llvm][Release notes] Add AArch64 SVE, PAC and LLDB prebuilt binary
- aa2a6b0 [llvm][Release notes] Add memory tagging support to lldb changes
- d4eedb2 [Analysis] improve function signature checking for snprintf
- 9770d34 [OpenMP] Fixing llvm-omp-device-info compilation with runtimes
- 70f5e23 [X86][AVX] Add test case for PR51281
- df32862 [DAGCombiner] don't try to partially reduce add-with-overflow ops
- a068646 [AArch64][x86] add tests for add-with-overflow folds; NFC
- b92c9f9 [DivRemPairs] make sure we have a valid CFG for hoisting division
- 7c9c296 [RISCV] Restrict performANY_EXTENDCombine to prevent an infinite loop.
- 276fceb [AArch64] Legalize MVT::i64x8 in DAG isel lowering
- a50e569 [AArch64] Add a Machine Value Type for 8 consecutive registers
- cd0096f [DebugInfo][InstrRef] Don't break up ret-sequences on debug-info instrs
- 183b0c7 [AArch64][SVE] Fix incorrect mask type when lowering fixed type SVE gather/scatter
- 923213f test-release.sh: Kill python2
- 9a10dd5 Revert "[DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR"
- c463fa6 [mlir][openacc] Initial translation for DataOp to LLVM IR
- 5b7208d [OpenMP] Folding threadLimit and numThreads when single value in kernels
- 66a78bc llvm/utils: guarantee revert_checker's revert ordering
- bab6d38 [DAGCombiner] Fold SETCC(FREEZE(x),const) to FREEZE(SETCC(x,const)) if SETCC is used by BRCOND
- 2e57fe1 Precommit test files for D105344 (NFC)
- a6d5003 [X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT
- 9b53e59 Reapply "[Attributor] Disable simplification AAs if a callback is present""
- 5d447ad Revert "[X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT"
- 115164b Add llvm::equal convenient wrapper for ranges around std::equal
- 409f0ee [X86] Fix lowering to illegal type in LowerINSERT_VECTOR_ELT
- 60850cd [Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs
- 803630d [gn build] Port 8a48e6dda9f7
- 96f821b Revert "[Attributor] Disable simplification AAs if a callback is present"
- 0042081 [Attributor] Verify
checkForAllUses
return value properly - 0b6fb7b [Attributor] Disable simplification AAs if a callback is present
- 9aacda2 Fix test/Transforms/LoopVectorize/AArch64/strict-fadd-vf1.ll.
- 091e720 [gn build] manually port 71909de37495
- 506c974 [MLGO] fix silly LLVM_DEBUG misuse
- f4b486c [NFC][MLGO] Debug messages for what inline advisor is selected
- 8b3f85a [PowerPC] Turn deprecated altivec prefetch instrs to nops on AIX
- 11aa71a [x86] update stale code comment; NFC
- d571039 [x86] add more tests for cmov and lea; NFC
- ece3299 AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx9
- 17f139f AMDGPU/GlobalISel: Fix wrong addrspace in test MMOs
- cfbd77a AMDGPU/GlobalISel: Add a few tests for unaligned truncating stores
- c0d40a1 Remove unused include that's also a layering violation. NFC.
- 0a69d4f Add test update for a11d9a1f480f which disables fallbacks.
- 6ce8f2f [AArch64][GlobalISel] Fix constraining LDXPX intrinsic selection.
- 2a88f80 [ASAN] NFC: Remove redundant variable
- c563d2c [gn build] Port 02077da7e7a8
- d9613eb [Matrix] Fix shape for factored transpose
- add64be [Matrix] RAUW should only replace an instruction in ShapeMap if supportsShapeInfo
- 6516543 Add jump-threading optimization for deterministic finite automata
- 6bfc6b8 [RISCV] Select vector shl by 1 to a vector add.
- 0f86a54 [AArch64] Update and expand min-max cost model test. NFC
- fd18a76 Enabling the copy-constant-to-alloca optimization in more instances
- cdd50ed [LoopVectorize] Don't interleave scalar ordered reductions for inner loops
- 3ad8a0b Update reduction test. Remove standalone test file
- 3b4453b AMDGPU: Update tests for lower i1 change
- 8979bda AMDGPU: Treat IMPLICIT_DEF like a constant lanemask source
- bb4e957 [WebAssembly] Codegen for extmul SIMD instructions
- 2b96746 [SystemZ][z/OS] Initial code to generate assembly files on z/OS
- 23f3f90 Strip undef implying attributes when moving calls
- 05308b2 Revert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."
- d809395 Revert "Revert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI.""
- 9d32182 Revert "[X86][AVX] Add getBROADCAST_LOAD helper function. NFCI."
- adf33c8 [DebugInfo][InstrRef] Correctly update DBG_PHIs during instr scheduling
- 64d9d45 Handle unused variable when assertions are disabled
- b8af1d6 [IVDescriptors] Fix bug in checkOrderedReduction
- fe743a5 [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR
- 47a5174 [DebugInfo][InstrRef] Handle llvm.frameaddress intrinsics gracefully
- e13e00f [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR
- 2e863e8 [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR
- b5cbfee [PowerPC] add more testcases for ld_splat; nfc
- ac97ba6 [LangRef][NFC] Fix variable name in llvm.maxnum docs
- a99adc7 [X86] Add PR37025 test coverage
- e1c8650 [LV] Disable Scalable VFs when tail folding is enabled b/c of low tripcount.
- 3bc8cd6 [GlobalISel] Constant fold G_SITOFP and G_UITOFP in CSEMIRBuilder
- cf6bdfc [SelectionDAG] Support scalable splats in U(ADD|SUB)SAT combines
- 5afacc5 [RISCV] Add support for vector saturating add/sub operations
- c2bd628 [NFC] Reflow some debug messages.
- 1ae2c0f [AArch64][SME] Add zero instruction
- b7fc1f8 [RISCV] Add tests showing missed vector saturating add/sub combines
- 4d9d878 [ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses
- 565fcd6 [LoopFlatten] Use SCEV and Loop APIs to identify increment and trip count
- ee2584c [docs] Update release notes with all LLVM-C API changes
- e8ead0f [Debug-Info][llvm-dwarfdump] Don't try to dump location
- 10658f9 [gn build] Port 2487db1f2862
- d08c2fa [ORC] Require ExecutorProcessControl when constructing an ExecutionSession.
- e9073c9 [OpenMP] Try to simplify all loads in device code
- 7568851 [Attributor][FIX] Copy all members in the assignment operator
- 7e9917e [Attributor] Utilize the InstSimplify interface to simplify instructions
- 86cba7b [InstSimplify] Expose generic interface for replaced operand simplification
- 35ac57a [Attributor] Update check lines for all AMDGPU attributor tests
- 2b8eaac [Attributor][FIX] Update AMDGPU attributor test
- 700878e [Coroutine] Record the elided coroutines
- ffb4271 Merge all the llvm-exegesis unit tests into a single binary
- eca1a76 [CSSPGO] Tweak ICP threshold in top-down inliner
- 4ce1602 [Local] Do not introduce a new
llvm.trap
beforeunreachable
- 95f415b [Attributor] Delete dead stores
- 5ee3942 [Attributor] Introduce getPotentialCopiesOfStoredValue and use it
- 60670bd Build libSupport with -Werror=global-constructors (NFC)
- eb0ba29 [AArch64] Fix -Wparentheses warning with gcc 5.4. NFC
- ce23772 [NFC][InstCombine] Fix typo
- 52c4e0d [llvm-jitlink] Don't hardcode LLVM version number into the runtime path.
- fcd0279 Revert "[GlobalISel] Add scalar widening for G_MERGE_VALUES destination"
- 14491b3 [AbstractAttributor] Fold __kmpc_parallel_level if possible
- 6a849a3 [OpenMP] Run rewriteDeviceCodeStateMachine in the Module not CGSCC pass
- d408419 [Attributor][FIX] Do not return CHANGED unconditionally
- 04130ef [Attributor][FIX] Track change status for AAIsDead properly
- 8a88013 [gn build] Kind of port c7b3a91017d2 (libclang version script)
- 5997b61 [AMDGPU] Add SelectionDAG support for insert_subvector on v4f64
- ac19c5a Revert "Build libSupport with -Werror=global-constructors (NFC)"
- 64c9fc2 [PowerPC] Fix materialization of SP float values on Power10
- 69e5ee4 Revert "[AArch64][GlobalISel] Legalize ctpop s128"
- 1c2cdfc [GlobalISel] Add scalar widening for G_MERGE_VALUES destination
- b21820b [SCEV] Add a comment about invariant in howManyLessThans
- 18108c5 [AArch64][GlobalISel] Legalize ctpop s128
- 8bfb4cf [PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX
- 07a9552 Build libSupport with -Werror=global-constructors (NFC)
- 6634a71 [AArch64][GlobalISel] Add identity combines to post-legal combiner.
- 3698f6f [llvm-objcopy] Fix section group flag read/write when operating on a cross-endian object file
- 5e3045e [GlobalISel] Add a constant folding combine.
- 5b24282 [WebAssembly] Remove dominator dependency in WasmEHPrepare (NFC)
- 9b48b7e [WebAssembly] Make Emscripten EH work with Emscripten SjLj
- cc27d61 [SimplifyCFG] SwitchToLookupTable(): don't increase ret count
- 5b8d8bf [SimplifyCFG] Drop support for simplifying cond branch to two (different) ret's
- c0c15a8 [SimplifyCFG] Drop support for duplicating ret's into uncond predecessors
- 33d35b0 [CodeView] Saturate values bigger than supported by APInt.
- e4830a6 [ARM] Fixup vst4 test. NFC
- bbc51b9 [PowerPC]Add addex instruction definition and MC tests
- 4f1b8e2 [LV] Don't let ForceTargetInstructionCost override Invalid cost.
- bb39cd3 [AArch64] NFC: Make some AArch64-SVE LoopVectorize tests generic.
- 2e5bfee [SimplifyCFG] Remove stale comment after d7378259aa, NFC
- a85a795 Fix clang debug info irgen of i128 enums
- c4acdbb [PowerPC] Add implicit-def RM to instructions mtfsb[01]
- 71556de [OpenMP][NFC] Remove unncessary capture in RAII struct
- b2d24ac [amdgpu] Add 64-bit PC support when expanding unconditional branches.
This list of changes was auto generated.